4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
24 #include "qemu/cutils.h"
26 #include "exec/exec-all.h"
28 #include "hw/qdev-core.h"
29 #if !defined(CONFIG_USER_ONLY)
30 #include "hw/boards.h"
31 #include "hw/xen/xen.h"
33 #include "sysemu/kvm.h"
34 #include "sysemu/sysemu.h"
35 #include "qemu/timer.h"
36 #include "qemu/config-file.h"
37 #include "qemu/error-report.h"
38 #if defined(CONFIG_USER_ONLY)
40 #else /* !CONFIG_USER_ONLY */
42 #include "exec/memory.h"
43 #include "exec/ioport.h"
44 #include "sysemu/dma.h"
45 #include "exec/address-spaces.h"
46 #include "sysemu/xen-mapcache.h"
47 #include "trace-root.h"
49 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
51 #include <linux/falloc.h>
55 #include "exec/cpu-all.h"
56 #include "qemu/rcu_queue.h"
57 #include "qemu/main-loop.h"
58 #include "translate-all.h"
59 #include "sysemu/replay.h"
61 #include "exec/memory-internal.h"
62 #include "exec/ram_addr.h"
65 #include "migration/vmstate.h"
67 #include "qemu/range.h"
69 #include "qemu/mmap-alloc.h"
72 //#define DEBUG_SUBPAGE
74 #if !defined(CONFIG_USER_ONLY)
75 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
76 * are protected by the ramlist lock.
78 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
80 static MemoryRegion
*system_memory
;
81 static MemoryRegion
*system_io
;
83 AddressSpace address_space_io
;
84 AddressSpace address_space_memory
;
86 MemoryRegion io_mem_rom
, io_mem_notdirty
;
87 static MemoryRegion io_mem_unassigned
;
89 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
90 #define RAM_PREALLOC (1 << 0)
92 /* RAM is mmap-ed with MAP_SHARED */
93 #define RAM_SHARED (1 << 1)
95 /* Only a portion of RAM (used_length) is actually used, and migrated.
96 * This used_length size can change across reboots.
98 #define RAM_RESIZEABLE (1 << 2)
102 #ifdef TARGET_PAGE_BITS_VARY
103 int target_page_bits
;
104 bool target_page_bits_decided
;
107 struct CPUTailQ cpus
= QTAILQ_HEAD_INITIALIZER(cpus
);
108 /* current CPU in the current thread. It is only valid inside
110 __thread CPUState
*current_cpu
;
111 /* 0 = Do not count executed instructions.
112 1 = Precise instruction counting.
113 2 = Adaptive rate instruction counting. */
116 bool set_preferred_target_page_bits(int bits
)
118 /* The target page size is the lowest common denominator for all
119 * the CPUs in the system, so we can only make it smaller, never
120 * larger. And we can't make it smaller once we've committed to
123 #ifdef TARGET_PAGE_BITS_VARY
124 assert(bits
>= TARGET_PAGE_BITS_MIN
);
125 if (target_page_bits
== 0 || target_page_bits
> bits
) {
126 if (target_page_bits_decided
) {
129 target_page_bits
= bits
;
135 #if !defined(CONFIG_USER_ONLY)
137 static void finalize_target_page_bits(void)
139 #ifdef TARGET_PAGE_BITS_VARY
140 if (target_page_bits
== 0) {
141 target_page_bits
= TARGET_PAGE_BITS_MIN
;
143 target_page_bits_decided
= true;
147 typedef struct PhysPageEntry PhysPageEntry
;
149 struct PhysPageEntry
{
150 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
152 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
156 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
158 /* Size of the L2 (and L3, etc) page tables. */
159 #define ADDR_SPACE_BITS 64
162 #define P_L2_SIZE (1 << P_L2_BITS)
164 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
166 typedef PhysPageEntry Node
[P_L2_SIZE
];
168 typedef struct PhysPageMap
{
171 unsigned sections_nb
;
172 unsigned sections_nb_alloc
;
174 unsigned nodes_nb_alloc
;
176 MemoryRegionSection
*sections
;
179 struct AddressSpaceDispatch
{
182 MemoryRegionSection
*mru_section
;
183 /* This is a multi-level map on the physical address space.
184 * The bottom level has pointers to MemoryRegionSections.
186 PhysPageEntry phys_map
;
191 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
192 typedef struct subpage_t
{
196 uint16_t sub_section
[];
199 #define PHYS_SECTION_UNASSIGNED 0
200 #define PHYS_SECTION_NOTDIRTY 1
201 #define PHYS_SECTION_ROM 2
202 #define PHYS_SECTION_WATCH 3
204 static void io_mem_init(void);
205 static void memory_map_init(void);
206 static void tcg_commit(MemoryListener
*listener
);
208 static MemoryRegion io_mem_watch
;
211 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
212 * @cpu: the CPU whose AddressSpace this is
213 * @as: the AddressSpace itself
214 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
215 * @tcg_as_listener: listener for tracking changes to the AddressSpace
217 struct CPUAddressSpace
{
220 struct AddressSpaceDispatch
*memory_dispatch
;
221 MemoryListener tcg_as_listener
;
226 #if !defined(CONFIG_USER_ONLY)
228 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
230 static unsigned alloc_hint
= 16;
231 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
232 map
->nodes_nb_alloc
= MAX(map
->nodes_nb_alloc
, alloc_hint
);
233 map
->nodes_nb_alloc
= MAX(map
->nodes_nb_alloc
, map
->nodes_nb
+ nodes
);
234 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
235 alloc_hint
= map
->nodes_nb_alloc
;
239 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
246 ret
= map
->nodes_nb
++;
248 assert(ret
!= PHYS_MAP_NODE_NIL
);
249 assert(ret
!= map
->nodes_nb_alloc
);
251 e
.skip
= leaf
? 0 : 1;
252 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
253 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
254 memcpy(&p
[i
], &e
, sizeof(e
));
259 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
260 hwaddr
*index
, hwaddr
*nb
, uint16_t leaf
,
264 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
266 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
267 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
269 p
= map
->nodes
[lp
->ptr
];
270 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
272 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
273 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
279 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
285 static void phys_page_set(AddressSpaceDispatch
*d
,
286 hwaddr index
, hwaddr nb
,
289 /* Wildly overreserve - it doesn't matter much. */
290 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
292 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
295 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
296 * and update our entry so we can skip it and go directly to the destination.
298 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
300 unsigned valid_ptr
= P_L2_SIZE
;
305 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
310 for (i
= 0; i
< P_L2_SIZE
; i
++) {
311 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
318 phys_page_compact(&p
[i
], nodes
);
322 /* We can only compress if there's only one child. */
327 assert(valid_ptr
< P_L2_SIZE
);
329 /* Don't compress if it won't fit in the # of bits we have. */
330 if (lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 3)) {
334 lp
->ptr
= p
[valid_ptr
].ptr
;
335 if (!p
[valid_ptr
].skip
) {
336 /* If our only child is a leaf, make this a leaf. */
337 /* By design, we should have made this node a leaf to begin with so we
338 * should never reach here.
339 * But since it's so simple to handle this, let's do it just in case we
344 lp
->skip
+= p
[valid_ptr
].skip
;
348 static void phys_page_compact_all(AddressSpaceDispatch
*d
, int nodes_nb
)
350 if (d
->phys_map
.skip
) {
351 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
355 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
358 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
359 * the section must cover the entire address space.
361 return int128_gethi(section
->size
) ||
362 range_covers_byte(section
->offset_within_address_space
,
363 int128_getlo(section
->size
), addr
);
366 static MemoryRegionSection
*phys_page_find(PhysPageEntry lp
, hwaddr addr
,
367 Node
*nodes
, MemoryRegionSection
*sections
)
370 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
373 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
374 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
375 return §ions
[PHYS_SECTION_UNASSIGNED
];
378 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
381 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
382 return §ions
[lp
.ptr
];
384 return §ions
[PHYS_SECTION_UNASSIGNED
];
388 bool memory_region_is_unassigned(MemoryRegion
*mr
)
390 return mr
!= &io_mem_rom
&& mr
!= &io_mem_notdirty
&& !mr
->rom_device
391 && mr
!= &io_mem_watch
;
394 /* Called from RCU critical section */
395 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
397 bool resolve_subpage
)
399 MemoryRegionSection
*section
= atomic_read(&d
->mru_section
);
403 if (section
&& section
!= &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] &&
404 section_covers_addr(section
, addr
)) {
407 section
= phys_page_find(d
->phys_map
, addr
, d
->map
.nodes
,
411 if (resolve_subpage
&& section
->mr
->subpage
) {
412 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
413 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
416 atomic_set(&d
->mru_section
, section
);
421 /* Called from RCU critical section */
422 static MemoryRegionSection
*
423 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
424 hwaddr
*plen
, bool resolve_subpage
)
426 MemoryRegionSection
*section
;
430 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
431 /* Compute offset within MemoryRegionSection */
432 addr
-= section
->offset_within_address_space
;
434 /* Compute offset within MemoryRegion */
435 *xlat
= addr
+ section
->offset_within_region
;
439 /* MMIO registers can be expected to perform full-width accesses based only
440 * on their address, without considering adjacent registers that could
441 * decode to completely different MemoryRegions. When such registers
442 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
443 * regions overlap wildly. For this reason we cannot clamp the accesses
446 * If the length is small (as is the case for address_space_ldl/stl),
447 * everything works fine. If the incoming length is large, however,
448 * the caller really has to do the clamping through memory_access_size.
450 if (memory_region_is_ram(mr
)) {
451 diff
= int128_sub(section
->size
, int128_make64(addr
));
452 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
457 /* Called from RCU critical section */
458 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
461 IOMMUTLBEntry iotlb
= {0};
462 MemoryRegionSection
*section
;
466 AddressSpaceDispatch
*d
= atomic_rcu_read(&as
->dispatch
);
467 section
= address_space_lookup_region(d
, addr
, false);
468 addr
= addr
- section
->offset_within_address_space
469 + section
->offset_within_region
;
472 if (!mr
->iommu_ops
) {
476 iotlb
= mr
->iommu_ops
->translate(mr
, addr
, is_write
);
477 if (!(iotlb
.perm
& (1 << is_write
))) {
478 iotlb
.target_as
= NULL
;
482 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
483 | (addr
& iotlb
.addr_mask
));
484 as
= iotlb
.target_as
;
490 /* Called from RCU critical section */
491 MemoryRegion
*address_space_translate(AddressSpace
*as
, hwaddr addr
,
492 hwaddr
*xlat
, hwaddr
*plen
,
496 MemoryRegionSection
*section
;
500 AddressSpaceDispatch
*d
= atomic_rcu_read(&as
->dispatch
);
501 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, true);
504 if (!mr
->iommu_ops
) {
508 iotlb
= mr
->iommu_ops
->translate(mr
, addr
, is_write
);
509 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
510 | (addr
& iotlb
.addr_mask
));
511 *plen
= MIN(*plen
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
512 if (!(iotlb
.perm
& (1 << is_write
))) {
513 mr
= &io_mem_unassigned
;
517 as
= iotlb
.target_as
;
520 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
521 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
522 *plen
= MIN(page
, *plen
);
529 /* Called from RCU critical section */
530 MemoryRegionSection
*
531 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
532 hwaddr
*xlat
, hwaddr
*plen
)
534 MemoryRegionSection
*section
;
535 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
537 section
= address_space_translate_internal(d
, addr
, xlat
, plen
, false);
539 assert(!section
->mr
->iommu_ops
);
544 #if !defined(CONFIG_USER_ONLY)
546 static int cpu_common_post_load(void *opaque
, int version_id
)
548 CPUState
*cpu
= opaque
;
550 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
551 version_id is increased. */
552 cpu
->interrupt_request
&= ~0x01;
558 static int cpu_common_pre_load(void *opaque
)
560 CPUState
*cpu
= opaque
;
562 cpu
->exception_index
= -1;
567 static bool cpu_common_exception_index_needed(void *opaque
)
569 CPUState
*cpu
= opaque
;
571 return tcg_enabled() && cpu
->exception_index
!= -1;
574 static const VMStateDescription vmstate_cpu_common_exception_index
= {
575 .name
= "cpu_common/exception_index",
577 .minimum_version_id
= 1,
578 .needed
= cpu_common_exception_index_needed
,
579 .fields
= (VMStateField
[]) {
580 VMSTATE_INT32(exception_index
, CPUState
),
581 VMSTATE_END_OF_LIST()
585 static bool cpu_common_crash_occurred_needed(void *opaque
)
587 CPUState
*cpu
= opaque
;
589 return cpu
->crash_occurred
;
592 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
593 .name
= "cpu_common/crash_occurred",
595 .minimum_version_id
= 1,
596 .needed
= cpu_common_crash_occurred_needed
,
597 .fields
= (VMStateField
[]) {
598 VMSTATE_BOOL(crash_occurred
, CPUState
),
599 VMSTATE_END_OF_LIST()
603 const VMStateDescription vmstate_cpu_common
= {
604 .name
= "cpu_common",
606 .minimum_version_id
= 1,
607 .pre_load
= cpu_common_pre_load
,
608 .post_load
= cpu_common_post_load
,
609 .fields
= (VMStateField
[]) {
610 VMSTATE_UINT32(halted
, CPUState
),
611 VMSTATE_UINT32(interrupt_request
, CPUState
),
612 VMSTATE_END_OF_LIST()
614 .subsections
= (const VMStateDescription
*[]) {
615 &vmstate_cpu_common_exception_index
,
616 &vmstate_cpu_common_crash_occurred
,
623 CPUState
*qemu_get_cpu(int index
)
628 if (cpu
->cpu_index
== index
) {
636 #if !defined(CONFIG_USER_ONLY)
637 void cpu_address_space_init(CPUState
*cpu
, AddressSpace
*as
, int asidx
)
639 CPUAddressSpace
*newas
;
641 /* Target code should have set num_ases before calling us */
642 assert(asidx
< cpu
->num_ases
);
645 /* address space 0 gets the convenience alias */
649 /* KVM cannot currently support multiple address spaces. */
650 assert(asidx
== 0 || !kvm_enabled());
652 if (!cpu
->cpu_ases
) {
653 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
656 newas
= &cpu
->cpu_ases
[asidx
];
660 newas
->tcg_as_listener
.commit
= tcg_commit
;
661 memory_listener_register(&newas
->tcg_as_listener
, as
);
665 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
667 /* Return the AddressSpace corresponding to the specified index */
668 return cpu
->cpu_ases
[asidx
].as
;
672 void cpu_exec_unrealizefn(CPUState
*cpu
)
674 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
676 cpu_list_remove(cpu
);
678 if (cc
->vmsd
!= NULL
) {
679 vmstate_unregister(NULL
, cc
->vmsd
, cpu
);
681 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
682 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
686 void cpu_exec_initfn(CPUState
*cpu
)
691 #ifndef CONFIG_USER_ONLY
692 cpu
->thread_id
= qemu_get_thread_id();
694 /* This is a softmmu CPU object, so create a property for it
695 * so users can wire up its memory. (This can't go in qom/cpu.c
696 * because that file is compiled only once for both user-mode
697 * and system builds.) The default if no link is set up is to use
698 * the system address space.
700 object_property_add_link(OBJECT(cpu
), "memory", TYPE_MEMORY_REGION
,
701 (Object
**)&cpu
->memory
,
702 qdev_prop_allow_set_link_before_realize
,
703 OBJ_PROP_LINK_UNREF_ON_RELEASE
,
705 cpu
->memory
= system_memory
;
706 object_ref(OBJECT(cpu
->memory
));
710 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
712 CPUClass
*cc ATTRIBUTE_UNUSED
= CPU_GET_CLASS(cpu
);
716 #ifndef CONFIG_USER_ONLY
717 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
718 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
720 if (cc
->vmsd
!= NULL
) {
721 vmstate_register(NULL
, cpu
->cpu_index
, cc
->vmsd
, cpu
);
726 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
728 /* Flush the whole TB as this will not have race conditions
729 * even if we don't have proper locking yet.
730 * Ideally we would just invalidate the TBs for the
736 #if defined(CONFIG_USER_ONLY)
737 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
742 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
748 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
752 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
753 int flags
, CPUWatchpoint
**watchpoint
)
758 /* Add a watchpoint. */
759 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
760 int flags
, CPUWatchpoint
**watchpoint
)
764 /* forbid ranges which are empty or run off the end of the address space */
765 if (len
== 0 || (addr
+ len
- 1) < addr
) {
766 error_report("tried to set invalid watchpoint at %"
767 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
770 wp
= g_malloc(sizeof(*wp
));
776 /* keep all GDB-injected watchpoints in front */
777 if (flags
& BP_GDB
) {
778 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
780 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
783 tlb_flush_page(cpu
, addr
);
790 /* Remove a specific watchpoint. */
791 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
796 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
797 if (addr
== wp
->vaddr
&& len
== wp
->len
798 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
799 cpu_watchpoint_remove_by_ref(cpu
, wp
);
806 /* Remove a specific watchpoint by reference. */
807 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
809 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
811 tlb_flush_page(cpu
, watchpoint
->vaddr
);
816 /* Remove all matching watchpoints. */
817 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
819 CPUWatchpoint
*wp
, *next
;
821 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
822 if (wp
->flags
& mask
) {
823 cpu_watchpoint_remove_by_ref(cpu
, wp
);
828 /* Return true if this watchpoint address matches the specified
829 * access (ie the address range covered by the watchpoint overlaps
830 * partially or completely with the address range covered by the
833 static inline bool cpu_watchpoint_address_matches(CPUWatchpoint
*wp
,
837 /* We know the lengths are non-zero, but a little caution is
838 * required to avoid errors in the case where the range ends
839 * exactly at the top of the address space and so addr + len
840 * wraps round to zero.
842 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
843 vaddr addrend
= addr
+ len
- 1;
845 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
850 /* Add a breakpoint. */
851 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
852 CPUBreakpoint
**breakpoint
)
856 bp
= g_malloc(sizeof(*bp
));
861 /* keep all GDB-injected breakpoints in front */
862 if (flags
& BP_GDB
) {
863 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
865 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
868 breakpoint_invalidate(cpu
, pc
);
876 /* Remove a specific breakpoint. */
877 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
881 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
882 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
883 cpu_breakpoint_remove_by_ref(cpu
, bp
);
890 /* Remove a specific breakpoint by reference. */
891 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
893 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
895 breakpoint_invalidate(cpu
, breakpoint
->pc
);
900 /* Remove all matching breakpoints. */
901 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
903 CPUBreakpoint
*bp
, *next
;
905 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
906 if (bp
->flags
& mask
) {
907 cpu_breakpoint_remove_by_ref(cpu
, bp
);
912 /* enable or disable single step mode. EXCP_DEBUG is returned by the
913 CPU loop after each instruction */
914 void cpu_single_step(CPUState
*cpu
, int enabled
)
916 if (cpu
->singlestep_enabled
!= enabled
) {
917 cpu
->singlestep_enabled
= enabled
;
919 kvm_update_guest_debug(cpu
, 0);
921 /* must flush all the translated code to avoid inconsistencies */
922 /* XXX: only flush what is necessary */
928 void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
935 fprintf(stderr
, "qemu: fatal: ");
936 vfprintf(stderr
, fmt
, ap
);
937 fprintf(stderr
, "\n");
938 cpu_dump_state(cpu
, stderr
, fprintf
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
939 if (qemu_log_separate()) {
941 qemu_log("qemu: fatal: ");
942 qemu_log_vprintf(fmt
, ap2
);
944 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
952 #if defined(CONFIG_USER_ONLY)
954 struct sigaction act
;
955 sigfillset(&act
.sa_mask
);
956 act
.sa_handler
= SIG_DFL
;
957 sigaction(SIGABRT
, &act
, NULL
);
963 #if !defined(CONFIG_USER_ONLY)
964 /* Called from RCU critical section */
965 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
969 block
= atomic_rcu_read(&ram_list
.mru_block
);
970 if (block
&& addr
- block
->offset
< block
->max_length
) {
973 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
974 if (addr
- block
->offset
< block
->max_length
) {
979 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
983 /* It is safe to write mru_block outside the iothread lock. This
988 * xxx removed from list
992 * call_rcu(reclaim_ramblock, xxx);
995 * atomic_rcu_set is not needed here. The block was already published
996 * when it was placed into the list. Here we're just making an extra
997 * copy of the pointer.
999 ram_list
.mru_block
= block
;
1003 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1010 end
= TARGET_PAGE_ALIGN(start
+ length
);
1011 start
&= TARGET_PAGE_MASK
;
1014 block
= qemu_get_ram_block(start
);
1015 assert(block
== qemu_get_ram_block(end
- 1));
1016 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1018 tlb_reset_dirty(cpu
, start1
, length
);
1023 /* Note: start and end must be within the same ram block. */
1024 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1028 DirtyMemoryBlocks
*blocks
;
1029 unsigned long end
, page
;
1036 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1037 page
= start
>> TARGET_PAGE_BITS
;
1041 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1043 while (page
< end
) {
1044 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1045 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1046 unsigned long num
= MIN(end
- page
, DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1048 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1055 if (dirty
&& tcg_enabled()) {
1056 tlb_reset_dirty_range_all(start
, length
);
1062 /* Called from RCU critical section */
1063 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1064 MemoryRegionSection
*section
,
1066 hwaddr paddr
, hwaddr xlat
,
1068 target_ulong
*address
)
1073 if (memory_region_is_ram(section
->mr
)) {
1075 iotlb
= memory_region_get_ram_addr(section
->mr
) + xlat
;
1076 if (!section
->readonly
) {
1077 iotlb
|= PHYS_SECTION_NOTDIRTY
;
1079 iotlb
|= PHYS_SECTION_ROM
;
1082 AddressSpaceDispatch
*d
;
1084 d
= atomic_rcu_read(§ion
->address_space
->dispatch
);
1085 iotlb
= section
- d
->map
.sections
;
1089 /* Make accesses to pages with watchpoints go via the
1090 watchpoint trap routines. */
1091 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1092 if (cpu_watchpoint_address_matches(wp
, vaddr
, TARGET_PAGE_SIZE
)) {
1093 /* Avoid trapping reads of pages with a write breakpoint. */
1094 if ((prot
& PAGE_WRITE
) || (wp
->flags
& BP_MEM_READ
)) {
1095 iotlb
= PHYS_SECTION_WATCH
+ paddr
;
1096 *address
|= TLB_MMIO
;
1104 #endif /* defined(CONFIG_USER_ONLY) */
1106 #if !defined(CONFIG_USER_ONLY)
1108 static int subpage_register (subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1110 static subpage_t
*subpage_init(AddressSpace
*as
, hwaddr base
);
1112 static void *(*phys_mem_alloc
)(size_t size
, uint64_t *align
) =
1113 qemu_anon_ram_alloc
;
1116 * Set a custom physical guest memory alloator.
1117 * Accelerators with unusual needs may need this. Hopefully, we can
1118 * get rid of it eventually.
1120 void phys_mem_set_alloc(void *(*alloc
)(size_t, uint64_t *align
))
1122 phys_mem_alloc
= alloc
;
1125 static uint16_t phys_section_add(PhysPageMap
*map
,
1126 MemoryRegionSection
*section
)
1128 /* The physical section number is ORed with a page-aligned
1129 * pointer to produce the iotlb entries. Thus it should
1130 * never overflow into the page-aligned value.
1132 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1134 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1135 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1136 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1137 map
->sections_nb_alloc
);
1139 map
->sections
[map
->sections_nb
] = *section
;
1140 memory_region_ref(section
->mr
);
1141 return map
->sections_nb
++;
1144 static void phys_section_destroy(MemoryRegion
*mr
)
1146 bool have_sub_page
= mr
->subpage
;
1148 memory_region_unref(mr
);
1150 if (have_sub_page
) {
1151 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1152 object_unref(OBJECT(&subpage
->iomem
));
1157 static void phys_sections_free(PhysPageMap
*map
)
1159 while (map
->sections_nb
> 0) {
1160 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1161 phys_section_destroy(section
->mr
);
1163 g_free(map
->sections
);
1167 static void register_subpage(AddressSpaceDispatch
*d
, MemoryRegionSection
*section
)
1170 hwaddr base
= section
->offset_within_address_space
1172 MemoryRegionSection
*existing
= phys_page_find(d
->phys_map
, base
,
1173 d
->map
.nodes
, d
->map
.sections
);
1174 MemoryRegionSection subsection
= {
1175 .offset_within_address_space
= base
,
1176 .size
= int128_make64(TARGET_PAGE_SIZE
),
1180 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1182 if (!(existing
->mr
->subpage
)) {
1183 subpage
= subpage_init(d
->as
, base
);
1184 subsection
.address_space
= d
->as
;
1185 subsection
.mr
= &subpage
->iomem
;
1186 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1187 phys_section_add(&d
->map
, &subsection
));
1189 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1191 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1192 end
= start
+ int128_get64(section
->size
) - 1;
1193 subpage_register(subpage
, start
, end
,
1194 phys_section_add(&d
->map
, section
));
1198 static void register_multipage(AddressSpaceDispatch
*d
,
1199 MemoryRegionSection
*section
)
1201 hwaddr start_addr
= section
->offset_within_address_space
;
1202 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1203 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1207 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1210 static void mem_add(MemoryListener
*listener
, MemoryRegionSection
*section
)
1212 AddressSpace
*as
= container_of(listener
, AddressSpace
, dispatch_listener
);
1213 AddressSpaceDispatch
*d
= as
->next_dispatch
;
1214 MemoryRegionSection now
= *section
, remain
= *section
;
1215 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1217 if (now
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1218 uint64_t left
= TARGET_PAGE_ALIGN(now
.offset_within_address_space
)
1219 - now
.offset_within_address_space
;
1221 now
.size
= int128_min(int128_make64(left
), now
.size
);
1222 register_subpage(d
, &now
);
1224 now
.size
= int128_zero();
1226 while (int128_ne(remain
.size
, now
.size
)) {
1227 remain
.size
= int128_sub(remain
.size
, now
.size
);
1228 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1229 remain
.offset_within_region
+= int128_get64(now
.size
);
1231 if (int128_lt(remain
.size
, page_size
)) {
1232 register_subpage(d
, &now
);
1233 } else if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1234 now
.size
= page_size
;
1235 register_subpage(d
, &now
);
1237 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1238 register_multipage(d
, &now
);
1243 void qemu_flush_coalesced_mmio_buffer(void)
1246 kvm_flush_coalesced_mmio_buffer();
1249 void qemu_mutex_lock_ramlist(void)
1251 qemu_mutex_lock(&ram_list
.mutex
);
1254 void qemu_mutex_unlock_ramlist(void)
1256 qemu_mutex_unlock(&ram_list
.mutex
);
1260 static int64_t get_file_size(int fd
)
1262 int64_t size
= lseek(fd
, 0, SEEK_END
);
1269 static void *file_ram_alloc(RAMBlock
*block
,
1274 bool unlink_on_error
= false;
1276 char *sanitized_name
;
1278 void *area
= MAP_FAILED
;
1282 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1284 "host lacks kvm mmu notifiers, -mem-path unsupported");
1289 fd
= open(path
, O_RDWR
);
1291 /* @path names an existing file, use it */
1294 if (errno
== ENOENT
) {
1295 /* @path names a file that doesn't exist, create it */
1296 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1298 unlink_on_error
= true;
1301 } else if (errno
== EISDIR
) {
1302 /* @path names a directory, create a file there */
1303 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1304 sanitized_name
= g_strdup(memory_region_name(block
->mr
));
1305 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1311 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1313 g_free(sanitized_name
);
1315 fd
= mkstemp(filename
);
1323 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1324 error_setg_errno(errp
, errno
,
1325 "can't open backing store %s for guest RAM",
1330 * Try again on EINTR and EEXIST. The latter happens when
1331 * something else creates the file between our two open().
1335 block
->page_size
= qemu_fd_getpagesize(fd
);
1336 block
->mr
->align
= block
->page_size
;
1337 #if defined(__s390x__)
1338 if (kvm_enabled()) {
1339 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1343 file_size
= get_file_size(fd
);
1345 if (memory
< block
->page_size
) {
1346 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1347 "or larger than page size 0x%zx",
1348 memory
, block
->page_size
);
1352 if (file_size
> 0 && file_size
< memory
) {
1353 error_setg(errp
, "backing store %s size 0x%" PRIx64
1354 " does not match 'size' option 0x" RAM_ADDR_FMT
,
1355 path
, file_size
, memory
);
1359 memory
= ROUND_UP(memory
, block
->page_size
);
1362 * ftruncate is not supported by hugetlbfs in older
1363 * hosts, so don't bother bailing out on errors.
1364 * If anything goes wrong with it under other filesystems,
1367 * Do not truncate the non-empty backend file to avoid corrupting
1368 * the existing data in the file. Disabling shrinking is not
1369 * enough. For example, the current vNVDIMM implementation stores
1370 * the guest NVDIMM labels at the end of the backend file. If the
1371 * backend file is later extended, QEMU will not be able to find
1372 * those labels. Therefore, extending the non-empty backend file
1373 * is disabled as well.
1375 if (!file_size
&& ftruncate(fd
, memory
)) {
1376 perror("ftruncate");
1379 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
,
1380 block
->flags
& RAM_SHARED
);
1381 if (area
== MAP_FAILED
) {
1382 error_setg_errno(errp
, errno
,
1383 "unable to map backing store for guest RAM");
1388 os_mem_prealloc(fd
, area
, memory
, errp
);
1389 if (errp
&& *errp
) {
1398 if (area
!= MAP_FAILED
) {
1399 qemu_ram_munmap(area
, memory
);
1401 if (unlink_on_error
) {
1411 /* Called with the ramlist lock held. */
1412 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1414 RAMBlock
*block
, *next_block
;
1415 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1417 assert(size
!= 0); /* it would hand out same offset multiple times */
1419 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1423 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
1424 ram_addr_t end
, next
= RAM_ADDR_MAX
;
1426 end
= block
->offset
+ block
->max_length
;
1428 QLIST_FOREACH_RCU(next_block
, &ram_list
.blocks
, next
) {
1429 if (next_block
->offset
>= end
) {
1430 next
= MIN(next
, next_block
->offset
);
1433 if (next
- end
>= size
&& next
- end
< mingap
) {
1435 mingap
= next
- end
;
1439 if (offset
== RAM_ADDR_MAX
) {
1440 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1448 ram_addr_t
last_ram_offset(void)
1451 ram_addr_t last
= 0;
1454 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
1455 last
= MAX(last
, block
->offset
+ block
->max_length
);
1461 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1465 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1466 if (!machine_dump_guest_core(current_machine
)) {
1467 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1469 perror("qemu_madvise");
1470 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1471 "but dump_guest_core=off specified\n");
1476 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1481 /* Called with iothread lock held. */
1482 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
1487 assert(!new_block
->idstr
[0]);
1490 char *id
= qdev_get_dev_path(dev
);
1492 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
1496 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
1499 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
1500 if (block
!= new_block
&&
1501 !strcmp(block
->idstr
, new_block
->idstr
)) {
1502 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
1510 /* Called with iothread lock held. */
1511 void qemu_ram_unset_idstr(RAMBlock
*block
)
1513 /* FIXME: arch_init.c assumes that this is not called throughout
1514 * migration. Ignore the problem since hot-unplug during migration
1515 * does not work anyway.
1518 memset(block
->idstr
, 0, sizeof(block
->idstr
));
1522 size_t qemu_ram_pagesize(RAMBlock
*rb
)
1524 return rb
->page_size
;
1527 static int memory_try_enable_merging(void *addr
, size_t len
)
1529 if (!machine_mem_merge(current_machine
)) {
1530 /* disabled by the user */
1534 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
1537 /* Only legal before guest might have detected the memory size: e.g. on
1538 * incoming migration, or right after reset.
1540 * As memory core doesn't know how is memory accessed, it is up to
1541 * resize callback to update device state and/or add assertions to detect
1542 * misuse, if necessary.
1544 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
1548 newsize
= HOST_PAGE_ALIGN(newsize
);
1550 if (block
->used_length
== newsize
) {
1554 if (!(block
->flags
& RAM_RESIZEABLE
)) {
1555 error_setg_errno(errp
, EINVAL
,
1556 "Length mismatch: %s: 0x" RAM_ADDR_FMT
1557 " in != 0x" RAM_ADDR_FMT
, block
->idstr
,
1558 newsize
, block
->used_length
);
1562 if (block
->max_length
< newsize
) {
1563 error_setg_errno(errp
, EINVAL
,
1564 "Length too large: %s: 0x" RAM_ADDR_FMT
1565 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
1566 newsize
, block
->max_length
);
1570 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
1571 block
->used_length
= newsize
;
1572 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
1574 memory_region_set_size(block
->mr
, newsize
);
1575 if (block
->resized
) {
1576 block
->resized(block
->idstr
, newsize
, block
->host
);
1581 /* Called with ram_list.mutex held */
1582 static void dirty_memory_extend(ram_addr_t old_ram_size
,
1583 ram_addr_t new_ram_size
)
1585 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
1586 DIRTY_MEMORY_BLOCK_SIZE
);
1587 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
1588 DIRTY_MEMORY_BLOCK_SIZE
);
1591 /* Only need to extend if block count increased */
1592 if (new_num_blocks
<= old_num_blocks
) {
1596 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
1597 DirtyMemoryBlocks
*old_blocks
;
1598 DirtyMemoryBlocks
*new_blocks
;
1601 old_blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[i
]);
1602 new_blocks
= g_malloc(sizeof(*new_blocks
) +
1603 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
1605 if (old_num_blocks
) {
1606 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
1607 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
1610 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
1611 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
1614 atomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
1617 g_free_rcu(old_blocks
, rcu
);
1622 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
)
1625 RAMBlock
*last_block
= NULL
;
1626 ram_addr_t old_ram_size
, new_ram_size
;
1629 old_ram_size
= last_ram_offset() >> TARGET_PAGE_BITS
;
1631 qemu_mutex_lock_ramlist();
1632 new_block
->offset
= find_ram_offset(new_block
->max_length
);
1634 if (!new_block
->host
) {
1635 if (xen_enabled()) {
1636 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
1637 new_block
->mr
, &err
);
1639 error_propagate(errp
, err
);
1640 qemu_mutex_unlock_ramlist();
1644 new_block
->host
= phys_mem_alloc(new_block
->max_length
,
1645 &new_block
->mr
->align
);
1646 if (!new_block
->host
) {
1647 error_setg_errno(errp
, errno
,
1648 "cannot set up guest memory '%s'",
1649 memory_region_name(new_block
->mr
));
1650 qemu_mutex_unlock_ramlist();
1653 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
1657 new_ram_size
= MAX(old_ram_size
,
1658 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
1659 if (new_ram_size
> old_ram_size
) {
1660 migration_bitmap_extend(old_ram_size
, new_ram_size
);
1661 dirty_memory_extend(old_ram_size
, new_ram_size
);
1663 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1664 * QLIST (which has an RCU-friendly variant) does not have insertion at
1665 * tail, so save the last element in last_block.
1667 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
1669 if (block
->max_length
< new_block
->max_length
) {
1674 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
1675 } else if (last_block
) {
1676 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
1677 } else { /* list is empty */
1678 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
1680 ram_list
.mru_block
= NULL
;
1682 /* Write list before version */
1685 qemu_mutex_unlock_ramlist();
1687 cpu_physical_memory_set_dirty_range(new_block
->offset
,
1688 new_block
->used_length
,
1691 if (new_block
->host
) {
1692 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
1693 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
1694 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
1695 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_DONTFORK
);
1696 ram_block_notify_add(new_block
->host
, new_block
->max_length
);
1701 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
1702 bool share
, const char *mem_path
,
1705 RAMBlock
*new_block
;
1706 Error
*local_err
= NULL
;
1708 if (xen_enabled()) {
1709 error_setg(errp
, "-mem-path not supported with Xen");
1713 if (phys_mem_alloc
!= qemu_anon_ram_alloc
) {
1715 * file_ram_alloc() needs to allocate just like
1716 * phys_mem_alloc, but we haven't bothered to provide
1720 "-mem-path not supported with this accelerator");
1724 size
= HOST_PAGE_ALIGN(size
);
1725 new_block
= g_malloc0(sizeof(*new_block
));
1727 new_block
->used_length
= size
;
1728 new_block
->max_length
= size
;
1729 new_block
->flags
= share
? RAM_SHARED
: 0;
1730 new_block
->host
= file_ram_alloc(new_block
, size
,
1732 if (!new_block
->host
) {
1737 ram_block_add(new_block
, &local_err
);
1740 error_propagate(errp
, local_err
);
1748 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
1749 void (*resized
)(const char*,
1752 void *host
, bool resizeable
,
1753 MemoryRegion
*mr
, Error
**errp
)
1755 RAMBlock
*new_block
;
1756 Error
*local_err
= NULL
;
1758 size
= HOST_PAGE_ALIGN(size
);
1759 max_size
= HOST_PAGE_ALIGN(max_size
);
1760 new_block
= g_malloc0(sizeof(*new_block
));
1762 new_block
->resized
= resized
;
1763 new_block
->used_length
= size
;
1764 new_block
->max_length
= max_size
;
1765 assert(max_size
>= size
);
1767 new_block
->page_size
= getpagesize();
1768 new_block
->host
= host
;
1770 new_block
->flags
|= RAM_PREALLOC
;
1773 new_block
->flags
|= RAM_RESIZEABLE
;
1775 ram_block_add(new_block
, &local_err
);
1778 error_propagate(errp
, local_err
);
1784 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
1785 MemoryRegion
*mr
, Error
**errp
)
1787 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, false, mr
, errp
);
1790 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, MemoryRegion
*mr
, Error
**errp
)
1792 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, false, mr
, errp
);
1795 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
1796 void (*resized
)(const char*,
1799 MemoryRegion
*mr
, Error
**errp
)
1801 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
, true, mr
, errp
);
1804 static void reclaim_ramblock(RAMBlock
*block
)
1806 if (block
->flags
& RAM_PREALLOC
) {
1808 } else if (xen_enabled()) {
1809 xen_invalidate_map_cache_entry(block
->host
);
1811 } else if (block
->fd
>= 0) {
1812 qemu_ram_munmap(block
->host
, block
->max_length
);
1816 qemu_anon_ram_free(block
->host
, block
->max_length
);
1821 void qemu_ram_free(RAMBlock
*block
)
1828 ram_block_notify_remove(block
->host
, block
->max_length
);
1831 qemu_mutex_lock_ramlist();
1832 QLIST_REMOVE_RCU(block
, next
);
1833 ram_list
.mru_block
= NULL
;
1834 /* Write list before version */
1837 call_rcu(block
, reclaim_ramblock
, rcu
);
1838 qemu_mutex_unlock_ramlist();
1842 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
1849 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
1850 offset
= addr
- block
->offset
;
1851 if (offset
< block
->max_length
) {
1852 vaddr
= ramblock_ptr(block
, offset
);
1853 if (block
->flags
& RAM_PREALLOC
) {
1855 } else if (xen_enabled()) {
1859 if (block
->fd
>= 0) {
1860 flags
|= (block
->flags
& RAM_SHARED
?
1861 MAP_SHARED
: MAP_PRIVATE
);
1862 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
1863 flags
, block
->fd
, offset
);
1866 * Remap needs to match alloc. Accelerators that
1867 * set phys_mem_alloc never remap. If they did,
1868 * we'd need a remap hook here.
1870 assert(phys_mem_alloc
== qemu_anon_ram_alloc
);
1872 flags
|= MAP_PRIVATE
| MAP_ANONYMOUS
;
1873 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
1876 if (area
!= vaddr
) {
1877 fprintf(stderr
, "Could not remap addr: "
1878 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"\n",
1882 memory_try_enable_merging(vaddr
, length
);
1883 qemu_ram_setup_dump(vaddr
, length
);
1888 #endif /* !_WIN32 */
1890 /* Return a host pointer to ram allocated with qemu_ram_alloc.
1891 * This should not be used for general purpose DMA. Use address_space_map
1892 * or address_space_rw instead. For local memory (e.g. video ram) that the
1893 * device owns, use memory_region_get_ram_ptr.
1895 * Called within RCU critical section.
1897 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
1899 RAMBlock
*block
= ram_block
;
1901 if (block
== NULL
) {
1902 block
= qemu_get_ram_block(addr
);
1903 addr
-= block
->offset
;
1906 if (xen_enabled() && block
->host
== NULL
) {
1907 /* We need to check if the requested address is in the RAM
1908 * because we don't want to map the entire memory in QEMU.
1909 * In that case just map until the end of the page.
1911 if (block
->offset
== 0) {
1912 return xen_map_cache(addr
, 0, 0);
1915 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1);
1917 return ramblock_ptr(block
, addr
);
1920 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
1921 * but takes a size argument.
1923 * Called within RCU critical section.
1925 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
1928 RAMBlock
*block
= ram_block
;
1933 if (block
== NULL
) {
1934 block
= qemu_get_ram_block(addr
);
1935 addr
-= block
->offset
;
1937 *size
= MIN(*size
, block
->max_length
- addr
);
1939 if (xen_enabled() && block
->host
== NULL
) {
1940 /* We need to check if the requested address is in the RAM
1941 * because we don't want to map the entire memory in QEMU.
1942 * In that case just map the requested area.
1944 if (block
->offset
== 0) {
1945 return xen_map_cache(addr
, *size
, 1);
1948 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1);
1951 return ramblock_ptr(block
, addr
);
1955 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
1958 * ptr: Host pointer to look up
1959 * round_offset: If true round the result offset down to a page boundary
1960 * *ram_addr: set to result ram_addr
1961 * *offset: set to result offset within the RAMBlock
1963 * Returns: RAMBlock (or NULL if not found)
1965 * By the time this function returns, the returned pointer is not protected
1966 * by RCU anymore. If the caller is not within an RCU critical section and
1967 * does not hold the iothread lock, it must have other means of protecting the
1968 * pointer, such as a reference to the region that includes the incoming
1971 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
1975 uint8_t *host
= ptr
;
1977 if (xen_enabled()) {
1978 ram_addr_t ram_addr
;
1980 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
1981 block
= qemu_get_ram_block(ram_addr
);
1983 *offset
= ram_addr
- block
->offset
;
1990 block
= atomic_rcu_read(&ram_list
.mru_block
);
1991 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
1995 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
1996 /* This case append when the block is not mapped. */
1997 if (block
->host
== NULL
) {
2000 if (host
- block
->host
< block
->max_length
) {
2009 *offset
= (host
- block
->host
);
2011 *offset
&= TARGET_PAGE_MASK
;
2018 * Finds the named RAMBlock
2020 * name: The name of RAMBlock to find
2022 * Returns: RAMBlock (or NULL if not found)
2024 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2028 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
2029 if (!strcmp(name
, block
->idstr
)) {
2037 /* Some of the softmmu routines need to translate from a host pointer
2038 (typically a TLB entry) back to a ram offset. */
2039 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2044 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2046 return RAM_ADDR_INVALID
;
2049 return block
->offset
+ offset
;
2052 /* Called within RCU critical section. */
2053 static void notdirty_mem_write(void *opaque
, hwaddr ram_addr
,
2054 uint64_t val
, unsigned size
)
2056 bool locked
= false;
2058 if (!cpu_physical_memory_get_dirty_flag(ram_addr
, DIRTY_MEMORY_CODE
)) {
2061 tb_invalidate_phys_page_fast(ram_addr
, size
);
2065 stb_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2068 stw_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2071 stl_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2081 /* Set both VGA and migration bits for simplicity and to remove
2082 * the notdirty callback faster.
2084 cpu_physical_memory_set_dirty_range(ram_addr
, size
,
2085 DIRTY_CLIENTS_NOCODE
);
2086 /* we remove the notdirty callback only if the code has been
2088 if (!cpu_physical_memory_is_clean(ram_addr
)) {
2089 tlb_set_dirty(current_cpu
, current_cpu
->mem_io_vaddr
);
2093 static bool notdirty_mem_accepts(void *opaque
, hwaddr addr
,
2094 unsigned size
, bool is_write
)
2099 static const MemoryRegionOps notdirty_mem_ops
= {
2100 .write
= notdirty_mem_write
,
2101 .valid
.accepts
= notdirty_mem_accepts
,
2102 .endianness
= DEVICE_NATIVE_ENDIAN
,
2105 /* Generate a debug exception if a watchpoint has been hit. */
2106 static void check_watchpoint(int offset
, int len
, MemTxAttrs attrs
, int flags
)
2108 CPUState
*cpu
= current_cpu
;
2109 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
2110 CPUArchState
*env
= cpu
->env_ptr
;
2111 target_ulong pc
, cs_base
;
2116 if (cpu
->watchpoint_hit
) {
2117 /* We re-entered the check after replacing the TB. Now raise
2118 * the debug interrupt so that is will trigger after the
2119 * current instruction. */
2120 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
2123 vaddr
= (cpu
->mem_io_vaddr
& TARGET_PAGE_MASK
) + offset
;
2124 vaddr
= cc
->adjust_watchpoint_address(cpu
, vaddr
, len
);
2125 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
2126 if (cpu_watchpoint_address_matches(wp
, vaddr
, len
)
2127 && (wp
->flags
& flags
)) {
2128 if (flags
== BP_MEM_READ
) {
2129 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
2131 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
2133 wp
->hitaddr
= vaddr
;
2134 wp
->hitattrs
= attrs
;
2135 if (!cpu
->watchpoint_hit
) {
2136 if (wp
->flags
& BP_CPU
&&
2137 !cc
->debug_check_watchpoint(cpu
, wp
)) {
2138 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2141 cpu
->watchpoint_hit
= wp
;
2143 /* Both tb_lock and iothread_mutex will be reset when
2144 * cpu_loop_exit or cpu_loop_exit_noexc longjmp
2145 * back into the cpu_exec main loop.
2148 tb_check_watchpoint(cpu
);
2149 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
2150 cpu
->exception_index
= EXCP_DEBUG
;
2153 cpu_get_tb_cpu_state(env
, &pc
, &cs_base
, &cpu_flags
);
2154 tb_gen_code(cpu
, pc
, cs_base
, cpu_flags
, 1);
2155 cpu_loop_exit_noexc(cpu
);
2159 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2164 /* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2165 so these check for a hit then pass through to the normal out-of-line
2167 static MemTxResult
watch_mem_read(void *opaque
, hwaddr addr
, uint64_t *pdata
,
2168 unsigned size
, MemTxAttrs attrs
)
2172 int asidx
= cpu_asidx_from_attrs(current_cpu
, attrs
);
2173 AddressSpace
*as
= current_cpu
->cpu_ases
[asidx
].as
;
2175 check_watchpoint(addr
& ~TARGET_PAGE_MASK
, size
, attrs
, BP_MEM_READ
);
2178 data
= address_space_ldub(as
, addr
, attrs
, &res
);
2181 data
= address_space_lduw(as
, addr
, attrs
, &res
);
2184 data
= address_space_ldl(as
, addr
, attrs
, &res
);
2192 static MemTxResult
watch_mem_write(void *opaque
, hwaddr addr
,
2193 uint64_t val
, unsigned size
,
2197 int asidx
= cpu_asidx_from_attrs(current_cpu
, attrs
);
2198 AddressSpace
*as
= current_cpu
->cpu_ases
[asidx
].as
;
2200 check_watchpoint(addr
& ~TARGET_PAGE_MASK
, size
, attrs
, BP_MEM_WRITE
);
2203 address_space_stb(as
, addr
, val
, attrs
, &res
);
2206 address_space_stw(as
, addr
, val
, attrs
, &res
);
2209 address_space_stl(as
, addr
, val
, attrs
, &res
);
2216 static const MemoryRegionOps watch_mem_ops
= {
2217 .read_with_attrs
= watch_mem_read
,
2218 .write_with_attrs
= watch_mem_write
,
2219 .endianness
= DEVICE_NATIVE_ENDIAN
,
2222 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2223 unsigned len
, MemTxAttrs attrs
)
2225 subpage_t
*subpage
= opaque
;
2229 #if defined(DEBUG_SUBPAGE)
2230 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2231 subpage
, len
, addr
);
2233 res
= address_space_read(subpage
->as
, addr
+ subpage
->base
,
2240 *data
= ldub_p(buf
);
2243 *data
= lduw_p(buf
);
2256 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2257 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2259 subpage_t
*subpage
= opaque
;
2262 #if defined(DEBUG_SUBPAGE)
2263 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2264 " value %"PRIx64
"\n",
2265 __func__
, subpage
, len
, addr
, value
);
2283 return address_space_write(subpage
->as
, addr
+ subpage
->base
,
2287 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2288 unsigned len
, bool is_write
)
2290 subpage_t
*subpage
= opaque
;
2291 #if defined(DEBUG_SUBPAGE)
2292 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2293 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2296 return address_space_access_valid(subpage
->as
, addr
+ subpage
->base
,
2300 static const MemoryRegionOps subpage_ops
= {
2301 .read_with_attrs
= subpage_read
,
2302 .write_with_attrs
= subpage_write
,
2303 .impl
.min_access_size
= 1,
2304 .impl
.max_access_size
= 8,
2305 .valid
.min_access_size
= 1,
2306 .valid
.max_access_size
= 8,
2307 .valid
.accepts
= subpage_accepts
,
2308 .endianness
= DEVICE_NATIVE_ENDIAN
,
2311 static int subpage_register (subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2316 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2318 idx
= SUBPAGE_IDX(start
);
2319 eidx
= SUBPAGE_IDX(end
);
2320 #if defined(DEBUG_SUBPAGE)
2321 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2322 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2324 for (; idx
<= eidx
; idx
++) {
2325 mmio
->sub_section
[idx
] = section
;
2331 static subpage_t
*subpage_init(AddressSpace
*as
, hwaddr base
)
2335 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2338 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2339 NULL
, TARGET_PAGE_SIZE
);
2340 mmio
->iomem
.subpage
= true;
2341 #if defined(DEBUG_SUBPAGE)
2342 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2343 mmio
, base
, TARGET_PAGE_SIZE
);
2345 subpage_register(mmio
, 0, TARGET_PAGE_SIZE
-1, PHYS_SECTION_UNASSIGNED
);
2350 static uint16_t dummy_section(PhysPageMap
*map
, AddressSpace
*as
,
2354 MemoryRegionSection section
= {
2355 .address_space
= as
,
2357 .offset_within_address_space
= 0,
2358 .offset_within_region
= 0,
2359 .size
= int128_2_64(),
2362 return phys_section_add(map
, §ion
);
2365 MemoryRegion
*iotlb_to_region(CPUState
*cpu
, hwaddr index
, MemTxAttrs attrs
)
2367 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2368 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2369 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpuas
->memory_dispatch
);
2370 MemoryRegionSection
*sections
= d
->map
.sections
;
2372 return sections
[index
& ~TARGET_PAGE_MASK
].mr
;
2375 static void io_mem_init(void)
2377 memory_region_init_io(&io_mem_rom
, NULL
, &unassigned_mem_ops
, NULL
, NULL
, UINT64_MAX
);
2378 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2381 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
2382 * which can be called without the iothread mutex.
2384 memory_region_init_io(&io_mem_notdirty
, NULL
, ¬dirty_mem_ops
, NULL
,
2386 memory_region_clear_global_locking(&io_mem_notdirty
);
2388 memory_region_init_io(&io_mem_watch
, NULL
, &watch_mem_ops
, NULL
,
2392 static void mem_begin(MemoryListener
*listener
)
2394 AddressSpace
*as
= container_of(listener
, AddressSpace
, dispatch_listener
);
2395 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2398 n
= dummy_section(&d
->map
, as
, &io_mem_unassigned
);
2399 assert(n
== PHYS_SECTION_UNASSIGNED
);
2400 n
= dummy_section(&d
->map
, as
, &io_mem_notdirty
);
2401 assert(n
== PHYS_SECTION_NOTDIRTY
);
2402 n
= dummy_section(&d
->map
, as
, &io_mem_rom
);
2403 assert(n
== PHYS_SECTION_ROM
);
2404 n
= dummy_section(&d
->map
, as
, &io_mem_watch
);
2405 assert(n
== PHYS_SECTION_WATCH
);
2407 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2409 as
->next_dispatch
= d
;
2412 static void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2414 phys_sections_free(&d
->map
);
2418 static void mem_commit(MemoryListener
*listener
)
2420 AddressSpace
*as
= container_of(listener
, AddressSpace
, dispatch_listener
);
2421 AddressSpaceDispatch
*cur
= as
->dispatch
;
2422 AddressSpaceDispatch
*next
= as
->next_dispatch
;
2424 phys_page_compact_all(next
, next
->map
.nodes_nb
);
2426 atomic_rcu_set(&as
->dispatch
, next
);
2428 call_rcu(cur
, address_space_dispatch_free
, rcu
);
2432 static void tcg_commit(MemoryListener
*listener
)
2434 CPUAddressSpace
*cpuas
;
2435 AddressSpaceDispatch
*d
;
2437 /* since each CPU stores ram addresses in its TLB cache, we must
2438 reset the modified entries */
2439 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2440 cpu_reloading_memory_map();
2441 /* The CPU and TLB are protected by the iothread lock.
2442 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2443 * may have split the RCU critical section.
2445 d
= atomic_rcu_read(&cpuas
->as
->dispatch
);
2446 atomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2447 tlb_flush(cpuas
->cpu
);
2450 void address_space_init_dispatch(AddressSpace
*as
)
2452 as
->dispatch
= NULL
;
2453 as
->dispatch_listener
= (MemoryListener
) {
2455 .commit
= mem_commit
,
2456 .region_add
= mem_add
,
2457 .region_nop
= mem_add
,
2460 memory_listener_register(&as
->dispatch_listener
, as
);
2463 void address_space_unregister(AddressSpace
*as
)
2465 memory_listener_unregister(&as
->dispatch_listener
);
2468 void address_space_destroy_dispatch(AddressSpace
*as
)
2470 AddressSpaceDispatch
*d
= as
->dispatch
;
2472 atomic_rcu_set(&as
->dispatch
, NULL
);
2474 call_rcu(d
, address_space_dispatch_free
, rcu
);
2478 static void memory_map_init(void)
2480 system_memory
= g_malloc(sizeof(*system_memory
));
2482 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2483 address_space_init(&address_space_memory
, system_memory
, "memory");
2485 system_io
= g_malloc(sizeof(*system_io
));
2486 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2488 address_space_init(&address_space_io
, system_io
, "I/O");
2491 MemoryRegion
*get_system_memory(void)
2493 return system_memory
;
2496 MemoryRegion
*get_system_io(void)
2501 #endif /* !defined(CONFIG_USER_ONLY) */
2503 /* physical memory access (slow version, mainly for debug) */
2504 #if defined(CONFIG_USER_ONLY)
2505 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
2506 uint8_t *buf
, int len
, int is_write
)
2513 page
= addr
& TARGET_PAGE_MASK
;
2514 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
2517 flags
= page_get_flags(page
);
2518 if (!(flags
& PAGE_VALID
))
2521 if (!(flags
& PAGE_WRITE
))
2523 /* XXX: this code should not depend on lock_user */
2524 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
2527 unlock_user(p
, addr
, l
);
2529 if (!(flags
& PAGE_READ
))
2531 /* XXX: this code should not depend on lock_user */
2532 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
2535 unlock_user(p
, addr
, 0);
2546 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
2549 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
2550 addr
+= memory_region_get_ram_addr(mr
);
2552 /* No early return if dirty_log_mask is or becomes 0, because
2553 * cpu_physical_memory_set_dirty_range will still call
2554 * xen_modified_memory.
2556 if (dirty_log_mask
) {
2558 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
2560 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
2562 tb_invalidate_phys_range(addr
, addr
+ length
);
2564 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
2566 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
2569 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
2571 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
2573 /* Regions are assumed to support 1-4 byte accesses unless
2574 otherwise specified. */
2575 if (access_size_max
== 0) {
2576 access_size_max
= 4;
2579 /* Bound the maximum access by the alignment of the address. */
2580 if (!mr
->ops
->impl
.unaligned
) {
2581 unsigned align_size_max
= addr
& -addr
;
2582 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
2583 access_size_max
= align_size_max
;
2587 /* Don't attempt accesses larger than the maximum. */
2588 if (l
> access_size_max
) {
2589 l
= access_size_max
;
2596 static bool prepare_mmio_access(MemoryRegion
*mr
)
2598 bool unlocked
= !qemu_mutex_iothread_locked();
2599 bool release_lock
= false;
2601 if (unlocked
&& mr
->global_locking
) {
2602 qemu_mutex_lock_iothread();
2604 release_lock
= true;
2606 if (mr
->flush_coalesced_mmio
) {
2608 qemu_mutex_lock_iothread();
2610 qemu_flush_coalesced_mmio_buffer();
2612 qemu_mutex_unlock_iothread();
2616 return release_lock
;
2619 /* Called within RCU critical section. */
2620 static MemTxResult
address_space_write_continue(AddressSpace
*as
, hwaddr addr
,
2623 int len
, hwaddr addr1
,
2624 hwaddr l
, MemoryRegion
*mr
)
2628 MemTxResult result
= MEMTX_OK
;
2629 bool release_lock
= false;
2632 if (!memory_access_is_direct(mr
, true)) {
2633 release_lock
|= prepare_mmio_access(mr
);
2634 l
= memory_access_size(mr
, l
, addr1
);
2635 /* XXX: could force current_cpu to NULL to avoid
2639 /* 64 bit write access */
2641 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 8,
2645 /* 32 bit write access */
2646 val
= (uint32_t)ldl_p(buf
);
2647 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 4,
2651 /* 16 bit write access */
2653 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 2,
2657 /* 8 bit write access */
2659 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 1,
2667 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
2668 memcpy(ptr
, buf
, l
);
2669 invalidate_and_set_dirty(mr
, addr1
, l
);
2673 qemu_mutex_unlock_iothread();
2674 release_lock
= false;
2686 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true);
2692 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
2693 const uint8_t *buf
, int len
)
2698 MemTxResult result
= MEMTX_OK
;
2703 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true);
2704 result
= address_space_write_continue(as
, addr
, attrs
, buf
, len
,
2712 /* Called within RCU critical section. */
2713 MemTxResult
address_space_read_continue(AddressSpace
*as
, hwaddr addr
,
2714 MemTxAttrs attrs
, uint8_t *buf
,
2715 int len
, hwaddr addr1
, hwaddr l
,
2720 MemTxResult result
= MEMTX_OK
;
2721 bool release_lock
= false;
2724 if (!memory_access_is_direct(mr
, false)) {
2726 release_lock
|= prepare_mmio_access(mr
);
2727 l
= memory_access_size(mr
, l
, addr1
);
2730 /* 64 bit read access */
2731 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 8,
2736 /* 32 bit read access */
2737 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 4,
2742 /* 16 bit read access */
2743 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 2,
2748 /* 8 bit read access */
2749 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 1,
2758 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
2759 memcpy(buf
, ptr
, l
);
2763 qemu_mutex_unlock_iothread();
2764 release_lock
= false;
2776 mr
= address_space_translate(as
, addr
, &addr1
, &l
, false);
2782 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
2783 MemTxAttrs attrs
, uint8_t *buf
, int len
)
2788 MemTxResult result
= MEMTX_OK
;
2793 mr
= address_space_translate(as
, addr
, &addr1
, &l
, false);
2794 result
= address_space_read_continue(as
, addr
, attrs
, buf
, len
,
2802 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
2803 uint8_t *buf
, int len
, bool is_write
)
2806 return address_space_write(as
, addr
, attrs
, (uint8_t *)buf
, len
);
2808 return address_space_read(as
, addr
, attrs
, (uint8_t *)buf
, len
);
2812 void cpu_physical_memory_rw(hwaddr addr
, uint8_t *buf
,
2813 int len
, int is_write
)
2815 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
2816 buf
, len
, is_write
);
2819 enum write_rom_type
{
2824 static inline void cpu_physical_memory_write_rom_internal(AddressSpace
*as
,
2825 hwaddr addr
, const uint8_t *buf
, int len
, enum write_rom_type type
)
2835 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true);
2837 if (!(memory_region_is_ram(mr
) ||
2838 memory_region_is_romd(mr
))) {
2839 l
= memory_access_size(mr
, l
, addr1
);
2842 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
2845 memcpy(ptr
, buf
, l
);
2846 invalidate_and_set_dirty(mr
, addr1
, l
);
2849 flush_icache_range((uintptr_t)ptr
, (uintptr_t)ptr
+ l
);
2860 /* used for ROM loading : can write in RAM and ROM */
2861 void cpu_physical_memory_write_rom(AddressSpace
*as
, hwaddr addr
,
2862 const uint8_t *buf
, int len
)
2864 cpu_physical_memory_write_rom_internal(as
, addr
, buf
, len
, WRITE_DATA
);
2867 void cpu_flush_icache_range(hwaddr start
, int len
)
2870 * This function should do the same thing as an icache flush that was
2871 * triggered from within the guest. For TCG we are always cache coherent,
2872 * so there is no need to flush anything. For KVM / Xen we need to flush
2873 * the host's instruction cache at least.
2875 if (tcg_enabled()) {
2879 cpu_physical_memory_write_rom_internal(&address_space_memory
,
2880 start
, NULL
, len
, FLUSH_CACHE
);
2891 static BounceBuffer bounce
;
2893 typedef struct MapClient
{
2895 QLIST_ENTRY(MapClient
) link
;
2898 QemuMutex map_client_list_lock
;
2899 static QLIST_HEAD(map_client_list
, MapClient
) map_client_list
2900 = QLIST_HEAD_INITIALIZER(map_client_list
);
2902 static void cpu_unregister_map_client_do(MapClient
*client
)
2904 QLIST_REMOVE(client
, link
);
2908 static void cpu_notify_map_clients_locked(void)
2912 while (!QLIST_EMPTY(&map_client_list
)) {
2913 client
= QLIST_FIRST(&map_client_list
);
2914 qemu_bh_schedule(client
->bh
);
2915 cpu_unregister_map_client_do(client
);
2919 void cpu_register_map_client(QEMUBH
*bh
)
2921 MapClient
*client
= g_malloc(sizeof(*client
));
2923 qemu_mutex_lock(&map_client_list_lock
);
2925 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
2926 if (!atomic_read(&bounce
.in_use
)) {
2927 cpu_notify_map_clients_locked();
2929 qemu_mutex_unlock(&map_client_list_lock
);
2932 void cpu_exec_init_all(void)
2934 qemu_mutex_init(&ram_list
.mutex
);
2935 /* The data structures we set up here depend on knowing the page size,
2936 * so no more changes can be made after this point.
2937 * In an ideal world, nothing we did before we had finished the
2938 * machine setup would care about the target page size, and we could
2939 * do this much later, rather than requiring board models to state
2940 * up front what their requirements are.
2942 finalize_target_page_bits();
2945 qemu_mutex_init(&map_client_list_lock
);
2948 void cpu_unregister_map_client(QEMUBH
*bh
)
2952 qemu_mutex_lock(&map_client_list_lock
);
2953 QLIST_FOREACH(client
, &map_client_list
, link
) {
2954 if (client
->bh
== bh
) {
2955 cpu_unregister_map_client_do(client
);
2959 qemu_mutex_unlock(&map_client_list_lock
);
2962 static void cpu_notify_map_clients(void)
2964 qemu_mutex_lock(&map_client_list_lock
);
2965 cpu_notify_map_clients_locked();
2966 qemu_mutex_unlock(&map_client_list_lock
);
2969 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
, int len
, bool is_write
)
2977 mr
= address_space_translate(as
, addr
, &xlat
, &l
, is_write
);
2978 if (!memory_access_is_direct(mr
, is_write
)) {
2979 l
= memory_access_size(mr
, l
, addr
);
2980 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
)) {
2994 address_space_extend_translation(AddressSpace
*as
, hwaddr addr
, hwaddr target_len
,
2995 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3000 MemoryRegion
*this_mr
;
3006 if (target_len
== 0) {
3011 this_mr
= address_space_translate(as
, addr
, &xlat
, &len
, is_write
);
3012 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3018 /* Map a physical memory region into a host virtual address.
3019 * May map a subset of the requested range, given by and returned in *plen.
3020 * May return NULL if resources needed to perform the mapping are exhausted.
3021 * Use only for reads OR writes - not for read-modify-write operations.
3022 * Use cpu_register_map_client() to know when retrying the map operation is
3023 * likely to succeed.
3025 void *address_space_map(AddressSpace
*as
,
3041 mr
= address_space_translate(as
, addr
, &xlat
, &l
, is_write
);
3043 if (!memory_access_is_direct(mr
, is_write
)) {
3044 if (atomic_xchg(&bounce
.in_use
, true)) {
3048 /* Avoid unbounded allocations */
3049 l
= MIN(l
, TARGET_PAGE_SIZE
);
3050 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3054 memory_region_ref(mr
);
3057 address_space_read(as
, addr
, MEMTXATTRS_UNSPECIFIED
,
3063 return bounce
.buffer
;
3067 memory_region_ref(mr
);
3068 *plen
= address_space_extend_translation(as
, addr
, len
, mr
, xlat
, l
, is_write
);
3069 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
);
3075 /* Unmaps a memory region previously mapped by address_space_map().
3076 * Will also mark the memory as dirty if is_write == 1. access_len gives
3077 * the amount of memory that was actually read or written by the caller.
3079 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3080 int is_write
, hwaddr access_len
)
3082 if (buffer
!= bounce
.buffer
) {
3086 mr
= memory_region_from_host(buffer
, &addr1
);
3089 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3091 if (xen_enabled()) {
3092 xen_invalidate_map_cache_entry(buffer
);
3094 memory_region_unref(mr
);
3098 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3099 bounce
.buffer
, access_len
);
3101 qemu_vfree(bounce
.buffer
);
3102 bounce
.buffer
= NULL
;
3103 memory_region_unref(bounce
.mr
);
3104 atomic_mb_set(&bounce
.in_use
, false);
3105 cpu_notify_map_clients();
3108 void *cpu_physical_memory_map(hwaddr addr
,
3112 return address_space_map(&address_space_memory
, addr
, plen
, is_write
);
3115 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3116 int is_write
, hwaddr access_len
)
3118 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3121 #define ARG1_DECL AddressSpace *as
3124 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3125 #define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3126 #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3127 #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3128 #define RCU_READ_LOCK(...) rcu_read_lock()
3129 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3130 #include "memory_ldst.inc.c"
3132 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3145 mr
= address_space_translate(as
, addr
, &xlat
, &l
, is_write
);
3146 if (!memory_access_is_direct(mr
, is_write
)) {
3150 l
= address_space_extend_translation(as
, addr
, len
, mr
, xlat
, l
, is_write
);
3151 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, &l
);
3154 cache
->is_write
= is_write
;
3158 memory_region_ref(cache
->mr
);
3163 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3167 assert(cache
->is_write
);
3168 invalidate_and_set_dirty(cache
->mr
, addr
+ cache
->xlat
, access_len
);
3171 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3177 if (xen_enabled()) {
3178 xen_invalidate_map_cache_entry(cache
->ptr
);
3180 memory_region_unref(cache
->mr
);
3184 /* Called from RCU critical section. This function has the same
3185 * semantics as address_space_translate, but it only works on a
3186 * predefined range of a MemoryRegion that was mapped with
3187 * address_space_cache_init.
3189 static inline MemoryRegion
*address_space_translate_cached(
3190 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3191 hwaddr
*plen
, bool is_write
)
3193 assert(addr
< cache
->len
&& *plen
<= cache
->len
- addr
);
3194 *xlat
= addr
+ cache
->xlat
;
3198 #define ARG1_DECL MemoryRegionCache *cache
3200 #define SUFFIX _cached
3201 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3202 #define IS_DIRECT(mr, is_write) true
3203 #define MAP_RAM(mr, ofs) (cache->ptr + (ofs - cache->xlat))
3204 #define INVALIDATE(mr, ofs, len) ((void)0)
3205 #define RCU_READ_LOCK() ((void)0)
3206 #define RCU_READ_UNLOCK() ((void)0)
3207 #include "memory_ldst.inc.c"
3209 /* virtual memory access for debug (includes writing to ROM) */
3210 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3211 uint8_t *buf
, int len
, int is_write
)
3221 page
= addr
& TARGET_PAGE_MASK
;
3222 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3223 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3224 /* if no physical page mapped, return an error */
3225 if (phys_addr
== -1)
3227 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3230 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3232 cpu_physical_memory_write_rom(cpu
->cpu_ases
[asidx
].as
,
3235 address_space_rw(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3236 MEMTXATTRS_UNSPECIFIED
,
3247 * Allows code that needs to deal with migration bitmaps etc to still be built
3248 * target independent.
3250 size_t qemu_target_page_bits(void)
3252 return TARGET_PAGE_BITS
;
3258 * A helper function for the _utterly broken_ virtio device model to find out if
3259 * it's running on a big endian machine. Don't do this at home kids!
3261 bool target_words_bigendian(void);
3262 bool target_words_bigendian(void)
3264 #if defined(TARGET_WORDS_BIGENDIAN)
3271 #ifndef CONFIG_USER_ONLY
3272 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3279 mr
= address_space_translate(&address_space_memory
,
3280 phys_addr
, &phys_addr
, &l
, false);
3282 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3287 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3293 QLIST_FOREACH_RCU(block
, &ram_list
.blocks
, next
) {
3294 ret
= func(block
->idstr
, block
->host
, block
->offset
,
3295 block
->used_length
, opaque
);
3305 * Unmap pages of memory from start to start+length such that
3306 * they a) read as 0, b) Trigger whatever fault mechanism
3307 * the OS provides for postcopy.
3308 * The pages must be unmapped by the end of the function.
3309 * Returns: 0 on success, none-0 on failure
3312 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3316 uint8_t *host_startaddr
= rb
->host
+ start
;
3318 if ((uintptr_t)host_startaddr
& (rb
->page_size
- 1)) {
3319 error_report("ram_block_discard_range: Unaligned start address: %p",
3324 if ((start
+ length
) <= rb
->used_length
) {
3325 uint8_t *host_endaddr
= host_startaddr
+ length
;
3326 if ((uintptr_t)host_endaddr
& (rb
->page_size
- 1)) {
3327 error_report("ram_block_discard_range: Unaligned end address: %p",
3332 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3334 if (rb
->page_size
== qemu_host_page_size
) {
3335 #if defined(CONFIG_MADVISE)
3336 /* Note: We need the madvise MADV_DONTNEED behaviour of definitely
3339 ret
= madvise(host_startaddr
, length
, MADV_DONTNEED
);
3342 /* Huge page case - unfortunately it can't do DONTNEED, but
3343 * it can do the equivalent by FALLOC_FL_PUNCH_HOLE in the
3346 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3347 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3353 error_report("ram_block_discard_range: Failed to discard range "
3354 "%s:%" PRIx64
" +%zx (%d)",
3355 rb
->idstr
, start
, length
, ret
);
3358 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3359 "/%zx/" RAM_ADDR_FMT
")",
3360 rb
->idstr
, start
, length
, rb
->used_length
);