fpu/softfloat-specialize.c.inc

   1 /*
   2  * QEMU float support
   3  *
   4  * The code in this source file is derived from release 2a of the SoftFloat
   5  * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
   6  * some later contributions) are provided under that license, as detailed below.
   7  * It has subsequently been modified by contributors to the QEMU Project,
   8  * so some portions are provided under:
   9  *  the SoftFloat-2a license
  10  *  the BSD license
  11  *  GPL-v2-or-later
  12  *
  13  * Any future contributions to this file after December 1st 2014 will be
  14  * taken to be licensed under the Softfloat-2a license unless specifically
  15  * indicated otherwise.
  16  */
  17
  18 /*
  19 ===============================================================================
  20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
  21 Arithmetic Package, Release 2a.
  22
  23 Written by John R. Hauser.  This work was made possible in part by the
  24 International Computer Science Institute, located at Suite 600, 1947 Center
  25 Street, Berkeley, California 94704.  Funding was partially provided by the
  26 National Science Foundation under grant MIP-9311980.  The original version
  27 of this code was written as part of a project to build a fixed-point vector
  28 processor in collaboration with the University of California at Berkeley,
  29 overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
  30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
  31 arithmetic/SoftFloat.html'.
  32
  33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
  34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
  35 TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
  36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
  37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
  38
  39 Derivative works are acceptable, even for commercial purposes, so long as
  40 (1) they include prominent notice that the work is derivative, and (2) they
  41 include prominent notice akin to these four paragraphs for those parts of
  42 this code that are retained.
  43
  44 ===============================================================================
  45 */
  46
  47 /* BSD licensing:
  48  * Copyright (c) 2006, Fabrice Bellard
  49  * All rights reserved.
  50  *
  51  * Redistribution and use in source and binary forms, with or without
  52  * modification, are permitted provided that the following conditions are met:
  53  *
  54  * 1. Redistributions of source code must retain the above copyright notice,
  55  * this list of conditions and the following disclaimer.
  56  *
  57  * 2. Redistributions in binary form must reproduce the above copyright notice,
  58  * this list of conditions and the following disclaimer in the documentation
  59  * and/or other materials provided with the distribution.
  60  *
  61  * 3. Neither the name of the copyright holder nor the names of its contributors
  62  * may be used to endorse or promote products derived from this software without
  63  * specific prior written permission.
  64  *
  65  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  66  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  67  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  68  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  69  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  70  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  71  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  72  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  73  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  74  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  75  * THE POSSIBILITY OF SUCH DAMAGE.
  76  */
  77
  78 /* Portions of this work are licensed under the terms of the GNU GPL,
  79  * version 2 or later. See the COPYING file in the top-level directory.
  80  */
  81
  82 /*
  83  * Define whether architecture deviates from IEEE in not supporting
  84  * signaling NaNs (so all NaNs are treated as quiet).
  85  */
  86 static inline bool no_signaling_nans(float_status *status)
  87 {
  88 #if defined(TARGET_XTENSA)
  89     return status->no_signaling_nans;
  90 #else
  91     return false;
  92 #endif
  93 }
  94
  95 /* Define how the architecture discriminates signaling NaNs.
  96  * This done with the most significant bit of the fraction.
  97  * In IEEE 754-1985 this was implementation defined, but in IEEE 754-2008
  98  * the msb must be zero.  MIPS is (so far) unique in supporting both the
  99  * 2008 revision and backward compatibility with their original choice.
 100  * Thus for MIPS we must make the choice at runtime.
 101  */
 102 static inline bool snan_bit_is_one(float_status *status)
 103 {
 104 #if defined(TARGET_MIPS)
 105     return status->snan_bit_is_one;
 106 #elif defined(TARGET_HPPA) || defined(TARGET_SH4)
 107     return 1;
 108 #else
 109     return 0;
 110 #endif
 111 }
 112
 113 /*----------------------------------------------------------------------------
 114 | For the deconstructed floating-point with fraction FRAC, return true
 115 | if the fraction represents a signalling NaN; otherwise false.
 116 *----------------------------------------------------------------------------*/
 117
 118 static bool parts_is_snan_frac(uint64_t frac, float_status *status)
 119 {
 120     if (no_signaling_nans(status)) {
 121         return false;
 122     } else {
 123         bool msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1);
 124         return msb == snan_bit_is_one(status);
 125     }
 126 }
 127
 128 /*----------------------------------------------------------------------------
 129 | The pattern for a default generated deconstructed floating-point NaN.
 130 *----------------------------------------------------------------------------*/
 131
 132 static void parts64_default_nan(FloatParts64 *p, float_status *status)
 133 {
 134     bool sign = 0;
 135     uint64_t frac;
 136
 137 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
 138     /* !snan_bit_is_one, set all bits */
 139     frac = (1ULL << DECOMPOSED_BINARY_POINT) - 1;
 140 #elif defined(TARGET_I386) || defined(TARGET_X86_64) \
 141     || defined(TARGET_MICROBLAZE)
 142     /* !snan_bit_is_one, set sign and msb */
 143     frac = 1ULL << (DECOMPOSED_BINARY_POINT - 1);
 144     sign = 1;
 145 #elif defined(TARGET_HPPA)
 146     /* snan_bit_is_one, set msb-1.  */
 147     frac = 1ULL << (DECOMPOSED_BINARY_POINT - 2);
 148 #elif defined(TARGET_HEXAGON)
 149     sign = 1;
 150     frac = ~0ULL;
 151 #else
 152     /*
 153      * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
 154      * S390, SH4, TriCore, and Xtensa.  Our other supported targets,
 155      * CRIS, Nios2, and Tile, do not have floating-point.
 156      */
 157     if (snan_bit_is_one(status)) {
 158         /* set all bits other than msb */
 159         frac = (1ULL << (DECOMPOSED_BINARY_POINT - 1)) - 1;
 160     } else {
 161         /* set msb */
 162         frac = 1ULL << (DECOMPOSED_BINARY_POINT - 1);
 163     }
 164 #endif
 165
 166     *p = (FloatParts64) {
 167         .cls = float_class_qnan,
 168         .sign = sign,
 169         .exp = INT_MAX,
 170         .frac = frac
 171     };
 172 }
 173
 174 /*----------------------------------------------------------------------------
 175 | Returns a quiet NaN from a signalling NaN for the deconstructed
 176 | floating-point parts.
 177 *----------------------------------------------------------------------------*/
 178
 179 static FloatParts64 parts_silence_nan(FloatParts64 a, float_status *status)
 180 {
 181     g_assert(!no_signaling_nans(status));
 182     g_assert(!status->default_nan_mode);
 183
 184     /* The only snan_bit_is_one target without default_nan_mode is HPPA. */
 185     if (snan_bit_is_one(status)) {
 186         a.frac &= ~(1ULL << (DECOMPOSED_BINARY_POINT - 1));
 187         a.frac |= 1ULL << (DECOMPOSED_BINARY_POINT - 2);
 188     } else {
 189         a.frac |= 1ULL << (DECOMPOSED_BINARY_POINT - 1);
 190     }
 191     a.cls = float_class_qnan;
 192     return a;
 193 }
 194
 195 /*----------------------------------------------------------------------------
 196 | The pattern for a default generated extended double-precision NaN.
 197 *----------------------------------------------------------------------------*/
 198 floatx80 floatx80_default_nan(float_status *status)
 199 {
 200     floatx80 r;
 201
 202     /* None of the targets that have snan_bit_is_one use floatx80.  */
 203     assert(!snan_bit_is_one(status));
 204 #if defined(TARGET_M68K)
 205     r.low = UINT64_C(0xFFFFFFFFFFFFFFFF);
 206     r.high = 0x7FFF;
 207 #else
 208     /* X86 */
 209     r.low = UINT64_C(0xC000000000000000);
 210     r.high = 0xFFFF;
 211 #endif
 212     return r;
 213 }
 214
 215 /*----------------------------------------------------------------------------
 216 | The pattern for a default generated extended double-precision inf.
 217 *----------------------------------------------------------------------------*/
 218
 219 #define floatx80_infinity_high 0x7FFF
 220 #if defined(TARGET_M68K)
 221 #define floatx80_infinity_low  UINT64_C(0x0000000000000000)
 222 #else
 223 #define floatx80_infinity_low  UINT64_C(0x8000000000000000)
 224 #endif
 225
 226 const floatx80 floatx80_infinity
 227     = make_floatx80_init(floatx80_infinity_high, floatx80_infinity_low);
 228
 229 /*----------------------------------------------------------------------------
 230 | Internal canonical NaN format.
 231 *----------------------------------------------------------------------------*/
 232 typedef struct {
 233     bool sign;
 234     uint64_t high, low;
 235 } commonNaNT;
 236
 237 /*----------------------------------------------------------------------------
 238 | Returns 1 if the half-precision floating-point value `a' is a quiet
 239 | NaN; otherwise returns 0.
 240 *----------------------------------------------------------------------------*/
 241
 242 bool float16_is_quiet_nan(float16 a_, float_status *status)
 243 {
 244     if (no_signaling_nans(status)) {
 245         return float16_is_any_nan(a_);
 246     } else {
 247         uint16_t a = float16_val(a_);
 248         if (snan_bit_is_one(status)) {
 249             return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 250         } else {
 251
 252             return ((a >> 9) & 0x3F) == 0x3F;
 253         }
 254     }
 255 }
 256
 257 /*----------------------------------------------------------------------------
 258 | Returns 1 if the bfloat16 value `a' is a quiet
 259 | NaN; otherwise returns 0.
 260 *----------------------------------------------------------------------------*/
 261
 262 bool bfloat16_is_quiet_nan(bfloat16 a_, float_status *status)
 263 {
 264     if (no_signaling_nans(status)) {
 265         return bfloat16_is_any_nan(a_);
 266     } else {
 267         uint16_t a = a_;
 268         if (snan_bit_is_one(status)) {
 269             return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
 270         } else {
 271             return ((a >> 6) & 0x1FF) == 0x1FF;
 272         }
 273     }
 274 }
 275
 276 /*----------------------------------------------------------------------------
 277 | Returns 1 if the half-precision floating-point value `a' is a signaling
 278 | NaN; otherwise returns 0.
 279 *----------------------------------------------------------------------------*/
 280
 281 bool float16_is_signaling_nan(float16 a_, float_status *status)
 282 {
 283     if (no_signaling_nans(status)) {
 284         return 0;
 285     } else {
 286         uint16_t a = float16_val(a_);
 287         if (snan_bit_is_one(status)) {
 288             return ((a >> 9) & 0x3F) == 0x3F;
 289         } else {
 290             return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 291         }
 292     }
 293 }
 294
 295 /*----------------------------------------------------------------------------
 296 | Returns 1 if the bfloat16 value `a' is a signaling
 297 | NaN; otherwise returns 0.
 298 *----------------------------------------------------------------------------*/
 299
 300 bool bfloat16_is_signaling_nan(bfloat16 a_, float_status *status)
 301 {
 302     if (no_signaling_nans(status)) {
 303         return 0;
 304     } else {
 305         uint16_t a = a_;
 306         if (snan_bit_is_one(status)) {
 307             return ((a >> 6) & 0x1FF) == 0x1FF;
 308         } else {
 309             return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
 310         }
 311     }
 312 }
 313
 314 /*----------------------------------------------------------------------------
 315 | Returns 1 if the single-precision floating-point value `a' is a quiet
 316 | NaN; otherwise returns 0.
 317 *----------------------------------------------------------------------------*/
 318
 319 bool float32_is_quiet_nan(float32 a_, float_status *status)
 320 {
 321     if (no_signaling_nans(status)) {
 322         return float32_is_any_nan(a_);
 323     } else {
 324         uint32_t a = float32_val(a_);
 325         if (snan_bit_is_one(status)) {
 326             return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
 327         } else {
 328             return ((uint32_t)(a << 1) >= 0xFF800000);
 329         }
 330     }
 331 }
 332
 333 /*----------------------------------------------------------------------------
 334 | Returns 1 if the single-precision floating-point value `a' is a signaling
 335 | NaN; otherwise returns 0.
 336 *----------------------------------------------------------------------------*/
 337
 338 bool float32_is_signaling_nan(float32 a_, float_status *status)
 339 {
 340     if (no_signaling_nans(status)) {
 341         return 0;
 342     } else {
 343         uint32_t a = float32_val(a_);
 344         if (snan_bit_is_one(status)) {
 345             return ((uint32_t)(a << 1) >= 0xFF800000);
 346         } else {
 347             return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
 348         }
 349     }
 350 }
 351
 352 /*----------------------------------------------------------------------------
 353 | Returns the result of converting the single-precision floating-point NaN
 354 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 355 | exception is raised.
 356 *----------------------------------------------------------------------------*/
 357
 358 static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
 359 {
 360     commonNaNT z;
 361
 362     if (float32_is_signaling_nan(a, status)) {
 363         float_raise(float_flag_invalid, status);
 364     }
 365     z.sign = float32_val(a) >> 31;
 366     z.low = 0;
 367     z.high = ((uint64_t)float32_val(a)) << 41;
 368     return z;
 369 }
 370
 371 /*----------------------------------------------------------------------------
 372 | Returns the result of converting the canonical NaN `a' to the single-
 373 | precision floating-point format.
 374 *----------------------------------------------------------------------------*/
 375
 376 static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
 377 {
 378     uint32_t mantissa = a.high >> 41;
 379
 380     if (status->default_nan_mode) {
 381         return float32_default_nan(status);
 382     }
 383
 384     if (mantissa) {
 385         return make_float32(
 386             (((uint32_t)a.sign) << 31) | 0x7F800000 | (a.high >> 41));
 387     } else {
 388         return float32_default_nan(status);
 389     }
 390 }
 391
 392 /*----------------------------------------------------------------------------
 393 | Select which NaN to propagate for a two-input operation.
 394 | IEEE754 doesn't specify all the details of this, so the
 395 | algorithm is target-specific.
 396 | The routine is passed various bits of information about the
 397 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
 398 | Note that signalling NaNs are always squashed to quiet NaNs
 399 | by the caller, by calling floatXX_silence_nan() before
 400 | returning them.
 401 |
 402 | aIsLargerSignificand is only valid if both a and b are NaNs
 403 | of some kind, and is true if a has the larger significand,
 404 | or if both a and b have the same significand but a is
 405 | positive but b is negative. It is only needed for the x87
 406 | tie-break rule.
 407 *----------------------------------------------------------------------------*/
 408
 409 static int pickNaN(FloatClass a_cls, FloatClass b_cls,
 410                    bool aIsLargerSignificand, float_status *status)
 411 {
 412 #if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA)
 413     /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
 414      * the first of:
 415      *  1. A if it is signaling
 416      *  2. B if it is signaling
 417      *  3. A (quiet)
 418      *  4. B (quiet)
 419      * A signaling NaN is always quietened before returning it.
 420      */
 421     /* According to MIPS specifications, if one of the two operands is
 422      * a sNaN, a new qNaN has to be generated. This is done in
 423      * floatXX_silence_nan(). For qNaN inputs the specifications
 424      * says: "When possible, this QNaN result is one of the operand QNaN
 425      * values." In practice it seems that most implementations choose
 426      * the first operand if both operands are qNaN. In short this gives
 427      * the following rules:
 428      *  1. A if it is signaling
 429      *  2. B if it is signaling
 430      *  3. A (quiet)
 431      *  4. B (quiet)
 432      * A signaling NaN is always silenced before returning it.
 433      */
 434     if (is_snan(a_cls)) {
 435         return 0;
 436     } else if (is_snan(b_cls)) {
 437         return 1;
 438     } else if (is_qnan(a_cls)) {
 439         return 0;
 440     } else {
 441         return 1;
 442     }
 443 #elif defined(TARGET_PPC) || defined(TARGET_M68K)
 444     /* PowerPC propagation rules:
 445      *  1. A if it sNaN or qNaN
 446      *  2. B if it sNaN or qNaN
 447      * A signaling NaN is always silenced before returning it.
 448      */
 449     /* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
 450      * 3.4 FLOATING-POINT INSTRUCTION DETAILS
 451      * If either operand, but not both operands, of an operation is a
 452      * nonsignaling NaN, then that NaN is returned as the result. If both
 453      * operands are nonsignaling NaNs, then the destination operand
 454      * nonsignaling NaN is returned as the result.
 455      * If either operand to an operation is a signaling NaN (SNaN), then the
 456      * SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
 457      * is set in the FPCR ENABLE byte, then the exception is taken and the
 458      * destination is not modified. If the SNaN exception enable bit is not
 459      * set, setting the SNaN bit in the operand to a one converts the SNaN to
 460      * a nonsignaling NaN. The operation then continues as described in the
 461      * preceding paragraph for nonsignaling NaNs.
 462      */
 463     if (is_nan(a_cls)) {
 464         return 0;
 465     } else {
 466         return 1;
 467     }
 468 #elif defined(TARGET_XTENSA)
 469     /*
 470      * Xtensa has two NaN propagation modes.
 471      * Which one is active is controlled by float_status::use_first_nan.
 472      */
 473     if (status->use_first_nan) {
 474         if (is_nan(a_cls)) {
 475             return 0;
 476         } else {
 477             return 1;
 478         }
 479     } else {
 480         if (is_nan(b_cls)) {
 481             return 1;
 482         } else {
 483             return 0;
 484         }
 485     }
 486 #else
 487     /* This implements x87 NaN propagation rules:
 488      * SNaN + QNaN => return the QNaN
 489      * two SNaNs => return the one with the larger significand, silenced
 490      * two QNaNs => return the one with the larger significand
 491      * SNaN and a non-NaN => return the SNaN, silenced
 492      * QNaN and a non-NaN => return the QNaN
 493      *
 494      * If we get down to comparing significands and they are the same,
 495      * return the NaN with the positive sign bit (if any).
 496      */
 497     if (is_snan(a_cls)) {
 498         if (is_snan(b_cls)) {
 499             return aIsLargerSignificand ? 0 : 1;
 500         }
 501         return is_qnan(b_cls) ? 1 : 0;
 502     } else if (is_qnan(a_cls)) {
 503         if (is_snan(b_cls) || !is_qnan(b_cls)) {
 504             return 0;
 505         } else {
 506             return aIsLargerSignificand ? 0 : 1;
 507         }
 508     } else {
 509         return 1;
 510     }
 511 #endif
 512 }
 513
 514 /*----------------------------------------------------------------------------
 515 | Select which NaN to propagate for a three-input operation.
 516 | For the moment we assume that no CPU needs the 'larger significand'
 517 | information.
 518 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
 519 *----------------------------------------------------------------------------*/
 520 static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
 521                          bool infzero, float_status *status)
 522 {
 523 #if defined(TARGET_ARM)
 524     /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
 525      * the default NaN
 526      */
 527     if (infzero && is_qnan(c_cls)) {
 528         float_raise(float_flag_invalid, status);
 529         return 3;
 530     }
 531
 532     /* This looks different from the ARM ARM pseudocode, because the ARM ARM
 533      * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
 534      */
 535     if (is_snan(c_cls)) {
 536         return 2;
 537     } else if (is_snan(a_cls)) {
 538         return 0;
 539     } else if (is_snan(b_cls)) {
 540         return 1;
 541     } else if (is_qnan(c_cls)) {
 542         return 2;
 543     } else if (is_qnan(a_cls)) {
 544         return 0;
 545     } else {
 546         return 1;
 547     }
 548 #elif defined(TARGET_MIPS)
 549     if (snan_bit_is_one(status)) {
 550         /*
 551          * For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan)
 552          * case sets InvalidOp and returns the default NaN
 553          */
 554         if (infzero) {
 555             float_raise(float_flag_invalid, status);
 556             return 3;
 557         }
 558         /* Prefer sNaN over qNaN, in the a, b, c order. */
 559         if (is_snan(a_cls)) {
 560             return 0;
 561         } else if (is_snan(b_cls)) {
 562             return 1;
 563         } else if (is_snan(c_cls)) {
 564             return 2;
 565         } else if (is_qnan(a_cls)) {
 566             return 0;
 567         } else if (is_qnan(b_cls)) {
 568             return 1;
 569         } else {
 570             return 2;
 571         }
 572     } else {
 573         /*
 574          * For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan)
 575          * case sets InvalidOp and returns the input value 'c'
 576          */
 577         if (infzero) {
 578             float_raise(float_flag_invalid, status);
 579             return 2;
 580         }
 581         /* Prefer sNaN over qNaN, in the c, a, b order. */
 582         if (is_snan(c_cls)) {
 583             return 2;
 584         } else if (is_snan(a_cls)) {
 585             return 0;
 586         } else if (is_snan(b_cls)) {
 587             return 1;
 588         } else if (is_qnan(c_cls)) {
 589             return 2;
 590         } else if (is_qnan(a_cls)) {
 591             return 0;
 592         } else {
 593             return 1;
 594         }
 595     }
 596 #elif defined(TARGET_PPC)
 597     /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
 598      * to return an input NaN if we have one (ie c) rather than generating
 599      * a default NaN
 600      */
 601     if (infzero) {
 602         float_raise(float_flag_invalid, status);
 603         return 2;
 604     }
 605
 606     /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
 607      * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
 608      */
 609     if (is_nan(a_cls)) {
 610         return 0;
 611     } else if (is_nan(c_cls)) {
 612         return 2;
 613     } else {
 614         return 1;
 615     }
 616 #elif defined(TARGET_RISCV)
 617     /* For RISC-V, InvalidOp is set when multiplicands are Inf and zero */
 618     if (infzero) {
 619         float_raise(float_flag_invalid, status);
 620     }
 621     return 3; /* default NaN */
 622 #elif defined(TARGET_XTENSA)
 623     /*
 624      * For Xtensa, the (inf,zero,nan) case sets InvalidOp and returns
 625      * an input NaN if we have one (ie c).
 626      */
 627     if (infzero) {
 628         float_raise(float_flag_invalid, status);
 629         return 2;
 630     }
 631     if (status->use_first_nan) {
 632         if (is_nan(a_cls)) {
 633             return 0;
 634         } else if (is_nan(b_cls)) {
 635             return 1;
 636         } else {
 637             return 2;
 638         }
 639     } else {
 640         if (is_nan(c_cls)) {
 641             return 2;
 642         } else if (is_nan(b_cls)) {
 643             return 1;
 644         } else {
 645             return 0;
 646         }
 647     }
 648 #else
 649     /* A default implementation: prefer a to b to c.
 650      * This is unlikely to actually match any real implementation.
 651      */
 652     if (is_nan(a_cls)) {
 653         return 0;
 654     } else if (is_nan(b_cls)) {
 655         return 1;
 656     } else {
 657         return 2;
 658     }
 659 #endif
 660 }
 661
 662 /*----------------------------------------------------------------------------
 663 | Takes two single-precision floating-point values `a' and `b', one of which
 664 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 665 | signaling NaN, the invalid exception is raised.
 666 *----------------------------------------------------------------------------*/
 667
 668 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
 669 {
 670     bool aIsLargerSignificand;
 671     uint32_t av, bv;
 672     FloatClass a_cls, b_cls;
 673
 674     /* This is not complete, but is good enough for pickNaN.  */
 675     a_cls = (!float32_is_any_nan(a)
 676              ? float_class_normal
 677              : float32_is_signaling_nan(a, status)
 678              ? float_class_snan
 679              : float_class_qnan);
 680     b_cls = (!float32_is_any_nan(b)
 681              ? float_class_normal
 682              : float32_is_signaling_nan(b, status)
 683              ? float_class_snan
 684              : float_class_qnan);
 685
 686     av = float32_val(a);
 687     bv = float32_val(b);
 688
 689     if (is_snan(a_cls) || is_snan(b_cls)) {
 690         float_raise(float_flag_invalid, status);
 691     }
 692
 693     if (status->default_nan_mode) {
 694         return float32_default_nan(status);
 695     }
 696
 697     if ((uint32_t)(av << 1) < (uint32_t)(bv << 1)) {
 698         aIsLargerSignificand = 0;
 699     } else if ((uint32_t)(bv << 1) < (uint32_t)(av << 1)) {
 700         aIsLargerSignificand = 1;
 701     } else {
 702         aIsLargerSignificand = (av < bv) ? 1 : 0;
 703     }
 704
 705     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
 706         if (is_snan(b_cls)) {
 707             return float32_silence_nan(b, status);
 708         }
 709         return b;
 710     } else {
 711         if (is_snan(a_cls)) {
 712             return float32_silence_nan(a, status);
 713         }
 714         return a;
 715     }
 716 }
 717
 718 /*----------------------------------------------------------------------------
 719 | Returns 1 if the double-precision floating-point value `a' is a quiet
 720 | NaN; otherwise returns 0.
 721 *----------------------------------------------------------------------------*/
 722
 723 bool float64_is_quiet_nan(float64 a_, float_status *status)
 724 {
 725     if (no_signaling_nans(status)) {
 726         return float64_is_any_nan(a_);
 727     } else {
 728         uint64_t a = float64_val(a_);
 729         if (snan_bit_is_one(status)) {
 730             return (((a >> 51) & 0xFFF) == 0xFFE)
 731                 && (a & 0x0007FFFFFFFFFFFFULL);
 732         } else {
 733             return ((a << 1) >= 0xFFF0000000000000ULL);
 734         }
 735     }
 736 }
 737
 738 /*----------------------------------------------------------------------------
 739 | Returns 1 if the double-precision floating-point value `a' is a signaling
 740 | NaN; otherwise returns 0.
 741 *----------------------------------------------------------------------------*/
 742
 743 bool float64_is_signaling_nan(float64 a_, float_status *status)
 744 {
 745     if (no_signaling_nans(status)) {
 746         return 0;
 747     } else {
 748         uint64_t a = float64_val(a_);
 749         if (snan_bit_is_one(status)) {
 750             return ((a << 1) >= 0xFFF0000000000000ULL);
 751         } else {
 752             return (((a >> 51) & 0xFFF) == 0xFFE)
 753                 && (a & UINT64_C(0x0007FFFFFFFFFFFF));
 754         }
 755     }
 756 }
 757
 758 /*----------------------------------------------------------------------------
 759 | Returns the result of converting the double-precision floating-point NaN
 760 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 761 | exception is raised.
 762 *----------------------------------------------------------------------------*/
 763
 764 static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
 765 {
 766     commonNaNT z;
 767
 768     if (float64_is_signaling_nan(a, status)) {
 769         float_raise(float_flag_invalid, status);
 770     }
 771     z.sign = float64_val(a) >> 63;
 772     z.low = 0;
 773     z.high = float64_val(a) << 12;
 774     return z;
 775 }
 776
 777 /*----------------------------------------------------------------------------
 778 | Returns the result of converting the canonical NaN `a' to the double-
 779 | precision floating-point format.
 780 *----------------------------------------------------------------------------*/
 781
 782 static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
 783 {
 784     uint64_t mantissa = a.high >> 12;
 785
 786     if (status->default_nan_mode) {
 787         return float64_default_nan(status);
 788     }
 789
 790     if (mantissa) {
 791         return make_float64(
 792               (((uint64_t) a.sign) << 63)
 793             | UINT64_C(0x7FF0000000000000)
 794             | (a.high >> 12));
 795     } else {
 796         return float64_default_nan(status);
 797     }
 798 }
 799
 800 /*----------------------------------------------------------------------------
 801 | Takes two double-precision floating-point values `a' and `b', one of which
 802 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 803 | signaling NaN, the invalid exception is raised.
 804 *----------------------------------------------------------------------------*/
 805
 806 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
 807 {
 808     bool aIsLargerSignificand;
 809     uint64_t av, bv;
 810     FloatClass a_cls, b_cls;
 811
 812     /* This is not complete, but is good enough for pickNaN.  */
 813     a_cls = (!float64_is_any_nan(a)
 814              ? float_class_normal
 815              : float64_is_signaling_nan(a, status)
 816              ? float_class_snan
 817              : float_class_qnan);
 818     b_cls = (!float64_is_any_nan(b)
 819              ? float_class_normal
 820              : float64_is_signaling_nan(b, status)
 821              ? float_class_snan
 822              : float_class_qnan);
 823
 824     av = float64_val(a);
 825     bv = float64_val(b);
 826
 827     if (is_snan(a_cls) || is_snan(b_cls)) {
 828         float_raise(float_flag_invalid, status);
 829     }
 830
 831     if (status->default_nan_mode) {
 832         return float64_default_nan(status);
 833     }
 834
 835     if ((uint64_t)(av << 1) < (uint64_t)(bv << 1)) {
 836         aIsLargerSignificand = 0;
 837     } else if ((uint64_t)(bv << 1) < (uint64_t)(av << 1)) {
 838         aIsLargerSignificand = 1;
 839     } else {
 840         aIsLargerSignificand = (av < bv) ? 1 : 0;
 841     }
 842
 843     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
 844         if (is_snan(b_cls)) {
 845             return float64_silence_nan(b, status);
 846         }
 847         return b;
 848     } else {
 849         if (is_snan(a_cls)) {
 850             return float64_silence_nan(a, status);
 851         }
 852         return a;
 853     }
 854 }
 855
 856 /*----------------------------------------------------------------------------
 857 | Returns 1 if the extended double-precision floating-point value `a' is a
 858 | quiet NaN; otherwise returns 0. This slightly differs from the same
 859 | function for other types as floatx80 has an explicit bit.
 860 *----------------------------------------------------------------------------*/
 861
 862 int floatx80_is_quiet_nan(floatx80 a, float_status *status)
 863 {
 864     if (no_signaling_nans(status)) {
 865         return floatx80_is_any_nan(a);
 866     } else {
 867         if (snan_bit_is_one(status)) {
 868             uint64_t aLow;
 869
 870             aLow = a.low & ~0x4000000000000000ULL;
 871             return ((a.high & 0x7FFF) == 0x7FFF)
 872                 && (aLow << 1)
 873                 && (a.low == aLow);
 874         } else {
 875             return ((a.high & 0x7FFF) == 0x7FFF)
 876                 && (UINT64_C(0x8000000000000000) <= ((uint64_t)(a.low << 1)));
 877         }
 878     }
 879 }
 880
 881 /*----------------------------------------------------------------------------
 882 | Returns 1 if the extended double-precision floating-point value `a' is a
 883 | signaling NaN; otherwise returns 0. This slightly differs from the same
 884 | function for other types as floatx80 has an explicit bit.
 885 *----------------------------------------------------------------------------*/
 886
 887 int floatx80_is_signaling_nan(floatx80 a, float_status *status)
 888 {
 889     if (no_signaling_nans(status)) {
 890         return 0;
 891     } else {
 892         if (snan_bit_is_one(status)) {
 893             return ((a.high & 0x7FFF) == 0x7FFF)
 894                 && ((a.low << 1) >= 0x8000000000000000ULL);
 895         } else {
 896             uint64_t aLow;
 897
 898             aLow = a.low & ~UINT64_C(0x4000000000000000);
 899             return ((a.high & 0x7FFF) == 0x7FFF)
 900                 && (uint64_t)(aLow << 1)
 901                 && (a.low == aLow);
 902         }
 903     }
 904 }
 905
 906 /*----------------------------------------------------------------------------
 907 | Returns a quiet NaN from a signalling NaN for the extended double-precision
 908 | floating point value `a'.
 909 *----------------------------------------------------------------------------*/
 910
 911 floatx80 floatx80_silence_nan(floatx80 a, float_status *status)
 912 {
 913     /* None of the targets that have snan_bit_is_one use floatx80.  */
 914     assert(!snan_bit_is_one(status));
 915     a.low |= UINT64_C(0xC000000000000000);
 916     return a;
 917 }
 918
 919 /*----------------------------------------------------------------------------
 920 | Returns the result of converting the extended double-precision floating-
 921 | point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the
 922 | invalid exception is raised.
 923 *----------------------------------------------------------------------------*/
 924
 925 static commonNaNT floatx80ToCommonNaN(floatx80 a, float_status *status)
 926 {
 927     floatx80 dflt;
 928     commonNaNT z;
 929
 930     if (floatx80_is_signaling_nan(a, status)) {
 931         float_raise(float_flag_invalid, status);
 932     }
 933     if (a.low >> 63) {
 934         z.sign = a.high >> 15;
 935         z.low = 0;
 936         z.high = a.low << 1;
 937     } else {
 938         dflt = floatx80_default_nan(status);
 939         z.sign = dflt.high >> 15;
 940         z.low = 0;
 941         z.high = dflt.low << 1;
 942     }
 943     return z;
 944 }
 945
 946 /*----------------------------------------------------------------------------
 947 | Returns the result of converting the canonical NaN `a' to the extended
 948 | double-precision floating-point format.
 949 *----------------------------------------------------------------------------*/
 950
 951 static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
 952 {
 953     floatx80 z;
 954
 955     if (status->default_nan_mode) {
 956         return floatx80_default_nan(status);
 957     }
 958
 959     if (a.high >> 1) {
 960         z.low = UINT64_C(0x8000000000000000) | a.high >> 1;
 961         z.high = (((uint16_t)a.sign) << 15) | 0x7FFF;
 962     } else {
 963         z = floatx80_default_nan(status);
 964     }
 965     return z;
 966 }
 967
 968 /*----------------------------------------------------------------------------
 969 | Takes two extended double-precision floating-point values `a' and `b', one
 970 | of which is a NaN, and returns the appropriate NaN result.  If either `a' or
 971 | `b' is a signaling NaN, the invalid exception is raised.
 972 *----------------------------------------------------------------------------*/
 973
 974 floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status)
 975 {
 976     bool aIsLargerSignificand;
 977     FloatClass a_cls, b_cls;
 978
 979     /* This is not complete, but is good enough for pickNaN.  */
 980     a_cls = (!floatx80_is_any_nan(a)
 981              ? float_class_normal
 982              : floatx80_is_signaling_nan(a, status)
 983              ? float_class_snan
 984              : float_class_qnan);
 985     b_cls = (!floatx80_is_any_nan(b)
 986              ? float_class_normal
 987              : floatx80_is_signaling_nan(b, status)
 988              ? float_class_snan
 989              : float_class_qnan);
 990
 991     if (is_snan(a_cls) || is_snan(b_cls)) {
 992         float_raise(float_flag_invalid, status);
 993     }
 994
 995     if (status->default_nan_mode) {
 996         return floatx80_default_nan(status);
 997     }
 998
 999     if (a.low < b.low) {
1000         aIsLargerSignificand = 0;
1001     } else if (b.low < a.low) {
1002         aIsLargerSignificand = 1;
1003     } else {
1004         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1005     }
1006
1007     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
1008         if (is_snan(b_cls)) {
1009             return floatx80_silence_nan(b, status);
1010         }
1011         return b;
1012     } else {
1013         if (is_snan(a_cls)) {
1014             return floatx80_silence_nan(a, status);
1015         }
1016         return a;
1017     }
1018 }
1019
1020 /*----------------------------------------------------------------------------
1021 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1022 | NaN; otherwise returns 0.
1023 *----------------------------------------------------------------------------*/
1024
1025 bool float128_is_quiet_nan(float128 a, float_status *status)
1026 {
1027     if (no_signaling_nans(status)) {
1028         return float128_is_any_nan(a);
1029     } else {
1030         if (snan_bit_is_one(status)) {
1031             return (((a.high >> 47) & 0xFFFF) == 0xFFFE)
1032                 && (a.low || (a.high & 0x00007FFFFFFFFFFFULL));
1033         } else {
1034             return ((a.high << 1) >= 0xFFFF000000000000ULL)
1035                 && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL));
1036         }
1037     }
1038 }
1039
1040 /*----------------------------------------------------------------------------
1041 | Returns 1 if the quadruple-precision floating-point value `a' is a
1042 | signaling NaN; otherwise returns 0.
1043 *----------------------------------------------------------------------------*/
1044
1045 bool float128_is_signaling_nan(float128 a, float_status *status)
1046 {
1047     if (no_signaling_nans(status)) {
1048         return 0;
1049     } else {
1050         if (snan_bit_is_one(status)) {
1051             return ((a.high << 1) >= 0xFFFF000000000000ULL)
1052                 && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL));
1053         } else {
1054             return (((a.high >> 47) & 0xFFFF) == 0xFFFE)
1055                 && (a.low || (a.high & UINT64_C(0x00007FFFFFFFFFFF)));
1056         }
1057     }
1058 }
1059
1060 /*----------------------------------------------------------------------------
1061 | Returns a quiet NaN from a signalling NaN for the quadruple-precision
1062 | floating point value `a'.
1063 *----------------------------------------------------------------------------*/
1064
1065 float128 float128_silence_nan(float128 a, float_status *status)
1066 {
1067     if (no_signaling_nans(status)) {
1068         g_assert_not_reached();
1069     } else {
1070         if (snan_bit_is_one(status)) {
1071             return float128_default_nan(status);
1072         } else {
1073             a.high |= UINT64_C(0x0000800000000000);
1074             return a;
1075         }
1076     }
1077 }
1078
1079 /*----------------------------------------------------------------------------
1080 | Returns the result of converting the quadruple-precision floating-point NaN
1081 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
1082 | exception is raised.
1083 *----------------------------------------------------------------------------*/
1084
1085 static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
1086 {
1087     commonNaNT z;
1088
1089     if (float128_is_signaling_nan(a, status)) {
1090         float_raise(float_flag_invalid, status);
1091     }
1092     z.sign = a.high >> 63;
1093     shortShift128Left(a.high, a.low, 16, &z.high, &z.low);
1094     return z;
1095 }
1096
1097 /*----------------------------------------------------------------------------
1098 | Returns the result of converting the canonical NaN `a' to the quadruple-
1099 | precision floating-point format.
1100 *----------------------------------------------------------------------------*/
1101
1102 static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
1103 {
1104     float128 z;
1105
1106     if (status->default_nan_mode) {
1107         return float128_default_nan(status);
1108     }
1109
1110     shift128Right(a.high, a.low, 16, &z.high, &z.low);
1111     z.high |= (((uint64_t)a.sign) << 63) | UINT64_C(0x7FFF000000000000);
1112     return z;
1113 }
1114
1115 /*----------------------------------------------------------------------------
1116 | Takes two quadruple-precision floating-point values `a' and `b', one of
1117 | which is a NaN, and returns the appropriate NaN result.  If either `a' or
1118 | `b' is a signaling NaN, the invalid exception is raised.
1119 *----------------------------------------------------------------------------*/
1120
1121 static float128 propagateFloat128NaN(float128 a, float128 b,
1122                                      float_status *status)
1123 {
1124     bool aIsLargerSignificand;
1125     FloatClass a_cls, b_cls;
1126
1127     /* This is not complete, but is good enough for pickNaN.  */
1128     a_cls = (!float128_is_any_nan(a)
1129              ? float_class_normal
1130              : float128_is_signaling_nan(a, status)
1131              ? float_class_snan
1132              : float_class_qnan);
1133     b_cls = (!float128_is_any_nan(b)
1134              ? float_class_normal
1135              : float128_is_signaling_nan(b, status)
1136              ? float_class_snan
1137              : float_class_qnan);
1138
1139     if (is_snan(a_cls) || is_snan(b_cls)) {
1140         float_raise(float_flag_invalid, status);
1141     }
1142
1143     if (status->default_nan_mode) {
1144         return float128_default_nan(status);
1145     }
1146
1147     if (lt128(a.high << 1, a.low, b.high << 1, b.low)) {
1148         aIsLargerSignificand = 0;
1149     } else if (lt128(b.high << 1, b.low, a.high << 1, a.low)) {
1150         aIsLargerSignificand = 1;
1151     } else {
1152         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1153     }
1154
1155     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
1156         if (is_snan(b_cls)) {
1157             return float128_silence_nan(b, status);
1158         }
1159         return b;
1160     } else {
1161         if (is_snan(a_cls)) {
1162             return float128_silence_nan(a, status);
1163         }
1164         return a;
1165     }
1166 }