fpu/softfloat-specialize.c.inc

   1 /*
   2  * QEMU float support
   3  *
   4  * The code in this source file is derived from release 2a of the SoftFloat
   5  * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
   6  * some later contributions) are provided under that license, as detailed below.
   7  * It has subsequently been modified by contributors to the QEMU Project,
   8  * so some portions are provided under:
   9  *  the SoftFloat-2a license
  10  *  the BSD license
  11  *  GPL-v2-or-later
  12  *
  13  * Any future contributions to this file after December 1st 2014 will be
  14  * taken to be licensed under the Softfloat-2a license unless specifically
  15  * indicated otherwise.
  16  */
  17
  18 /*
  19 ===============================================================================
  20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
  21 Arithmetic Package, Release 2a.
  22
  23 Written by John R. Hauser.  This work was made possible in part by the
  24 International Computer Science Institute, located at Suite 600, 1947 Center
  25 Street, Berkeley, California 94704.  Funding was partially provided by the
  26 National Science Foundation under grant MIP-9311980.  The original version
  27 of this code was written as part of a project to build a fixed-point vector
  28 processor in collaboration with the University of California at Berkeley,
  29 overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
  30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
  31 arithmetic/SoftFloat.html'.
  32
  33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
  34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
  35 TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
  36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
  37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
  38
  39 Derivative works are acceptable, even for commercial purposes, so long as
  40 (1) they include prominent notice that the work is derivative, and (2) they
  41 include prominent notice akin to these four paragraphs for those parts of
  42 this code that are retained.
  43
  44 ===============================================================================
  45 */
  46
  47 /* BSD licensing:
  48  * Copyright (c) 2006, Fabrice Bellard
  49  * All rights reserved.
  50  *
  51  * Redistribution and use in source and binary forms, with or without
  52  * modification, are permitted provided that the following conditions are met:
  53  *
  54  * 1. Redistributions of source code must retain the above copyright notice,
  55  * this list of conditions and the following disclaimer.
  56  *
  57  * 2. Redistributions in binary form must reproduce the above copyright notice,
  58  * this list of conditions and the following disclaimer in the documentation
  59  * and/or other materials provided with the distribution.
  60  *
  61  * 3. Neither the name of the copyright holder nor the names of its contributors
  62  * may be used to endorse or promote products derived from this software without
  63  * specific prior written permission.
  64  *
  65  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  66  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  67  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  68  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  69  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  70  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  71  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  72  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  73  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  74  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  75  * THE POSSIBILITY OF SUCH DAMAGE.
  76  */
  77
  78 /* Portions of this work are licensed under the terms of the GNU GPL,
  79  * version 2 or later. See the COPYING file in the top-level directory.
  80  */
  81
  82 /*
  83  * Define whether architecture deviates from IEEE in not supporting
  84  * signaling NaNs (so all NaNs are treated as quiet).
  85  */
  86 static inline bool no_signaling_nans(float_status *status)
  87 {
  88 #if defined(TARGET_XTENSA)
  89     return status->no_signaling_nans;
  90 #else
  91     return false;
  92 #endif
  93 }
  94
  95 /* Define how the architecture discriminates signaling NaNs.
  96  * This done with the most significant bit of the fraction.
  97  * In IEEE 754-1985 this was implementation defined, but in IEEE 754-2008
  98  * the msb must be zero.  MIPS is (so far) unique in supporting both the
  99  * 2008 revision and backward compatibility with their original choice.
 100  * Thus for MIPS we must make the choice at runtime.
 101  */
 102 static inline bool snan_bit_is_one(float_status *status)
 103 {
 104 #if defined(TARGET_MIPS)
 105     return status->snan_bit_is_one;
 106 #elif defined(TARGET_HPPA) || defined(TARGET_SH4)
 107     return 1;
 108 #else
 109     return 0;
 110 #endif
 111 }
 112
 113 /*----------------------------------------------------------------------------
 114 | For the deconstructed floating-point with fraction FRAC, return true
 115 | if the fraction represents a signalling NaN; otherwise false.
 116 *----------------------------------------------------------------------------*/
 117
 118 static bool parts_is_snan_frac(uint64_t frac, float_status *status)
 119 {
 120     if (no_signaling_nans(status)) {
 121         return false;
 122     } else {
 123         bool msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1);
 124         return msb == snan_bit_is_one(status);
 125     }
 126 }
 127
 128 /*----------------------------------------------------------------------------
 129 | The pattern for a default generated deconstructed floating-point NaN.
 130 *----------------------------------------------------------------------------*/
 131
 132 static FloatParts parts_default_nan(float_status *status)
 133 {
 134     bool sign = 0;
 135     uint64_t frac;
 136
 137 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
 138     /* !snan_bit_is_one, set all bits */
 139     frac = (1ULL << DECOMPOSED_BINARY_POINT) - 1;
 140 #elif defined(TARGET_I386) || defined(TARGET_X86_64) \
 141     || defined(TARGET_MICROBLAZE)
 142     /* !snan_bit_is_one, set sign and msb */
 143     frac = 1ULL << (DECOMPOSED_BINARY_POINT - 1);
 144     sign = 1;
 145 #elif defined(TARGET_HPPA)
 146     /* snan_bit_is_one, set msb-1.  */
 147     frac = 1ULL << (DECOMPOSED_BINARY_POINT - 2);
 148 #elif defined(TARGET_HEXAGON)
 149     sign = 1;
 150     frac = ~0ULL;
 151 #else
 152     /*
 153      * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
 154      * S390, SH4, TriCore, and Xtensa.  Our other supported targets,
 155      * CRIS, Nios2, and Tile, do not have floating-point.
 156      */
 157     if (snan_bit_is_one(status)) {
 158         /* set all bits other than msb */
 159         frac = (1ULL << (DECOMPOSED_BINARY_POINT - 1)) - 1;
 160     } else {
 161         /* set msb */
 162         frac = 1ULL << (DECOMPOSED_BINARY_POINT - 1);
 163     }
 164 #endif
 165
 166     return (FloatParts) {
 167         .cls = float_class_qnan,
 168         .sign = sign,
 169         .exp = INT_MAX,
 170         .frac = frac
 171     };
 172 }
 173
 174 /*----------------------------------------------------------------------------
 175 | Returns a quiet NaN from a signalling NaN for the deconstructed
 176 | floating-point parts.
 177 *----------------------------------------------------------------------------*/
 178
 179 static FloatParts parts_silence_nan(FloatParts a, float_status *status)
 180 {
 181     g_assert(!no_signaling_nans(status));
 182 #if defined(TARGET_HPPA)
 183     a.frac &= ~(1ULL << (DECOMPOSED_BINARY_POINT - 1));
 184     a.frac |= 1ULL << (DECOMPOSED_BINARY_POINT - 2);
 185 #else
 186     if (snan_bit_is_one(status)) {
 187         return parts_default_nan(status);
 188     } else {
 189         a.frac |= 1ULL << (DECOMPOSED_BINARY_POINT - 1);
 190     }
 191 #endif
 192     a.cls = float_class_qnan;
 193     return a;
 194 }
 195
 196 /*----------------------------------------------------------------------------
 197 | The pattern for a default generated extended double-precision NaN.
 198 *----------------------------------------------------------------------------*/
 199 floatx80 floatx80_default_nan(float_status *status)
 200 {
 201     floatx80 r;
 202
 203     /* None of the targets that have snan_bit_is_one use floatx80.  */
 204     assert(!snan_bit_is_one(status));
 205 #if defined(TARGET_M68K)
 206     r.low = UINT64_C(0xFFFFFFFFFFFFFFFF);
 207     r.high = 0x7FFF;
 208 #else
 209     /* X86 */
 210     r.low = UINT64_C(0xC000000000000000);
 211     r.high = 0xFFFF;
 212 #endif
 213     return r;
 214 }
 215
 216 /*----------------------------------------------------------------------------
 217 | The pattern for a default generated extended double-precision inf.
 218 *----------------------------------------------------------------------------*/
 219
 220 #define floatx80_infinity_high 0x7FFF
 221 #if defined(TARGET_M68K)
 222 #define floatx80_infinity_low  UINT64_C(0x0000000000000000)
 223 #else
 224 #define floatx80_infinity_low  UINT64_C(0x8000000000000000)
 225 #endif
 226
 227 const floatx80 floatx80_infinity
 228     = make_floatx80_init(floatx80_infinity_high, floatx80_infinity_low);
 229
 230 /*----------------------------------------------------------------------------
 231 | Internal canonical NaN format.
 232 *----------------------------------------------------------------------------*/
 233 typedef struct {
 234     bool sign;
 235     uint64_t high, low;
 236 } commonNaNT;
 237
 238 /*----------------------------------------------------------------------------
 239 | Returns 1 if the half-precision floating-point value `a' is a quiet
 240 | NaN; otherwise returns 0.
 241 *----------------------------------------------------------------------------*/
 242
 243 bool float16_is_quiet_nan(float16 a_, float_status *status)
 244 {
 245     if (no_signaling_nans(status)) {
 246         return float16_is_any_nan(a_);
 247     } else {
 248         uint16_t a = float16_val(a_);
 249         if (snan_bit_is_one(status)) {
 250             return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 251         } else {
 252
 253             return ((a >> 9) & 0x3F) == 0x3F;
 254         }
 255     }
 256 }
 257
 258 /*----------------------------------------------------------------------------
 259 | Returns 1 if the bfloat16 value `a' is a quiet
 260 | NaN; otherwise returns 0.
 261 *----------------------------------------------------------------------------*/
 262
 263 bool bfloat16_is_quiet_nan(bfloat16 a_, float_status *status)
 264 {
 265     if (no_signaling_nans(status)) {
 266         return bfloat16_is_any_nan(a_);
 267     } else {
 268         uint16_t a = a_;
 269         if (snan_bit_is_one(status)) {
 270             return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
 271         } else {
 272             return ((a >> 6) & 0x1FF) == 0x1FF;
 273         }
 274     }
 275 }
 276
 277 /*----------------------------------------------------------------------------
 278 | Returns 1 if the half-precision floating-point value `a' is a signaling
 279 | NaN; otherwise returns 0.
 280 *----------------------------------------------------------------------------*/
 281
 282 bool float16_is_signaling_nan(float16 a_, float_status *status)
 283 {
 284     if (no_signaling_nans(status)) {
 285         return 0;
 286     } else {
 287         uint16_t a = float16_val(a_);
 288         if (snan_bit_is_one(status)) {
 289             return ((a >> 9) & 0x3F) == 0x3F;
 290         } else {
 291             return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 292         }
 293     }
 294 }
 295
 296 /*----------------------------------------------------------------------------
 297 | Returns 1 if the bfloat16 value `a' is a signaling
 298 | NaN; otherwise returns 0.
 299 *----------------------------------------------------------------------------*/
 300
 301 bool bfloat16_is_signaling_nan(bfloat16 a_, float_status *status)
 302 {
 303     if (no_signaling_nans(status)) {
 304         return 0;
 305     } else {
 306         uint16_t a = a_;
 307         if (snan_bit_is_one(status)) {
 308             return ((a >> 6) & 0x1FF) == 0x1FF;
 309         } else {
 310             return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
 311         }
 312     }
 313 }
 314
 315 /*----------------------------------------------------------------------------
 316 | Returns 1 if the single-precision floating-point value `a' is a quiet
 317 | NaN; otherwise returns 0.
 318 *----------------------------------------------------------------------------*/
 319
 320 bool float32_is_quiet_nan(float32 a_, float_status *status)
 321 {
 322     if (no_signaling_nans(status)) {
 323         return float32_is_any_nan(a_);
 324     } else {
 325         uint32_t a = float32_val(a_);
 326         if (snan_bit_is_one(status)) {
 327             return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
 328         } else {
 329             return ((uint32_t)(a << 1) >= 0xFF800000);
 330         }
 331     }
 332 }
 333
 334 /*----------------------------------------------------------------------------
 335 | Returns 1 if the single-precision floating-point value `a' is a signaling
 336 | NaN; otherwise returns 0.
 337 *----------------------------------------------------------------------------*/
 338
 339 bool float32_is_signaling_nan(float32 a_, float_status *status)
 340 {
 341     if (no_signaling_nans(status)) {
 342         return 0;
 343     } else {
 344         uint32_t a = float32_val(a_);
 345         if (snan_bit_is_one(status)) {
 346             return ((uint32_t)(a << 1) >= 0xFF800000);
 347         } else {
 348             return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
 349         }
 350     }
 351 }
 352
 353 /*----------------------------------------------------------------------------
 354 | Returns the result of converting the single-precision floating-point NaN
 355 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 356 | exception is raised.
 357 *----------------------------------------------------------------------------*/
 358
 359 static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
 360 {
 361     commonNaNT z;
 362
 363     if (float32_is_signaling_nan(a, status)) {
 364         float_raise(float_flag_invalid, status);
 365     }
 366     z.sign = float32_val(a) >> 31;
 367     z.low = 0;
 368     z.high = ((uint64_t)float32_val(a)) << 41;
 369     return z;
 370 }
 371
 372 /*----------------------------------------------------------------------------
 373 | Returns the result of converting the canonical NaN `a' to the single-
 374 | precision floating-point format.
 375 *----------------------------------------------------------------------------*/
 376
 377 static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
 378 {
 379     uint32_t mantissa = a.high >> 41;
 380
 381     if (status->default_nan_mode) {
 382         return float32_default_nan(status);
 383     }
 384
 385     if (mantissa) {
 386         return make_float32(
 387             (((uint32_t)a.sign) << 31) | 0x7F800000 | (a.high >> 41));
 388     } else {
 389         return float32_default_nan(status);
 390     }
 391 }
 392
 393 /*----------------------------------------------------------------------------
 394 | Select which NaN to propagate for a two-input operation.
 395 | IEEE754 doesn't specify all the details of this, so the
 396 | algorithm is target-specific.
 397 | The routine is passed various bits of information about the
 398 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
 399 | Note that signalling NaNs are always squashed to quiet NaNs
 400 | by the caller, by calling floatXX_silence_nan() before
 401 | returning them.
 402 |
 403 | aIsLargerSignificand is only valid if both a and b are NaNs
 404 | of some kind, and is true if a has the larger significand,
 405 | or if both a and b have the same significand but a is
 406 | positive but b is negative. It is only needed for the x87
 407 | tie-break rule.
 408 *----------------------------------------------------------------------------*/
 409
 410 static int pickNaN(FloatClass a_cls, FloatClass b_cls,
 411                    bool aIsLargerSignificand, float_status *status)
 412 {
 413 #if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA)
 414     /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
 415      * the first of:
 416      *  1. A if it is signaling
 417      *  2. B if it is signaling
 418      *  3. A (quiet)
 419      *  4. B (quiet)
 420      * A signaling NaN is always quietened before returning it.
 421      */
 422     /* According to MIPS specifications, if one of the two operands is
 423      * a sNaN, a new qNaN has to be generated. This is done in
 424      * floatXX_silence_nan(). For qNaN inputs the specifications
 425      * says: "When possible, this QNaN result is one of the operand QNaN
 426      * values." In practice it seems that most implementations choose
 427      * the first operand if both operands are qNaN. In short this gives
 428      * the following rules:
 429      *  1. A if it is signaling
 430      *  2. B if it is signaling
 431      *  3. A (quiet)
 432      *  4. B (quiet)
 433      * A signaling NaN is always silenced before returning it.
 434      */
 435     if (is_snan(a_cls)) {
 436         return 0;
 437     } else if (is_snan(b_cls)) {
 438         return 1;
 439     } else if (is_qnan(a_cls)) {
 440         return 0;
 441     } else {
 442         return 1;
 443     }
 444 #elif defined(TARGET_PPC) || defined(TARGET_M68K)
 445     /* PowerPC propagation rules:
 446      *  1. A if it sNaN or qNaN
 447      *  2. B if it sNaN or qNaN
 448      * A signaling NaN is always silenced before returning it.
 449      */
 450     /* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
 451      * 3.4 FLOATING-POINT INSTRUCTION DETAILS
 452      * If either operand, but not both operands, of an operation is a
 453      * nonsignaling NaN, then that NaN is returned as the result. If both
 454      * operands are nonsignaling NaNs, then the destination operand
 455      * nonsignaling NaN is returned as the result.
 456      * If either operand to an operation is a signaling NaN (SNaN), then the
 457      * SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
 458      * is set in the FPCR ENABLE byte, then the exception is taken and the
 459      * destination is not modified. If the SNaN exception enable bit is not
 460      * set, setting the SNaN bit in the operand to a one converts the SNaN to
 461      * a nonsignaling NaN. The operation then continues as described in the
 462      * preceding paragraph for nonsignaling NaNs.
 463      */
 464     if (is_nan(a_cls)) {
 465         return 0;
 466     } else {
 467         return 1;
 468     }
 469 #elif defined(TARGET_XTENSA)
 470     /*
 471      * Xtensa has two NaN propagation modes.
 472      * Which one is active is controlled by float_status::use_first_nan.
 473      */
 474     if (status->use_first_nan) {
 475         if (is_nan(a_cls)) {
 476             return 0;
 477         } else {
 478             return 1;
 479         }
 480     } else {
 481         if (is_nan(b_cls)) {
 482             return 1;
 483         } else {
 484             return 0;
 485         }
 486     }
 487 #else
 488     /* This implements x87 NaN propagation rules:
 489      * SNaN + QNaN => return the QNaN
 490      * two SNaNs => return the one with the larger significand, silenced
 491      * two QNaNs => return the one with the larger significand
 492      * SNaN and a non-NaN => return the SNaN, silenced
 493      * QNaN and a non-NaN => return the QNaN
 494      *
 495      * If we get down to comparing significands and they are the same,
 496      * return the NaN with the positive sign bit (if any).
 497      */
 498     if (is_snan(a_cls)) {
 499         if (is_snan(b_cls)) {
 500             return aIsLargerSignificand ? 0 : 1;
 501         }
 502         return is_qnan(b_cls) ? 1 : 0;
 503     } else if (is_qnan(a_cls)) {
 504         if (is_snan(b_cls) || !is_qnan(b_cls)) {
 505             return 0;
 506         } else {
 507             return aIsLargerSignificand ? 0 : 1;
 508         }
 509     } else {
 510         return 1;
 511     }
 512 #endif
 513 }
 514
 515 /*----------------------------------------------------------------------------
 516 | Select which NaN to propagate for a three-input operation.
 517 | For the moment we assume that no CPU needs the 'larger significand'
 518 | information.
 519 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
 520 *----------------------------------------------------------------------------*/
 521 static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
 522                          bool infzero, float_status *status)
 523 {
 524 #if defined(TARGET_ARM)
 525     /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
 526      * the default NaN
 527      */
 528     if (infzero && is_qnan(c_cls)) {
 529         float_raise(float_flag_invalid, status);
 530         return 3;
 531     }
 532
 533     /* This looks different from the ARM ARM pseudocode, because the ARM ARM
 534      * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
 535      */
 536     if (is_snan(c_cls)) {
 537         return 2;
 538     } else if (is_snan(a_cls)) {
 539         return 0;
 540     } else if (is_snan(b_cls)) {
 541         return 1;
 542     } else if (is_qnan(c_cls)) {
 543         return 2;
 544     } else if (is_qnan(a_cls)) {
 545         return 0;
 546     } else {
 547         return 1;
 548     }
 549 #elif defined(TARGET_MIPS)
 550     if (snan_bit_is_one(status)) {
 551         /*
 552          * For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan)
 553          * case sets InvalidOp and returns the default NaN
 554          */
 555         if (infzero) {
 556             float_raise(float_flag_invalid, status);
 557             return 3;
 558         }
 559         /* Prefer sNaN over qNaN, in the a, b, c order. */
 560         if (is_snan(a_cls)) {
 561             return 0;
 562         } else if (is_snan(b_cls)) {
 563             return 1;
 564         } else if (is_snan(c_cls)) {
 565             return 2;
 566         } else if (is_qnan(a_cls)) {
 567             return 0;
 568         } else if (is_qnan(b_cls)) {
 569             return 1;
 570         } else {
 571             return 2;
 572         }
 573     } else {
 574         /*
 575          * For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan)
 576          * case sets InvalidOp and returns the input value 'c'
 577          */
 578         if (infzero) {
 579             float_raise(float_flag_invalid, status);
 580             return 2;
 581         }
 582         /* Prefer sNaN over qNaN, in the c, a, b order. */
 583         if (is_snan(c_cls)) {
 584             return 2;
 585         } else if (is_snan(a_cls)) {
 586             return 0;
 587         } else if (is_snan(b_cls)) {
 588             return 1;
 589         } else if (is_qnan(c_cls)) {
 590             return 2;
 591         } else if (is_qnan(a_cls)) {
 592             return 0;
 593         } else {
 594             return 1;
 595         }
 596     }
 597 #elif defined(TARGET_PPC)
 598     /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
 599      * to return an input NaN if we have one (ie c) rather than generating
 600      * a default NaN
 601      */
 602     if (infzero) {
 603         float_raise(float_flag_invalid, status);
 604         return 2;
 605     }
 606
 607     /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
 608      * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
 609      */
 610     if (is_nan(a_cls)) {
 611         return 0;
 612     } else if (is_nan(c_cls)) {
 613         return 2;
 614     } else {
 615         return 1;
 616     }
 617 #elif defined(TARGET_RISCV)
 618     /* For RISC-V, InvalidOp is set when multiplicands are Inf and zero */
 619     if (infzero) {
 620         float_raise(float_flag_invalid, status);
 621     }
 622     return 3; /* default NaN */
 623 #elif defined(TARGET_XTENSA)
 624     /*
 625      * For Xtensa, the (inf,zero,nan) case sets InvalidOp and returns
 626      * an input NaN if we have one (ie c).
 627      */
 628     if (infzero) {
 629         float_raise(float_flag_invalid, status);
 630         return 2;
 631     }
 632     if (status->use_first_nan) {
 633         if (is_nan(a_cls)) {
 634             return 0;
 635         } else if (is_nan(b_cls)) {
 636             return 1;
 637         } else {
 638             return 2;
 639         }
 640     } else {
 641         if (is_nan(c_cls)) {
 642             return 2;
 643         } else if (is_nan(b_cls)) {
 644             return 1;
 645         } else {
 646             return 0;
 647         }
 648     }
 649 #else
 650     /* A default implementation: prefer a to b to c.
 651      * This is unlikely to actually match any real implementation.
 652      */
 653     if (is_nan(a_cls)) {
 654         return 0;
 655     } else if (is_nan(b_cls)) {
 656         return 1;
 657     } else {
 658         return 2;
 659     }
 660 #endif
 661 }
 662
 663 /*----------------------------------------------------------------------------
 664 | Takes two single-precision floating-point values `a' and `b', one of which
 665 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 666 | signaling NaN, the invalid exception is raised.
 667 *----------------------------------------------------------------------------*/
 668
 669 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
 670 {
 671     bool aIsLargerSignificand;
 672     uint32_t av, bv;
 673     FloatClass a_cls, b_cls;
 674
 675     /* This is not complete, but is good enough for pickNaN.  */
 676     a_cls = (!float32_is_any_nan(a)
 677              ? float_class_normal
 678              : float32_is_signaling_nan(a, status)
 679              ? float_class_snan
 680              : float_class_qnan);
 681     b_cls = (!float32_is_any_nan(b)
 682              ? float_class_normal
 683              : float32_is_signaling_nan(b, status)
 684              ? float_class_snan
 685              : float_class_qnan);
 686
 687     av = float32_val(a);
 688     bv = float32_val(b);
 689
 690     if (is_snan(a_cls) || is_snan(b_cls)) {
 691         float_raise(float_flag_invalid, status);
 692     }
 693
 694     if (status->default_nan_mode) {
 695         return float32_default_nan(status);
 696     }
 697
 698     if ((uint32_t)(av << 1) < (uint32_t)(bv << 1)) {
 699         aIsLargerSignificand = 0;
 700     } else if ((uint32_t)(bv << 1) < (uint32_t)(av << 1)) {
 701         aIsLargerSignificand = 1;
 702     } else {
 703         aIsLargerSignificand = (av < bv) ? 1 : 0;
 704     }
 705
 706     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
 707         if (is_snan(b_cls)) {
 708             return float32_silence_nan(b, status);
 709         }
 710         return b;
 711     } else {
 712         if (is_snan(a_cls)) {
 713             return float32_silence_nan(a, status);
 714         }
 715         return a;
 716     }
 717 }
 718
 719 /*----------------------------------------------------------------------------
 720 | Returns 1 if the double-precision floating-point value `a' is a quiet
 721 | NaN; otherwise returns 0.
 722 *----------------------------------------------------------------------------*/
 723
 724 bool float64_is_quiet_nan(float64 a_, float_status *status)
 725 {
 726     if (no_signaling_nans(status)) {
 727         return float64_is_any_nan(a_);
 728     } else {
 729         uint64_t a = float64_val(a_);
 730         if (snan_bit_is_one(status)) {
 731             return (((a >> 51) & 0xFFF) == 0xFFE)
 732                 && (a & 0x0007FFFFFFFFFFFFULL);
 733         } else {
 734             return ((a << 1) >= 0xFFF0000000000000ULL);
 735         }
 736     }
 737 }
 738
 739 /*----------------------------------------------------------------------------
 740 | Returns 1 if the double-precision floating-point value `a' is a signaling
 741 | NaN; otherwise returns 0.
 742 *----------------------------------------------------------------------------*/
 743
 744 bool float64_is_signaling_nan(float64 a_, float_status *status)
 745 {
 746     if (no_signaling_nans(status)) {
 747         return 0;
 748     } else {
 749         uint64_t a = float64_val(a_);
 750         if (snan_bit_is_one(status)) {
 751             return ((a << 1) >= 0xFFF0000000000000ULL);
 752         } else {
 753             return (((a >> 51) & 0xFFF) == 0xFFE)
 754                 && (a & UINT64_C(0x0007FFFFFFFFFFFF));
 755         }
 756     }
 757 }
 758
 759 /*----------------------------------------------------------------------------
 760 | Returns the result of converting the double-precision floating-point NaN
 761 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 762 | exception is raised.
 763 *----------------------------------------------------------------------------*/
 764
 765 static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
 766 {
 767     commonNaNT z;
 768
 769     if (float64_is_signaling_nan(a, status)) {
 770         float_raise(float_flag_invalid, status);
 771     }
 772     z.sign = float64_val(a) >> 63;
 773     z.low = 0;
 774     z.high = float64_val(a) << 12;
 775     return z;
 776 }
 777
 778 /*----------------------------------------------------------------------------
 779 | Returns the result of converting the canonical NaN `a' to the double-
 780 | precision floating-point format.
 781 *----------------------------------------------------------------------------*/
 782
 783 static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
 784 {
 785     uint64_t mantissa = a.high >> 12;
 786
 787     if (status->default_nan_mode) {
 788         return float64_default_nan(status);
 789     }
 790
 791     if (mantissa) {
 792         return make_float64(
 793               (((uint64_t) a.sign) << 63)
 794             | UINT64_C(0x7FF0000000000000)
 795             | (a.high >> 12));
 796     } else {
 797         return float64_default_nan(status);
 798     }
 799 }
 800
 801 /*----------------------------------------------------------------------------
 802 | Takes two double-precision floating-point values `a' and `b', one of which
 803 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 804 | signaling NaN, the invalid exception is raised.
 805 *----------------------------------------------------------------------------*/
 806
 807 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
 808 {
 809     bool aIsLargerSignificand;
 810     uint64_t av, bv;
 811     FloatClass a_cls, b_cls;
 812
 813     /* This is not complete, but is good enough for pickNaN.  */
 814     a_cls = (!float64_is_any_nan(a)
 815              ? float_class_normal
 816              : float64_is_signaling_nan(a, status)
 817              ? float_class_snan
 818              : float_class_qnan);
 819     b_cls = (!float64_is_any_nan(b)
 820              ? float_class_normal
 821              : float64_is_signaling_nan(b, status)
 822              ? float_class_snan
 823              : float_class_qnan);
 824
 825     av = float64_val(a);
 826     bv = float64_val(b);
 827
 828     if (is_snan(a_cls) || is_snan(b_cls)) {
 829         float_raise(float_flag_invalid, status);
 830     }
 831
 832     if (status->default_nan_mode) {
 833         return float64_default_nan(status);
 834     }
 835
 836     if ((uint64_t)(av << 1) < (uint64_t)(bv << 1)) {
 837         aIsLargerSignificand = 0;
 838     } else if ((uint64_t)(bv << 1) < (uint64_t)(av << 1)) {
 839         aIsLargerSignificand = 1;
 840     } else {
 841         aIsLargerSignificand = (av < bv) ? 1 : 0;
 842     }
 843
 844     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
 845         if (is_snan(b_cls)) {
 846             return float64_silence_nan(b, status);
 847         }
 848         return b;
 849     } else {
 850         if (is_snan(a_cls)) {
 851             return float64_silence_nan(a, status);
 852         }
 853         return a;
 854     }
 855 }
 856
 857 /*----------------------------------------------------------------------------
 858 | Returns 1 if the extended double-precision floating-point value `a' is a
 859 | quiet NaN; otherwise returns 0. This slightly differs from the same
 860 | function for other types as floatx80 has an explicit bit.
 861 *----------------------------------------------------------------------------*/
 862
 863 int floatx80_is_quiet_nan(floatx80 a, float_status *status)
 864 {
 865     if (no_signaling_nans(status)) {
 866         return floatx80_is_any_nan(a);
 867     } else {
 868         if (snan_bit_is_one(status)) {
 869             uint64_t aLow;
 870
 871             aLow = a.low & ~0x4000000000000000ULL;
 872             return ((a.high & 0x7FFF) == 0x7FFF)
 873                 && (aLow << 1)
 874                 && (a.low == aLow);
 875         } else {
 876             return ((a.high & 0x7FFF) == 0x7FFF)
 877                 && (UINT64_C(0x8000000000000000) <= ((uint64_t)(a.low << 1)));
 878         }
 879     }
 880 }
 881
 882 /*----------------------------------------------------------------------------
 883 | Returns 1 if the extended double-precision floating-point value `a' is a
 884 | signaling NaN; otherwise returns 0. This slightly differs from the same
 885 | function for other types as floatx80 has an explicit bit.
 886 *----------------------------------------------------------------------------*/
 887
 888 int floatx80_is_signaling_nan(floatx80 a, float_status *status)
 889 {
 890     if (no_signaling_nans(status)) {
 891         return 0;
 892     } else {
 893         if (snan_bit_is_one(status)) {
 894             return ((a.high & 0x7FFF) == 0x7FFF)
 895                 && ((a.low << 1) >= 0x8000000000000000ULL);
 896         } else {
 897             uint64_t aLow;
 898
 899             aLow = a.low & ~UINT64_C(0x4000000000000000);
 900             return ((a.high & 0x7FFF) == 0x7FFF)
 901                 && (uint64_t)(aLow << 1)
 902                 && (a.low == aLow);
 903         }
 904     }
 905 }
 906
 907 /*----------------------------------------------------------------------------
 908 | Returns a quiet NaN from a signalling NaN for the extended double-precision
 909 | floating point value `a'.
 910 *----------------------------------------------------------------------------*/
 911
 912 floatx80 floatx80_silence_nan(floatx80 a, float_status *status)
 913 {
 914     /* None of the targets that have snan_bit_is_one use floatx80.  */
 915     assert(!snan_bit_is_one(status));
 916     a.low |= UINT64_C(0xC000000000000000);
 917     return a;
 918 }
 919
 920 /*----------------------------------------------------------------------------
 921 | Returns the result of converting the extended double-precision floating-
 922 | point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the
 923 | invalid exception is raised.
 924 *----------------------------------------------------------------------------*/
 925
 926 static commonNaNT floatx80ToCommonNaN(floatx80 a, float_status *status)
 927 {
 928     floatx80 dflt;
 929     commonNaNT z;
 930
 931     if (floatx80_is_signaling_nan(a, status)) {
 932         float_raise(float_flag_invalid, status);
 933     }
 934     if (a.low >> 63) {
 935         z.sign = a.high >> 15;
 936         z.low = 0;
 937         z.high = a.low << 1;
 938     } else {
 939         dflt = floatx80_default_nan(status);
 940         z.sign = dflt.high >> 15;
 941         z.low = 0;
 942         z.high = dflt.low << 1;
 943     }
 944     return z;
 945 }
 946
 947 /*----------------------------------------------------------------------------
 948 | Returns the result of converting the canonical NaN `a' to the extended
 949 | double-precision floating-point format.
 950 *----------------------------------------------------------------------------*/
 951
 952 static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
 953 {
 954     floatx80 z;
 955
 956     if (status->default_nan_mode) {
 957         return floatx80_default_nan(status);
 958     }
 959
 960     if (a.high >> 1) {
 961         z.low = UINT64_C(0x8000000000000000) | a.high >> 1;
 962         z.high = (((uint16_t)a.sign) << 15) | 0x7FFF;
 963     } else {
 964         z = floatx80_default_nan(status);
 965     }
 966     return z;
 967 }
 968
 969 /*----------------------------------------------------------------------------
 970 | Takes two extended double-precision floating-point values `a' and `b', one
 971 | of which is a NaN, and returns the appropriate NaN result.  If either `a' or
 972 | `b' is a signaling NaN, the invalid exception is raised.
 973 *----------------------------------------------------------------------------*/
 974
 975 floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status)
 976 {
 977     bool aIsLargerSignificand;
 978     FloatClass a_cls, b_cls;
 979
 980     /* This is not complete, but is good enough for pickNaN.  */
 981     a_cls = (!floatx80_is_any_nan(a)
 982              ? float_class_normal
 983              : floatx80_is_signaling_nan(a, status)
 984              ? float_class_snan
 985              : float_class_qnan);
 986     b_cls = (!floatx80_is_any_nan(b)
 987              ? float_class_normal
 988              : floatx80_is_signaling_nan(b, status)
 989              ? float_class_snan
 990              : float_class_qnan);
 991
 992     if (is_snan(a_cls) || is_snan(b_cls)) {
 993         float_raise(float_flag_invalid, status);
 994     }
 995
 996     if (status->default_nan_mode) {
 997         return floatx80_default_nan(status);
 998     }
 999
1000     if (a.low < b.low) {
1001         aIsLargerSignificand = 0;
1002     } else if (b.low < a.low) {
1003         aIsLargerSignificand = 1;
1004     } else {
1005         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1006     }
1007
1008     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
1009         if (is_snan(b_cls)) {
1010             return floatx80_silence_nan(b, status);
1011         }
1012         return b;
1013     } else {
1014         if (is_snan(a_cls)) {
1015             return floatx80_silence_nan(a, status);
1016         }
1017         return a;
1018     }
1019 }
1020
1021 /*----------------------------------------------------------------------------
1022 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1023 | NaN; otherwise returns 0.
1024 *----------------------------------------------------------------------------*/
1025
1026 bool float128_is_quiet_nan(float128 a, float_status *status)
1027 {
1028     if (no_signaling_nans(status)) {
1029         return float128_is_any_nan(a);
1030     } else {
1031         if (snan_bit_is_one(status)) {
1032             return (((a.high >> 47) & 0xFFFF) == 0xFFFE)
1033                 && (a.low || (a.high & 0x00007FFFFFFFFFFFULL));
1034         } else {
1035             return ((a.high << 1) >= 0xFFFF000000000000ULL)
1036                 && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL));
1037         }
1038     }
1039 }
1040
1041 /*----------------------------------------------------------------------------
1042 | Returns 1 if the quadruple-precision floating-point value `a' is a
1043 | signaling NaN; otherwise returns 0.
1044 *----------------------------------------------------------------------------*/
1045
1046 bool float128_is_signaling_nan(float128 a, float_status *status)
1047 {
1048     if (no_signaling_nans(status)) {
1049         return 0;
1050     } else {
1051         if (snan_bit_is_one(status)) {
1052             return ((a.high << 1) >= 0xFFFF000000000000ULL)
1053                 && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL));
1054         } else {
1055             return (((a.high >> 47) & 0xFFFF) == 0xFFFE)
1056                 && (a.low || (a.high & UINT64_C(0x00007FFFFFFFFFFF)));
1057         }
1058     }
1059 }
1060
1061 /*----------------------------------------------------------------------------
1062 | Returns a quiet NaN from a signalling NaN for the quadruple-precision
1063 | floating point value `a'.
1064 *----------------------------------------------------------------------------*/
1065
1066 float128 float128_silence_nan(float128 a, float_status *status)
1067 {
1068     if (no_signaling_nans(status)) {
1069         g_assert_not_reached();
1070     } else {
1071         if (snan_bit_is_one(status)) {
1072             return float128_default_nan(status);
1073         } else {
1074             a.high |= UINT64_C(0x0000800000000000);
1075             return a;
1076         }
1077     }
1078 }
1079
1080 /*----------------------------------------------------------------------------
1081 | Returns the result of converting the quadruple-precision floating-point NaN
1082 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
1083 | exception is raised.
1084 *----------------------------------------------------------------------------*/
1085
1086 static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
1087 {
1088     commonNaNT z;
1089
1090     if (float128_is_signaling_nan(a, status)) {
1091         float_raise(float_flag_invalid, status);
1092     }
1093     z.sign = a.high >> 63;
1094     shortShift128Left(a.high, a.low, 16, &z.high, &z.low);
1095     return z;
1096 }
1097
1098 /*----------------------------------------------------------------------------
1099 | Returns the result of converting the canonical NaN `a' to the quadruple-
1100 | precision floating-point format.
1101 *----------------------------------------------------------------------------*/
1102
1103 static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
1104 {
1105     float128 z;
1106
1107     if (status->default_nan_mode) {
1108         return float128_default_nan(status);
1109     }
1110
1111     shift128Right(a.high, a.low, 16, &z.high, &z.low);
1112     z.high |= (((uint64_t)a.sign) << 63) | UINT64_C(0x7FFF000000000000);
1113     return z;
1114 }
1115
1116 /*----------------------------------------------------------------------------
1117 | Takes two quadruple-precision floating-point values `a' and `b', one of
1118 | which is a NaN, and returns the appropriate NaN result.  If either `a' or
1119 | `b' is a signaling NaN, the invalid exception is raised.
1120 *----------------------------------------------------------------------------*/
1121
1122 static float128 propagateFloat128NaN(float128 a, float128 b,
1123                                      float_status *status)
1124 {
1125     bool aIsLargerSignificand;
1126     FloatClass a_cls, b_cls;
1127
1128     /* This is not complete, but is good enough for pickNaN.  */
1129     a_cls = (!float128_is_any_nan(a)
1130              ? float_class_normal
1131              : float128_is_signaling_nan(a, status)
1132              ? float_class_snan
1133              : float_class_qnan);
1134     b_cls = (!float128_is_any_nan(b)
1135              ? float_class_normal
1136              : float128_is_signaling_nan(b, status)
1137              ? float_class_snan
1138              : float_class_qnan);
1139
1140     if (is_snan(a_cls) || is_snan(b_cls)) {
1141         float_raise(float_flag_invalid, status);
1142     }
1143
1144     if (status->default_nan_mode) {
1145         return float128_default_nan(status);
1146     }
1147
1148     if (lt128(a.high << 1, a.low, b.high << 1, b.low)) {
1149         aIsLargerSignificand = 0;
1150     } else if (lt128(b.high << 1, b.low, a.high << 1, a.low)) {
1151         aIsLargerSignificand = 1;
1152     } else {
1153         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1154     }
1155
1156     if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) {
1157         if (is_snan(b_cls)) {
1158             return float128_silence_nan(b, status);
1159         }
1160         return b;
1161     } else {
1162         if (is_snan(a_cls)) {
1163             return float128_silence_nan(a, status);
1164         }
1165         return a;
1166     }
1167 }