fpu/softfloat-specialize.h

   1 /*
   2  * QEMU float support
   3  *
   4  * Derived from SoftFloat.
   5  */
   6
   7 /*============================================================================
   8
   9 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
  10 Arithmetic Package, Release 2b.
  11
  12 Written by John R. Hauser.  This work was made possible in part by the
  13 International Computer Science Institute, located at Suite 600, 1947 Center
  14 Street, Berkeley, California 94704.  Funding was partially provided by the
  15 National Science Foundation under grant MIP-9311980.  The original version
  16 of this code was written as part of a project to build a fixed-point vector
  17 processor in collaboration with the University of California at Berkeley,
  18 overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
  19 is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
  20 arithmetic/SoftFloat.html'.
  21
  22 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has
  23 been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
  24 RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
  25 AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
  26 COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
  27 EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
  28 INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
  29 OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
  30
  31 Derivative works are acceptable, even for commercial purposes, so long as
  32 (1) the source code for the derivative work includes prominent notice that
  33 the work is derivative, and (2) the source code includes prominent notice with
  34 these four paragraphs for those parts of this code that are retained.
  35
  36 =============================================================================*/
  37
  38 #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
  39 #define SNAN_BIT_IS_ONE         1
  40 #else
  41 #define SNAN_BIT_IS_ONE         0
  42 #endif
  43
  44 #if defined(TARGET_XTENSA)
  45 /* Define for architectures which deviate from IEEE in not supporting
  46  * signaling NaNs (so all NaNs are treated as quiet).
  47  */
  48 #define NO_SIGNALING_NANS 1
  49 #endif
  50
  51 /*----------------------------------------------------------------------------
  52 | The pattern for a default generated half-precision NaN.
  53 *----------------------------------------------------------------------------*/
  54 #if defined(TARGET_ARM)
  55 const float16 float16_default_nan = const_float16(0x7E00);
  56 #elif SNAN_BIT_IS_ONE
  57 const float16 float16_default_nan = const_float16(0x7DFF);
  58 #else
  59 const float16 float16_default_nan = const_float16(0xFE00);
  60 #endif
  61
  62 /*----------------------------------------------------------------------------
  63 | The pattern for a default generated single-precision NaN.
  64 *----------------------------------------------------------------------------*/
  65 #if defined(TARGET_SPARC)
  66 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
  67 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
  68       defined(TARGET_XTENSA)
  69 const float32 float32_default_nan = const_float32(0x7FC00000);
  70 #elif SNAN_BIT_IS_ONE
  71 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
  72 #else
  73 const float32 float32_default_nan = const_float32(0xFFC00000);
  74 #endif
  75
  76 /*----------------------------------------------------------------------------
  77 | The pattern for a default generated double-precision NaN.
  78 *----------------------------------------------------------------------------*/
  79 #if defined(TARGET_SPARC)
  80 const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
  81 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
  82 const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
  83 #elif SNAN_BIT_IS_ONE
  84 const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF ));
  85 #else
  86 const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
  87 #endif
  88
  89 /*----------------------------------------------------------------------------
  90 | The pattern for a default generated extended double-precision NaN.
  91 *----------------------------------------------------------------------------*/
  92 #if SNAN_BIT_IS_ONE
  93 #define floatx80_default_nan_high 0x7FFF
  94 #define floatx80_default_nan_low  LIT64( 0xBFFFFFFFFFFFFFFF )
  95 #else
  96 #define floatx80_default_nan_high 0xFFFF
  97 #define floatx80_default_nan_low  LIT64( 0xC000000000000000 )
  98 #endif
  99
 100 const floatx80 floatx80_default_nan
 101     = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
 102
 103 /*----------------------------------------------------------------------------
 104 | The pattern for a default generated quadruple-precision NaN.  The `high' and
 105 | `low' values hold the most- and least-significant bits, respectively.
 106 *----------------------------------------------------------------------------*/
 107 #if SNAN_BIT_IS_ONE
 108 #define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF )
 109 #define float128_default_nan_low  LIT64( 0xFFFFFFFFFFFFFFFF )
 110 #else
 111 #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
 112 #define float128_default_nan_low  LIT64( 0x0000000000000000 )
 113 #endif
 114
 115 const float128 float128_default_nan
 116     = make_float128_init(float128_default_nan_high, float128_default_nan_low);
 117
 118 /*----------------------------------------------------------------------------
 119 | Raises the exceptions specified by `flags'.  Floating-point traps can be
 120 | defined here if desired.  It is currently not possible for such a trap
 121 | to substitute a result value.  If traps are not implemented, this routine
 122 | should be simply `float_exception_flags |= flags;'.
 123 *----------------------------------------------------------------------------*/
 124
 125 void float_raise( int8 flags STATUS_PARAM )
 126 {
 127     STATUS(float_exception_flags) |= flags;
 128 }
 129
 130 /*----------------------------------------------------------------------------
 131 | Internal canonical NaN format.
 132 *----------------------------------------------------------------------------*/
 133 typedef struct {
 134     flag sign;
 135     uint64_t high, low;
 136 } commonNaNT;
 137
 138 #ifdef NO_SIGNALING_NANS
 139 int float16_is_quiet_nan(float16 a_)
 140 {
 141     return float16_is_any_nan(a_);
 142 }
 143
 144 int float16_is_signaling_nan(float16 a_)
 145 {
 146     return 0;
 147 }
 148 #else
 149 /*----------------------------------------------------------------------------
 150 | Returns 1 if the half-precision floating-point value `a' is a quiet
 151 | NaN; otherwise returns 0.
 152 *----------------------------------------------------------------------------*/
 153
 154 int float16_is_quiet_nan(float16 a_)
 155 {
 156     uint16_t a = float16_val(a_);
 157 #if SNAN_BIT_IS_ONE
 158     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 159 #else
 160     return ((a & ~0x8000) >= 0x7c80);
 161 #endif
 162 }
 163
 164 /*----------------------------------------------------------------------------
 165 | Returns 1 if the half-precision floating-point value `a' is a signaling
 166 | NaN; otherwise returns 0.
 167 *----------------------------------------------------------------------------*/
 168
 169 int float16_is_signaling_nan(float16 a_)
 170 {
 171     uint16_t a = float16_val(a_);
 172 #if SNAN_BIT_IS_ONE
 173     return ((a & ~0x8000) >= 0x7c80);
 174 #else
 175     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 176 #endif
 177 }
 178 #endif
 179
 180 /*----------------------------------------------------------------------------
 181 | Returns a quiet NaN if the half-precision floating point value `a' is a
 182 | signaling NaN; otherwise returns `a'.
 183 *----------------------------------------------------------------------------*/
 184 float16 float16_maybe_silence_nan(float16 a_)
 185 {
 186     if (float16_is_signaling_nan(a_)) {
 187 #if SNAN_BIT_IS_ONE
 188 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 189         return float16_default_nan;
 190 #  else
 191 #    error Rules for silencing a signaling NaN are target-specific
 192 #  endif
 193 #else
 194         uint16_t a = float16_val(a_);
 195         a |= (1 << 9);
 196         return make_float16(a);
 197 #endif
 198     }
 199     return a_;
 200 }
 201
 202 /*----------------------------------------------------------------------------
 203 | Returns the result of converting the half-precision floating-point NaN
 204 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 205 | exception is raised.
 206 *----------------------------------------------------------------------------*/
 207
 208 static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM )
 209 {
 210     commonNaNT z;
 211
 212     if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 213     z.sign = float16_val(a) >> 15;
 214     z.low = 0;
 215     z.high = ((uint64_t) float16_val(a))<<54;
 216     return z;
 217 }
 218
 219 /*----------------------------------------------------------------------------
 220 | Returns the result of converting the canonical NaN `a' to the half-
 221 | precision floating-point format.
 222 *----------------------------------------------------------------------------*/
 223
 224 static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM)
 225 {
 226     uint16_t mantissa = a.high>>54;
 227
 228     if (STATUS(default_nan_mode)) {
 229         return float16_default_nan;
 230     }
 231
 232     if (mantissa) {
 233         return make_float16(((((uint16_t) a.sign) << 15)
 234                              | (0x1F << 10) | mantissa));
 235     } else {
 236         return float16_default_nan;
 237     }
 238 }
 239
 240 #ifdef NO_SIGNALING_NANS
 241 int float32_is_quiet_nan(float32 a_)
 242 {
 243     return float32_is_any_nan(a_);
 244 }
 245
 246 int float32_is_signaling_nan(float32 a_)
 247 {
 248     return 0;
 249 }
 250 #else
 251 /*----------------------------------------------------------------------------
 252 | Returns 1 if the single-precision floating-point value `a' is a quiet
 253 | NaN; otherwise returns 0.
 254 *----------------------------------------------------------------------------*/
 255
 256 int float32_is_quiet_nan( float32 a_ )
 257 {
 258     uint32_t a = float32_val(a_);
 259 #if SNAN_BIT_IS_ONE
 260     return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
 261 #else
 262     return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
 263 #endif
 264 }
 265
 266 /*----------------------------------------------------------------------------
 267 | Returns 1 if the single-precision floating-point value `a' is a signaling
 268 | NaN; otherwise returns 0.
 269 *----------------------------------------------------------------------------*/
 270
 271 int float32_is_signaling_nan( float32 a_ )
 272 {
 273     uint32_t a = float32_val(a_);
 274 #if SNAN_BIT_IS_ONE
 275     return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
 276 #else
 277     return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
 278 #endif
 279 }
 280 #endif
 281
 282 /*----------------------------------------------------------------------------
 283 | Returns a quiet NaN if the single-precision floating point value `a' is a
 284 | signaling NaN; otherwise returns `a'.
 285 *----------------------------------------------------------------------------*/
 286
 287 float32 float32_maybe_silence_nan( float32 a_ )
 288 {
 289     if (float32_is_signaling_nan(a_)) {
 290 #if SNAN_BIT_IS_ONE
 291 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 292         return float32_default_nan;
 293 #  else
 294 #    error Rules for silencing a signaling NaN are target-specific
 295 #  endif
 296 #else
 297         uint32_t a = float32_val(a_);
 298         a |= (1 << 22);
 299         return make_float32(a);
 300 #endif
 301     }
 302     return a_;
 303 }
 304
 305 /*----------------------------------------------------------------------------
 306 | Returns the result of converting the single-precision floating-point NaN
 307 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 308 | exception is raised.
 309 *----------------------------------------------------------------------------*/
 310
 311 static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
 312 {
 313     commonNaNT z;
 314
 315     if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 316     z.sign = float32_val(a)>>31;
 317     z.low = 0;
 318     z.high = ( (uint64_t) float32_val(a) )<<41;
 319     return z;
 320 }
 321
 322 /*----------------------------------------------------------------------------
 323 | Returns the result of converting the canonical NaN `a' to the single-
 324 | precision floating-point format.
 325 *----------------------------------------------------------------------------*/
 326
 327 static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
 328 {
 329     uint32_t mantissa = a.high>>41;
 330
 331     if ( STATUS(default_nan_mode) ) {
 332         return float32_default_nan;
 333     }
 334
 335     if ( mantissa )
 336         return make_float32(
 337             ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
 338     else
 339         return float32_default_nan;
 340 }
 341
 342 /*----------------------------------------------------------------------------
 343 | Select which NaN to propagate for a two-input operation.
 344 | IEEE754 doesn't specify all the details of this, so the
 345 | algorithm is target-specific.
 346 | The routine is passed various bits of information about the
 347 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
 348 | Note that signalling NaNs are always squashed to quiet NaNs
 349 | by the caller, by calling floatXX_maybe_silence_nan() before
 350 | returning them.
 351 |
 352 | aIsLargerSignificand is only valid if both a and b are NaNs
 353 | of some kind, and is true if a has the larger significand,
 354 | or if both a and b have the same significand but a is
 355 | positive but b is negative. It is only needed for the x87
 356 | tie-break rule.
 357 *----------------------------------------------------------------------------*/
 358
 359 #if defined(TARGET_ARM)
 360 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 361                     flag aIsLargerSignificand)
 362 {
 363     /* ARM mandated NaN propagation rules: take the first of:
 364      *  1. A if it is signaling
 365      *  2. B if it is signaling
 366      *  3. A (quiet)
 367      *  4. B (quiet)
 368      * A signaling NaN is always quietened before returning it.
 369      */
 370     if (aIsSNaN) {
 371         return 0;
 372     } else if (bIsSNaN) {
 373         return 1;
 374     } else if (aIsQNaN) {
 375         return 0;
 376     } else {
 377         return 1;
 378     }
 379 }
 380 #elif defined(TARGET_MIPS)
 381 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 382                     flag aIsLargerSignificand)
 383 {
 384     /* According to MIPS specifications, if one of the two operands is
 385      * a sNaN, a new qNaN has to be generated. This is done in
 386      * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
 387      * says: "When possible, this QNaN result is one of the operand QNaN
 388      * values." In practice it seems that most implementations choose
 389      * the first operand if both operands are qNaN. In short this gives
 390      * the following rules:
 391      *  1. A if it is signaling
 392      *  2. B if it is signaling
 393      *  3. A (quiet)
 394      *  4. B (quiet)
 395      * A signaling NaN is always silenced before returning it.
 396      */
 397     if (aIsSNaN) {
 398         return 0;
 399     } else if (bIsSNaN) {
 400         return 1;
 401     } else if (aIsQNaN) {
 402         return 0;
 403     } else {
 404         return 1;
 405     }
 406 }
 407 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
 408 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 409                    flag aIsLargerSignificand)
 410 {
 411     /* PowerPC propagation rules:
 412      *  1. A if it sNaN or qNaN
 413      *  2. B if it sNaN or qNaN
 414      * A signaling NaN is always silenced before returning it.
 415      */
 416     if (aIsSNaN || aIsQNaN) {
 417         return 0;
 418     } else {
 419         return 1;
 420     }
 421 }
 422 #else
 423 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 424                     flag aIsLargerSignificand)
 425 {
 426     /* This implements x87 NaN propagation rules:
 427      * SNaN + QNaN => return the QNaN
 428      * two SNaNs => return the one with the larger significand, silenced
 429      * two QNaNs => return the one with the larger significand
 430      * SNaN and a non-NaN => return the SNaN, silenced
 431      * QNaN and a non-NaN => return the QNaN
 432      *
 433      * If we get down to comparing significands and they are the same,
 434      * return the NaN with the positive sign bit (if any).
 435      */
 436     if (aIsSNaN) {
 437         if (bIsSNaN) {
 438             return aIsLargerSignificand ? 0 : 1;
 439         }
 440         return bIsQNaN ? 1 : 0;
 441     }
 442     else if (aIsQNaN) {
 443         if (bIsSNaN || !bIsQNaN)
 444             return 0;
 445         else {
 446             return aIsLargerSignificand ? 0 : 1;
 447         }
 448     } else {
 449         return 1;
 450     }
 451 }
 452 #endif
 453
 454 /*----------------------------------------------------------------------------
 455 | Select which NaN to propagate for a three-input operation.
 456 | For the moment we assume that no CPU needs the 'larger significand'
 457 | information.
 458 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
 459 *----------------------------------------------------------------------------*/
 460 #if defined(TARGET_ARM)
 461 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 462                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 463 {
 464     /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
 465      * the default NaN
 466      */
 467     if (infzero && cIsQNaN) {
 468         float_raise(float_flag_invalid STATUS_VAR);
 469         return 3;
 470     }
 471
 472     /* This looks different from the ARM ARM pseudocode, because the ARM ARM
 473      * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
 474      */
 475     if (cIsSNaN) {
 476         return 2;
 477     } else if (aIsSNaN) {
 478         return 0;
 479     } else if (bIsSNaN) {
 480         return 1;
 481     } else if (cIsQNaN) {
 482         return 2;
 483     } else if (aIsQNaN) {
 484         return 0;
 485     } else {
 486         return 1;
 487     }
 488 }
 489 #elif defined(TARGET_MIPS)
 490 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 491                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 492 {
 493     /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
 494      * the default NaN
 495      */
 496     if (infzero) {
 497         float_raise(float_flag_invalid STATUS_VAR);
 498         return 3;
 499     }
 500
 501     /* Prefer sNaN over qNaN, in the a, b, c order. */
 502     if (aIsSNaN) {
 503         return 0;
 504     } else if (bIsSNaN) {
 505         return 1;
 506     } else if (cIsSNaN) {
 507         return 2;
 508     } else if (aIsQNaN) {
 509         return 0;
 510     } else if (bIsQNaN) {
 511         return 1;
 512     } else {
 513         return 2;
 514     }
 515 }
 516 #elif defined(TARGET_PPC)
 517 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 518                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 519 {
 520     /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
 521      * to return an input NaN if we have one (ie c) rather than generating
 522      * a default NaN
 523      */
 524     if (infzero) {
 525         float_raise(float_flag_invalid STATUS_VAR);
 526         return 2;
 527     }
 528
 529     /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
 530      * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
 531      */
 532     if (aIsSNaN || aIsQNaN) {
 533         return 0;
 534     } else if (cIsSNaN || cIsQNaN) {
 535         return 2;
 536     } else {
 537         return 1;
 538     }
 539 }
 540 #else
 541 /* A default implementation: prefer a to b to c.
 542  * This is unlikely to actually match any real implementation.
 543  */
 544 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 545                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 546 {
 547     if (aIsSNaN || aIsQNaN) {
 548         return 0;
 549     } else if (bIsSNaN || bIsQNaN) {
 550         return 1;
 551     } else {
 552         return 2;
 553     }
 554 }
 555 #endif
 556
 557 /*----------------------------------------------------------------------------
 558 | Takes two single-precision floating-point values `a' and `b', one of which
 559 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 560 | signaling NaN, the invalid exception is raised.
 561 *----------------------------------------------------------------------------*/
 562
 563 static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
 564 {
 565     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 566     flag aIsLargerSignificand;
 567     uint32_t av, bv;
 568
 569     aIsQuietNaN = float32_is_quiet_nan( a );
 570     aIsSignalingNaN = float32_is_signaling_nan( a );
 571     bIsQuietNaN = float32_is_quiet_nan( b );
 572     bIsSignalingNaN = float32_is_signaling_nan( b );
 573     av = float32_val(a);
 574     bv = float32_val(b);
 575
 576     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 577
 578     if ( STATUS(default_nan_mode) )
 579         return float32_default_nan;
 580
 581     if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
 582         aIsLargerSignificand = 0;
 583     } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
 584         aIsLargerSignificand = 1;
 585     } else {
 586         aIsLargerSignificand = (av < bv) ? 1 : 0;
 587     }
 588
 589     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 590                 aIsLargerSignificand)) {
 591         return float32_maybe_silence_nan(b);
 592     } else {
 593         return float32_maybe_silence_nan(a);
 594     }
 595 }
 596
 597 /*----------------------------------------------------------------------------
 598 | Takes three single-precision floating-point values `a', `b' and `c', one of
 599 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 600 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 601 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 602 | obviously c is a NaN, and whether to propagate c or some other NaN is
 603 | implementation defined).
 604 *----------------------------------------------------------------------------*/
 605
 606 static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
 607                                          float32 c, flag infzero STATUS_PARAM)
 608 {
 609     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 610         cIsQuietNaN, cIsSignalingNaN;
 611     int which;
 612
 613     aIsQuietNaN = float32_is_quiet_nan(a);
 614     aIsSignalingNaN = float32_is_signaling_nan(a);
 615     bIsQuietNaN = float32_is_quiet_nan(b);
 616     bIsSignalingNaN = float32_is_signaling_nan(b);
 617     cIsQuietNaN = float32_is_quiet_nan(c);
 618     cIsSignalingNaN = float32_is_signaling_nan(c);
 619
 620     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 621         float_raise(float_flag_invalid STATUS_VAR);
 622     }
 623
 624     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 625                           bIsQuietNaN, bIsSignalingNaN,
 626                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 627
 628     if (STATUS(default_nan_mode)) {
 629         /* Note that this check is after pickNaNMulAdd so that function
 630          * has an opportunity to set the Invalid flag.
 631          */
 632         return float32_default_nan;
 633     }
 634
 635     switch (which) {
 636     case 0:
 637         return float32_maybe_silence_nan(a);
 638     case 1:
 639         return float32_maybe_silence_nan(b);
 640     case 2:
 641         return float32_maybe_silence_nan(c);
 642     case 3:
 643     default:
 644         return float32_default_nan;
 645     }
 646 }
 647
 648 #ifdef NO_SIGNALING_NANS
 649 int float64_is_quiet_nan(float64 a_)
 650 {
 651     return float64_is_any_nan(a_);
 652 }
 653
 654 int float64_is_signaling_nan(float64 a_)
 655 {
 656     return 0;
 657 }
 658 #else
 659 /*----------------------------------------------------------------------------
 660 | Returns 1 if the double-precision floating-point value `a' is a quiet
 661 | NaN; otherwise returns 0.
 662 *----------------------------------------------------------------------------*/
 663
 664 int float64_is_quiet_nan( float64 a_ )
 665 {
 666     uint64_t a = float64_val(a_);
 667 #if SNAN_BIT_IS_ONE
 668     return
 669            ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
 670         && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
 671 #else
 672     return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
 673 #endif
 674 }
 675
 676 /*----------------------------------------------------------------------------
 677 | Returns 1 if the double-precision floating-point value `a' is a signaling
 678 | NaN; otherwise returns 0.
 679 *----------------------------------------------------------------------------*/
 680
 681 int float64_is_signaling_nan( float64 a_ )
 682 {
 683     uint64_t a = float64_val(a_);
 684 #if SNAN_BIT_IS_ONE
 685     return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
 686 #else
 687     return
 688            ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
 689         && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
 690 #endif
 691 }
 692 #endif
 693
 694 /*----------------------------------------------------------------------------
 695 | Returns a quiet NaN if the double-precision floating point value `a' is a
 696 | signaling NaN; otherwise returns `a'.
 697 *----------------------------------------------------------------------------*/
 698
 699 float64 float64_maybe_silence_nan( float64 a_ )
 700 {
 701     if (float64_is_signaling_nan(a_)) {
 702 #if SNAN_BIT_IS_ONE
 703 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 704         return float64_default_nan;
 705 #  else
 706 #    error Rules for silencing a signaling NaN are target-specific
 707 #  endif
 708 #else
 709         uint64_t a = float64_val(a_);
 710         a |= LIT64( 0x0008000000000000 );
 711         return make_float64(a);
 712 #endif
 713     }
 714     return a_;
 715 }
 716
 717 /*----------------------------------------------------------------------------
 718 | Returns the result of converting the double-precision floating-point NaN
 719 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 720 | exception is raised.
 721 *----------------------------------------------------------------------------*/
 722
 723 static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
 724 {
 725     commonNaNT z;
 726
 727     if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 728     z.sign = float64_val(a)>>63;
 729     z.low = 0;
 730     z.high = float64_val(a)<<12;
 731     return z;
 732 }
 733
 734 /*----------------------------------------------------------------------------
 735 | Returns the result of converting the canonical NaN `a' to the double-
 736 | precision floating-point format.
 737 *----------------------------------------------------------------------------*/
 738
 739 static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
 740 {
 741     uint64_t mantissa = a.high>>12;
 742
 743     if ( STATUS(default_nan_mode) ) {
 744         return float64_default_nan;
 745     }
 746
 747     if ( mantissa )
 748         return make_float64(
 749               ( ( (uint64_t) a.sign )<<63 )
 750             | LIT64( 0x7FF0000000000000 )
 751             | ( a.high>>12 ));
 752     else
 753         return float64_default_nan;
 754 }
 755
 756 /*----------------------------------------------------------------------------
 757 | Takes two double-precision floating-point values `a' and `b', one of which
 758 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 759 | signaling NaN, the invalid exception is raised.
 760 *----------------------------------------------------------------------------*/
 761
 762 static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
 763 {
 764     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 765     flag aIsLargerSignificand;
 766     uint64_t av, bv;
 767
 768     aIsQuietNaN = float64_is_quiet_nan( a );
 769     aIsSignalingNaN = float64_is_signaling_nan( a );
 770     bIsQuietNaN = float64_is_quiet_nan( b );
 771     bIsSignalingNaN = float64_is_signaling_nan( b );
 772     av = float64_val(a);
 773     bv = float64_val(b);
 774
 775     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 776
 777     if ( STATUS(default_nan_mode) )
 778         return float64_default_nan;
 779
 780     if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
 781         aIsLargerSignificand = 0;
 782     } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
 783         aIsLargerSignificand = 1;
 784     } else {
 785         aIsLargerSignificand = (av < bv) ? 1 : 0;
 786     }
 787
 788     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 789                 aIsLargerSignificand)) {
 790         return float64_maybe_silence_nan(b);
 791     } else {
 792         return float64_maybe_silence_nan(a);
 793     }
 794 }
 795
 796 /*----------------------------------------------------------------------------
 797 | Takes three double-precision floating-point values `a', `b' and `c', one of
 798 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 799 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 800 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 801 | obviously c is a NaN, and whether to propagate c or some other NaN is
 802 | implementation defined).
 803 *----------------------------------------------------------------------------*/
 804
 805 static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
 806                                          float64 c, flag infzero STATUS_PARAM)
 807 {
 808     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 809         cIsQuietNaN, cIsSignalingNaN;
 810     int which;
 811
 812     aIsQuietNaN = float64_is_quiet_nan(a);
 813     aIsSignalingNaN = float64_is_signaling_nan(a);
 814     bIsQuietNaN = float64_is_quiet_nan(b);
 815     bIsSignalingNaN = float64_is_signaling_nan(b);
 816     cIsQuietNaN = float64_is_quiet_nan(c);
 817     cIsSignalingNaN = float64_is_signaling_nan(c);
 818
 819     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 820         float_raise(float_flag_invalid STATUS_VAR);
 821     }
 822
 823     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 824                           bIsQuietNaN, bIsSignalingNaN,
 825                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 826
 827     if (STATUS(default_nan_mode)) {
 828         /* Note that this check is after pickNaNMulAdd so that function
 829          * has an opportunity to set the Invalid flag.
 830          */
 831         return float64_default_nan;
 832     }
 833
 834     switch (which) {
 835     case 0:
 836         return float64_maybe_silence_nan(a);
 837     case 1:
 838         return float64_maybe_silence_nan(b);
 839     case 2:
 840         return float64_maybe_silence_nan(c);
 841     case 3:
 842     default:
 843         return float64_default_nan;
 844     }
 845 }
 846
 847 #ifdef NO_SIGNALING_NANS
 848 int floatx80_is_quiet_nan(floatx80 a_)
 849 {
 850     return floatx80_is_any_nan(a_);
 851 }
 852
 853 int floatx80_is_signaling_nan(floatx80 a_)
 854 {
 855     return 0;
 856 }
 857 #else
 858 /*----------------------------------------------------------------------------
 859 | Returns 1 if the extended double-precision floating-point value `a' is a
 860 | quiet NaN; otherwise returns 0. This slightly differs from the same
 861 | function for other types as floatx80 has an explicit bit.
 862 *----------------------------------------------------------------------------*/
 863
 864 int floatx80_is_quiet_nan( floatx80 a )
 865 {
 866 #if SNAN_BIT_IS_ONE
 867     uint64_t aLow;
 868
 869     aLow = a.low & ~ LIT64( 0x4000000000000000 );
 870     return
 871            ( ( a.high & 0x7FFF ) == 0x7FFF )
 872         && (uint64_t) ( aLow<<1 )
 873         && ( a.low == aLow );
 874 #else
 875     return ( ( a.high & 0x7FFF ) == 0x7FFF )
 876         && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
 877 #endif
 878 }
 879
 880 /*----------------------------------------------------------------------------
 881 | Returns 1 if the extended double-precision floating-point value `a' is a
 882 | signaling NaN; otherwise returns 0. This slightly differs from the same
 883 | function for other types as floatx80 has an explicit bit.
 884 *----------------------------------------------------------------------------*/
 885
 886 int floatx80_is_signaling_nan( floatx80 a )
 887 {
 888 #if SNAN_BIT_IS_ONE
 889     return ( ( a.high & 0x7FFF ) == 0x7FFF )
 890         && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
 891 #else
 892     uint64_t aLow;
 893
 894     aLow = a.low & ~ LIT64( 0x4000000000000000 );
 895     return
 896            ( ( a.high & 0x7FFF ) == 0x7FFF )
 897         && (uint64_t) ( aLow<<1 )
 898         && ( a.low == aLow );
 899 #endif
 900 }
 901 #endif
 902
 903 /*----------------------------------------------------------------------------
 904 | Returns a quiet NaN if the extended double-precision floating point value
 905 | `a' is a signaling NaN; otherwise returns `a'.
 906 *----------------------------------------------------------------------------*/
 907
 908 floatx80 floatx80_maybe_silence_nan( floatx80 a )
 909 {
 910     if (floatx80_is_signaling_nan(a)) {
 911 #if SNAN_BIT_IS_ONE
 912 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 913         a.low = floatx80_default_nan_low;
 914         a.high = floatx80_default_nan_high;
 915 #  else
 916 #    error Rules for silencing a signaling NaN are target-specific
 917 #  endif
 918 #else
 919         a.low |= LIT64( 0xC000000000000000 );
 920         return a;
 921 #endif
 922     }
 923     return a;
 924 }
 925
 926 /*----------------------------------------------------------------------------
 927 | Returns the result of converting the extended double-precision floating-
 928 | point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the
 929 | invalid exception is raised.
 930 *----------------------------------------------------------------------------*/
 931
 932 static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
 933 {
 934     commonNaNT z;
 935
 936     if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 937     if ( a.low >> 63 ) {
 938         z.sign = a.high >> 15;
 939         z.low = 0;
 940         z.high = a.low << 1;
 941     } else {
 942         z.sign = floatx80_default_nan_high >> 15;
 943         z.low = 0;
 944         z.high = floatx80_default_nan_low << 1;
 945     }
 946     return z;
 947 }
 948
 949 /*----------------------------------------------------------------------------
 950 | Returns the result of converting the canonical NaN `a' to the extended
 951 | double-precision floating-point format.
 952 *----------------------------------------------------------------------------*/
 953
 954 static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
 955 {
 956     floatx80 z;
 957
 958     if ( STATUS(default_nan_mode) ) {
 959         z.low = floatx80_default_nan_low;
 960         z.high = floatx80_default_nan_high;
 961         return z;
 962     }
 963
 964     if (a.high >> 1) {
 965         z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
 966         z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
 967     } else {
 968         z.low = floatx80_default_nan_low;
 969         z.high = floatx80_default_nan_high;
 970     }
 971
 972     return z;
 973 }
 974
 975 /*----------------------------------------------------------------------------
 976 | Takes two extended double-precision floating-point values `a' and `b', one
 977 | of which is a NaN, and returns the appropriate NaN result.  If either `a' or
 978 | `b' is a signaling NaN, the invalid exception is raised.
 979 *----------------------------------------------------------------------------*/
 980
 981 static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
 982 {
 983     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 984     flag aIsLargerSignificand;
 985
 986     aIsQuietNaN = floatx80_is_quiet_nan( a );
 987     aIsSignalingNaN = floatx80_is_signaling_nan( a );
 988     bIsQuietNaN = floatx80_is_quiet_nan( b );
 989     bIsSignalingNaN = floatx80_is_signaling_nan( b );
 990
 991     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 992
 993     if ( STATUS(default_nan_mode) ) {
 994         a.low = floatx80_default_nan_low;
 995         a.high = floatx80_default_nan_high;
 996         return a;
 997     }
 998
 999     if (a.low < b.low) {
1000         aIsLargerSignificand = 0;
1001     } else if (b.low < a.low) {
1002         aIsLargerSignificand = 1;
1003     } else {
1004         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1005     }
1006
1007     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1008                 aIsLargerSignificand)) {
1009         return floatx80_maybe_silence_nan(b);
1010     } else {
1011         return floatx80_maybe_silence_nan(a);
1012     }
1013 }
1014
1015 #ifdef NO_SIGNALING_NANS
1016 int float128_is_quiet_nan(float128 a_)
1017 {
1018     return float128_is_any_nan(a_);
1019 }
1020
1021 int float128_is_signaling_nan(float128 a_)
1022 {
1023     return 0;
1024 }
1025 #else
1026 /*----------------------------------------------------------------------------
1027 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1028 | NaN; otherwise returns 0.
1029 *----------------------------------------------------------------------------*/
1030
1031 int float128_is_quiet_nan( float128 a )
1032 {
1033 #if SNAN_BIT_IS_ONE
1034     return
1035            ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1036         && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1037 #else
1038     return
1039            ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
1040         && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
1041 #endif
1042 }
1043
1044 /*----------------------------------------------------------------------------
1045 | Returns 1 if the quadruple-precision floating-point value `a' is a
1046 | signaling NaN; otherwise returns 0.
1047 *----------------------------------------------------------------------------*/
1048
1049 int float128_is_signaling_nan( float128 a )
1050 {
1051 #if SNAN_BIT_IS_ONE
1052     return
1053            ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
1054         && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
1055 #else
1056     return
1057            ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1058         && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1059 #endif
1060 }
1061 #endif
1062
1063 /*----------------------------------------------------------------------------
1064 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1065 | a signaling NaN; otherwise returns `a'.
1066 *----------------------------------------------------------------------------*/
1067
1068 float128 float128_maybe_silence_nan( float128 a )
1069 {
1070     if (float128_is_signaling_nan(a)) {
1071 #if SNAN_BIT_IS_ONE
1072 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
1073         a.low = float128_default_nan_low;
1074         a.high = float128_default_nan_high;
1075 #  else
1076 #    error Rules for silencing a signaling NaN are target-specific
1077 #  endif
1078 #else
1079         a.high |= LIT64( 0x0000800000000000 );
1080         return a;
1081 #endif
1082     }
1083     return a;
1084 }
1085
1086 /*----------------------------------------------------------------------------
1087 | Returns the result of converting the quadruple-precision floating-point NaN
1088 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
1089 | exception is raised.
1090 *----------------------------------------------------------------------------*/
1091
1092 static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
1093 {
1094     commonNaNT z;
1095
1096     if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
1097     z.sign = a.high>>63;
1098     shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1099     return z;
1100 }
1101
1102 /*----------------------------------------------------------------------------
1103 | Returns the result of converting the canonical NaN `a' to the quadruple-
1104 | precision floating-point format.
1105 *----------------------------------------------------------------------------*/
1106
1107 static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
1108 {
1109     float128 z;
1110
1111     if ( STATUS(default_nan_mode) ) {
1112         z.low = float128_default_nan_low;
1113         z.high = float128_default_nan_high;
1114         return z;
1115     }
1116
1117     shift128Right( a.high, a.low, 16, &z.high, &z.low );
1118     z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
1119     return z;
1120 }
1121
1122 /*----------------------------------------------------------------------------
1123 | Takes two quadruple-precision floating-point values `a' and `b', one of
1124 | which is a NaN, and returns the appropriate NaN result.  If either `a' or
1125 | `b' is a signaling NaN, the invalid exception is raised.
1126 *----------------------------------------------------------------------------*/
1127
1128 static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
1129 {
1130     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1131     flag aIsLargerSignificand;
1132
1133     aIsQuietNaN = float128_is_quiet_nan( a );
1134     aIsSignalingNaN = float128_is_signaling_nan( a );
1135     bIsQuietNaN = float128_is_quiet_nan( b );
1136     bIsSignalingNaN = float128_is_signaling_nan( b );
1137
1138     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
1139
1140     if ( STATUS(default_nan_mode) ) {
1141         a.low = float128_default_nan_low;
1142         a.high = float128_default_nan_high;
1143         return a;
1144     }
1145
1146     if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
1147         aIsLargerSignificand = 0;
1148     } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
1149         aIsLargerSignificand = 1;
1150     } else {
1151         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1152     }
1153
1154     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1155                 aIsLargerSignificand)) {
1156         return float128_maybe_silence_nan(b);
1157     } else {
1158         return float128_maybe_silence_nan(a);
1159     }
1160 }
1161