fpu/softfloat-specialize.h

   1 /*
   2  * QEMU float support
   3  *
   4  * Derived from SoftFloat.
   5  */
   6
   7 /*
   8 ===============================================================================
   9 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
  10 Arithmetic Package, Release 2a.
  11
  12 Written by John R. Hauser.  This work was made possible in part by the
  13 International Computer Science Institute, located at Suite 600, 1947 Center
  14 Street, Berkeley, California 94704.  Funding was partially provided by the
  15 National Science Foundation under grant MIP-9311980.  The original version
  16 of this code was written as part of a project to build a fixed-point vector
  17 processor in collaboration with the University of California at Berkeley,
  18 overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
  19 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
  20 arithmetic/SoftFloat.html'.
  21
  22 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
  23 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
  24 TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
  25 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
  26 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
  27
  28 Derivative works are acceptable, even for commercial purposes, so long as
  29 (1) they include prominent notice that the work is derivative, and (2) they
  30 include prominent notice akin to these four paragraphs for those parts of
  31 this code that are retained.
  32
  33 ===============================================================================
  34 */
  35
  36 /* Does the target distinguish signaling NaNs from non-signaling NaNs
  37  * by setting the most significant bit of the mantissa for a signaling NaN?
  38  * (The more common choice is to have it be zero for SNaN and one for QNaN.)
  39  */
  40 #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
  41 #define SNAN_BIT_IS_ONE 1
  42 #else
  43 #define SNAN_BIT_IS_ONE 0
  44 #endif
  45
  46 #if defined(TARGET_XTENSA)
  47 /* Define for architectures which deviate from IEEE in not supporting
  48  * signaling NaNs (so all NaNs are treated as quiet).
  49  */
  50 #define NO_SIGNALING_NANS 1
  51 #endif
  52
  53 /*----------------------------------------------------------------------------
  54 | The pattern for a default generated half-precision NaN.
  55 *----------------------------------------------------------------------------*/
  56 #if defined(TARGET_ARM)
  57 const float16 float16_default_nan = const_float16(0x7E00);
  58 #elif SNAN_BIT_IS_ONE
  59 const float16 float16_default_nan = const_float16(0x7DFF);
  60 #else
  61 const float16 float16_default_nan = const_float16(0xFE00);
  62 #endif
  63
  64 /*----------------------------------------------------------------------------
  65 | The pattern for a default generated single-precision NaN.
  66 *----------------------------------------------------------------------------*/
  67 #if defined(TARGET_SPARC)
  68 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
  69 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
  70       defined(TARGET_XTENSA)
  71 const float32 float32_default_nan = const_float32(0x7FC00000);
  72 #elif SNAN_BIT_IS_ONE
  73 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
  74 #else
  75 const float32 float32_default_nan = const_float32(0xFFC00000);
  76 #endif
  77
  78 /*----------------------------------------------------------------------------
  79 | The pattern for a default generated double-precision NaN.
  80 *----------------------------------------------------------------------------*/
  81 #if defined(TARGET_SPARC)
  82 const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
  83 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
  84 const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
  85 #elif SNAN_BIT_IS_ONE
  86 const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
  87 #else
  88 const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
  89 #endif
  90
  91 /*----------------------------------------------------------------------------
  92 | The pattern for a default generated extended double-precision NaN.
  93 *----------------------------------------------------------------------------*/
  94 #if SNAN_BIT_IS_ONE
  95 #define floatx80_default_nan_high 0x7FFF
  96 #define floatx80_default_nan_low  LIT64(0xBFFFFFFFFFFFFFFF)
  97 #else
  98 #define floatx80_default_nan_high 0xFFFF
  99 #define floatx80_default_nan_low  LIT64( 0xC000000000000000 )
 100 #endif
 101
 102 const floatx80 floatx80_default_nan
 103     = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
 104
 105 /*----------------------------------------------------------------------------
 106 | The pattern for a default generated quadruple-precision NaN.  The `high' and
 107 | `low' values hold the most- and least-significant bits, respectively.
 108 *----------------------------------------------------------------------------*/
 109 #if SNAN_BIT_IS_ONE
 110 #define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
 111 #define float128_default_nan_low  LIT64(0xFFFFFFFFFFFFFFFF)
 112 #else
 113 #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
 114 #define float128_default_nan_low  LIT64( 0x0000000000000000 )
 115 #endif
 116
 117 const float128 float128_default_nan
 118     = make_float128_init(float128_default_nan_high, float128_default_nan_low);
 119
 120 /*----------------------------------------------------------------------------
 121 | Raises the exceptions specified by `flags'.  Floating-point traps can be
 122 | defined here if desired.  It is currently not possible for such a trap
 123 | to substitute a result value.  If traps are not implemented, this routine
 124 | should be simply `float_exception_flags |= flags;'.
 125 *----------------------------------------------------------------------------*/
 126
 127 void float_raise( int8 flags STATUS_PARAM )
 128 {
 129     STATUS(float_exception_flags) |= flags;
 130 }
 131
 132 /*----------------------------------------------------------------------------
 133 | Internal canonical NaN format.
 134 *----------------------------------------------------------------------------*/
 135 typedef struct {
 136     flag sign;
 137     uint64_t high, low;
 138 } commonNaNT;
 139
 140 #ifdef NO_SIGNALING_NANS
 141 int float16_is_quiet_nan(float16 a_)
 142 {
 143     return float16_is_any_nan(a_);
 144 }
 145
 146 int float16_is_signaling_nan(float16 a_)
 147 {
 148     return 0;
 149 }
 150 #else
 151 /*----------------------------------------------------------------------------
 152 | Returns 1 if the half-precision floating-point value `a' is a quiet
 153 | NaN; otherwise returns 0.
 154 *----------------------------------------------------------------------------*/
 155
 156 int float16_is_quiet_nan(float16 a_)
 157 {
 158     uint16_t a = float16_val(a_);
 159 #if SNAN_BIT_IS_ONE
 160     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 161 #else
 162     return ((a & ~0x8000) >= 0x7c80);
 163 #endif
 164 }
 165
 166 /*----------------------------------------------------------------------------
 167 | Returns 1 if the half-precision floating-point value `a' is a signaling
 168 | NaN; otherwise returns 0.
 169 *----------------------------------------------------------------------------*/
 170
 171 int float16_is_signaling_nan(float16 a_)
 172 {
 173     uint16_t a = float16_val(a_);
 174 #if SNAN_BIT_IS_ONE
 175     return ((a & ~0x8000) >= 0x7c80);
 176 #else
 177     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 178 #endif
 179 }
 180 #endif
 181
 182 /*----------------------------------------------------------------------------
 183 | Returns a quiet NaN if the half-precision floating point value `a' is a
 184 | signaling NaN; otherwise returns `a'.
 185 *----------------------------------------------------------------------------*/
 186 float16 float16_maybe_silence_nan(float16 a_)
 187 {
 188     if (float16_is_signaling_nan(a_)) {
 189 #if SNAN_BIT_IS_ONE
 190 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 191         return float16_default_nan;
 192 #  else
 193 #    error Rules for silencing a signaling NaN are target-specific
 194 #  endif
 195 #else
 196         uint16_t a = float16_val(a_);
 197         a |= (1 << 9);
 198         return make_float16(a);
 199 #endif
 200     }
 201     return a_;
 202 }
 203
 204 /*----------------------------------------------------------------------------
 205 | Returns the result of converting the half-precision floating-point NaN
 206 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 207 | exception is raised.
 208 *----------------------------------------------------------------------------*/
 209
 210 static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM )
 211 {
 212     commonNaNT z;
 213
 214     if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 215     z.sign = float16_val(a) >> 15;
 216     z.low = 0;
 217     z.high = ((uint64_t) float16_val(a))<<54;
 218     return z;
 219 }
 220
 221 /*----------------------------------------------------------------------------
 222 | Returns the result of converting the canonical NaN `a' to the half-
 223 | precision floating-point format.
 224 *----------------------------------------------------------------------------*/
 225
 226 static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM)
 227 {
 228     uint16_t mantissa = a.high>>54;
 229
 230     if (STATUS(default_nan_mode)) {
 231         return float16_default_nan;
 232     }
 233
 234     if (mantissa) {
 235         return make_float16(((((uint16_t) a.sign) << 15)
 236                              | (0x1F << 10) | mantissa));
 237     } else {
 238         return float16_default_nan;
 239     }
 240 }
 241
 242 #ifdef NO_SIGNALING_NANS
 243 int float32_is_quiet_nan(float32 a_)
 244 {
 245     return float32_is_any_nan(a_);
 246 }
 247
 248 int float32_is_signaling_nan(float32 a_)
 249 {
 250     return 0;
 251 }
 252 #else
 253 /*----------------------------------------------------------------------------
 254 | Returns 1 if the single-precision floating-point value `a' is a quiet
 255 | NaN; otherwise returns 0.
 256 *----------------------------------------------------------------------------*/
 257
 258 int float32_is_quiet_nan( float32 a_ )
 259 {
 260     uint32_t a = float32_val(a_);
 261 #if SNAN_BIT_IS_ONE
 262     return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
 263 #else
 264     return ((uint32_t)(a << 1) >= 0xff800000);
 265 #endif
 266 }
 267
 268 /*----------------------------------------------------------------------------
 269 | Returns 1 if the single-precision floating-point value `a' is a signaling
 270 | NaN; otherwise returns 0.
 271 *----------------------------------------------------------------------------*/
 272
 273 int float32_is_signaling_nan( float32 a_ )
 274 {
 275     uint32_t a = float32_val(a_);
 276 #if SNAN_BIT_IS_ONE
 277     return ((uint32_t)(a << 1) >= 0xff800000);
 278 #else
 279     return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
 280 #endif
 281 }
 282 #endif
 283
 284 /*----------------------------------------------------------------------------
 285 | Returns a quiet NaN if the single-precision floating point value `a' is a
 286 | signaling NaN; otherwise returns `a'.
 287 *----------------------------------------------------------------------------*/
 288
 289 float32 float32_maybe_silence_nan( float32 a_ )
 290 {
 291     if (float32_is_signaling_nan(a_)) {
 292 #if SNAN_BIT_IS_ONE
 293 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 294         return float32_default_nan;
 295 #  else
 296 #    error Rules for silencing a signaling NaN are target-specific
 297 #  endif
 298 #else
 299         uint32_t a = float32_val(a_);
 300         a |= (1 << 22);
 301         return make_float32(a);
 302 #endif
 303     }
 304     return a_;
 305 }
 306
 307 /*----------------------------------------------------------------------------
 308 | Returns the result of converting the single-precision floating-point NaN
 309 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 310 | exception is raised.
 311 *----------------------------------------------------------------------------*/
 312
 313 static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
 314 {
 315     commonNaNT z;
 316
 317     if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 318     z.sign = float32_val(a)>>31;
 319     z.low = 0;
 320     z.high = ( (uint64_t) float32_val(a) )<<41;
 321     return z;
 322 }
 323
 324 /*----------------------------------------------------------------------------
 325 | Returns the result of converting the canonical NaN `a' to the single-
 326 | precision floating-point format.
 327 *----------------------------------------------------------------------------*/
 328
 329 static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
 330 {
 331     uint32_t mantissa = a.high>>41;
 332
 333     if ( STATUS(default_nan_mode) ) {
 334         return float32_default_nan;
 335     }
 336
 337     if ( mantissa )
 338         return make_float32(
 339             ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
 340     else
 341         return float32_default_nan;
 342 }
 343
 344 /*----------------------------------------------------------------------------
 345 | Select which NaN to propagate for a two-input operation.
 346 | IEEE754 doesn't specify all the details of this, so the
 347 | algorithm is target-specific.
 348 | The routine is passed various bits of information about the
 349 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
 350 | Note that signalling NaNs are always squashed to quiet NaNs
 351 | by the caller, by calling floatXX_maybe_silence_nan() before
 352 | returning them.
 353 |
 354 | aIsLargerSignificand is only valid if both a and b are NaNs
 355 | of some kind, and is true if a has the larger significand,
 356 | or if both a and b have the same significand but a is
 357 | positive but b is negative. It is only needed for the x87
 358 | tie-break rule.
 359 *----------------------------------------------------------------------------*/
 360
 361 #if defined(TARGET_ARM)
 362 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 363                     flag aIsLargerSignificand)
 364 {
 365     /* ARM mandated NaN propagation rules: take the first of:
 366      *  1. A if it is signaling
 367      *  2. B if it is signaling
 368      *  3. A (quiet)
 369      *  4. B (quiet)
 370      * A signaling NaN is always quietened before returning it.
 371      */
 372     if (aIsSNaN) {
 373         return 0;
 374     } else if (bIsSNaN) {
 375         return 1;
 376     } else if (aIsQNaN) {
 377         return 0;
 378     } else {
 379         return 1;
 380     }
 381 }
 382 #elif defined(TARGET_MIPS)
 383 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 384                     flag aIsLargerSignificand)
 385 {
 386     /* According to MIPS specifications, if one of the two operands is
 387      * a sNaN, a new qNaN has to be generated. This is done in
 388      * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
 389      * says: "When possible, this QNaN result is one of the operand QNaN
 390      * values." In practice it seems that most implementations choose
 391      * the first operand if both operands are qNaN. In short this gives
 392      * the following rules:
 393      *  1. A if it is signaling
 394      *  2. B if it is signaling
 395      *  3. A (quiet)
 396      *  4. B (quiet)
 397      * A signaling NaN is always silenced before returning it.
 398      */
 399     if (aIsSNaN) {
 400         return 0;
 401     } else if (bIsSNaN) {
 402         return 1;
 403     } else if (aIsQNaN) {
 404         return 0;
 405     } else {
 406         return 1;
 407     }
 408 }
 409 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
 410 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 411                    flag aIsLargerSignificand)
 412 {
 413     /* PowerPC propagation rules:
 414      *  1. A if it sNaN or qNaN
 415      *  2. B if it sNaN or qNaN
 416      * A signaling NaN is always silenced before returning it.
 417      */
 418     if (aIsSNaN || aIsQNaN) {
 419         return 0;
 420     } else {
 421         return 1;
 422     }
 423 }
 424 #else
 425 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 426                     flag aIsLargerSignificand)
 427 {
 428     /* This implements x87 NaN propagation rules:
 429      * SNaN + QNaN => return the QNaN
 430      * two SNaNs => return the one with the larger significand, silenced
 431      * two QNaNs => return the one with the larger significand
 432      * SNaN and a non-NaN => return the SNaN, silenced
 433      * QNaN and a non-NaN => return the QNaN
 434      *
 435      * If we get down to comparing significands and they are the same,
 436      * return the NaN with the positive sign bit (if any).
 437      */
 438     if (aIsSNaN) {
 439         if (bIsSNaN) {
 440             return aIsLargerSignificand ? 0 : 1;
 441         }
 442         return bIsQNaN ? 1 : 0;
 443     }
 444     else if (aIsQNaN) {
 445         if (bIsSNaN || !bIsQNaN)
 446             return 0;
 447         else {
 448             return aIsLargerSignificand ? 0 : 1;
 449         }
 450     } else {
 451         return 1;
 452     }
 453 }
 454 #endif
 455
 456 /*----------------------------------------------------------------------------
 457 | Select which NaN to propagate for a three-input operation.
 458 | For the moment we assume that no CPU needs the 'larger significand'
 459 | information.
 460 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
 461 *----------------------------------------------------------------------------*/
 462 #if defined(TARGET_ARM)
 463 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 464                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 465 {
 466     /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
 467      * the default NaN
 468      */
 469     if (infzero && cIsQNaN) {
 470         float_raise(float_flag_invalid STATUS_VAR);
 471         return 3;
 472     }
 473
 474     /* This looks different from the ARM ARM pseudocode, because the ARM ARM
 475      * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
 476      */
 477     if (cIsSNaN) {
 478         return 2;
 479     } else if (aIsSNaN) {
 480         return 0;
 481     } else if (bIsSNaN) {
 482         return 1;
 483     } else if (cIsQNaN) {
 484         return 2;
 485     } else if (aIsQNaN) {
 486         return 0;
 487     } else {
 488         return 1;
 489     }
 490 }
 491 #elif defined(TARGET_MIPS)
 492 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 493                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 494 {
 495     /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
 496      * the default NaN
 497      */
 498     if (infzero) {
 499         float_raise(float_flag_invalid STATUS_VAR);
 500         return 3;
 501     }
 502
 503     /* Prefer sNaN over qNaN, in the a, b, c order. */
 504     if (aIsSNaN) {
 505         return 0;
 506     } else if (bIsSNaN) {
 507         return 1;
 508     } else if (cIsSNaN) {
 509         return 2;
 510     } else if (aIsQNaN) {
 511         return 0;
 512     } else if (bIsQNaN) {
 513         return 1;
 514     } else {
 515         return 2;
 516     }
 517 }
 518 #elif defined(TARGET_PPC)
 519 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 520                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 521 {
 522     /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
 523      * to return an input NaN if we have one (ie c) rather than generating
 524      * a default NaN
 525      */
 526     if (infzero) {
 527         float_raise(float_flag_invalid STATUS_VAR);
 528         return 2;
 529     }
 530
 531     /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
 532      * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
 533      */
 534     if (aIsSNaN || aIsQNaN) {
 535         return 0;
 536     } else if (cIsSNaN || cIsQNaN) {
 537         return 2;
 538     } else {
 539         return 1;
 540     }
 541 }
 542 #else
 543 /* A default implementation: prefer a to b to c.
 544  * This is unlikely to actually match any real implementation.
 545  */
 546 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 547                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 548 {
 549     if (aIsSNaN || aIsQNaN) {
 550         return 0;
 551     } else if (bIsSNaN || bIsQNaN) {
 552         return 1;
 553     } else {
 554         return 2;
 555     }
 556 }
 557 #endif
 558
 559 /*----------------------------------------------------------------------------
 560 | Takes two single-precision floating-point values `a' and `b', one of which
 561 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 562 | signaling NaN, the invalid exception is raised.
 563 *----------------------------------------------------------------------------*/
 564
 565 static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
 566 {
 567     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 568     flag aIsLargerSignificand;
 569     uint32_t av, bv;
 570
 571     aIsQuietNaN = float32_is_quiet_nan( a );
 572     aIsSignalingNaN = float32_is_signaling_nan( a );
 573     bIsQuietNaN = float32_is_quiet_nan( b );
 574     bIsSignalingNaN = float32_is_signaling_nan( b );
 575     av = float32_val(a);
 576     bv = float32_val(b);
 577
 578     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 579
 580     if ( STATUS(default_nan_mode) )
 581         return float32_default_nan;
 582
 583     if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
 584         aIsLargerSignificand = 0;
 585     } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
 586         aIsLargerSignificand = 1;
 587     } else {
 588         aIsLargerSignificand = (av < bv) ? 1 : 0;
 589     }
 590
 591     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 592                 aIsLargerSignificand)) {
 593         return float32_maybe_silence_nan(b);
 594     } else {
 595         return float32_maybe_silence_nan(a);
 596     }
 597 }
 598
 599 /*----------------------------------------------------------------------------
 600 | Takes three single-precision floating-point values `a', `b' and `c', one of
 601 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 602 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 603 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 604 | obviously c is a NaN, and whether to propagate c or some other NaN is
 605 | implementation defined).
 606 *----------------------------------------------------------------------------*/
 607
 608 static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
 609                                          float32 c, flag infzero STATUS_PARAM)
 610 {
 611     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 612         cIsQuietNaN, cIsSignalingNaN;
 613     int which;
 614
 615     aIsQuietNaN = float32_is_quiet_nan(a);
 616     aIsSignalingNaN = float32_is_signaling_nan(a);
 617     bIsQuietNaN = float32_is_quiet_nan(b);
 618     bIsSignalingNaN = float32_is_signaling_nan(b);
 619     cIsQuietNaN = float32_is_quiet_nan(c);
 620     cIsSignalingNaN = float32_is_signaling_nan(c);
 621
 622     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 623         float_raise(float_flag_invalid STATUS_VAR);
 624     }
 625
 626     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 627                           bIsQuietNaN, bIsSignalingNaN,
 628                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 629
 630     if (STATUS(default_nan_mode)) {
 631         /* Note that this check is after pickNaNMulAdd so that function
 632          * has an opportunity to set the Invalid flag.
 633          */
 634         return float32_default_nan;
 635     }
 636
 637     switch (which) {
 638     case 0:
 639         return float32_maybe_silence_nan(a);
 640     case 1:
 641         return float32_maybe_silence_nan(b);
 642     case 2:
 643         return float32_maybe_silence_nan(c);
 644     case 3:
 645     default:
 646         return float32_default_nan;
 647     }
 648 }
 649
 650 #ifdef NO_SIGNALING_NANS
 651 int float64_is_quiet_nan(float64 a_)
 652 {
 653     return float64_is_any_nan(a_);
 654 }
 655
 656 int float64_is_signaling_nan(float64 a_)
 657 {
 658     return 0;
 659 }
 660 #else
 661 /*----------------------------------------------------------------------------
 662 | Returns 1 if the double-precision floating-point value `a' is a quiet
 663 | NaN; otherwise returns 0.
 664 *----------------------------------------------------------------------------*/
 665
 666 int float64_is_quiet_nan( float64 a_ )
 667 {
 668     uint64_t a = float64_val(a_);
 669 #if SNAN_BIT_IS_ONE
 670     return (((a >> 51) & 0xfff) == 0xffe)
 671            && (a & 0x0007ffffffffffffULL);
 672 #else
 673     return ((a << 1) >= 0xfff0000000000000ULL);
 674 #endif
 675 }
 676
 677 /*----------------------------------------------------------------------------
 678 | Returns 1 if the double-precision floating-point value `a' is a signaling
 679 | NaN; otherwise returns 0.
 680 *----------------------------------------------------------------------------*/
 681
 682 int float64_is_signaling_nan( float64 a_ )
 683 {
 684     uint64_t a = float64_val(a_);
 685 #if SNAN_BIT_IS_ONE
 686     return ((a << 1) >= 0xfff0000000000000ULL);
 687 #else
 688     return
 689            ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
 690         && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
 691 #endif
 692 }
 693 #endif
 694
 695 /*----------------------------------------------------------------------------
 696 | Returns a quiet NaN if the double-precision floating point value `a' is a
 697 | signaling NaN; otherwise returns `a'.
 698 *----------------------------------------------------------------------------*/
 699
 700 float64 float64_maybe_silence_nan( float64 a_ )
 701 {
 702     if (float64_is_signaling_nan(a_)) {
 703 #if SNAN_BIT_IS_ONE
 704 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 705         return float64_default_nan;
 706 #  else
 707 #    error Rules for silencing a signaling NaN are target-specific
 708 #  endif
 709 #else
 710         uint64_t a = float64_val(a_);
 711         a |= LIT64( 0x0008000000000000 );
 712         return make_float64(a);
 713 #endif
 714     }
 715     return a_;
 716 }
 717
 718 /*----------------------------------------------------------------------------
 719 | Returns the result of converting the double-precision floating-point NaN
 720 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 721 | exception is raised.
 722 *----------------------------------------------------------------------------*/
 723
 724 static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
 725 {
 726     commonNaNT z;
 727
 728     if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 729     z.sign = float64_val(a)>>63;
 730     z.low = 0;
 731     z.high = float64_val(a)<<12;
 732     return z;
 733 }
 734
 735 /*----------------------------------------------------------------------------
 736 | Returns the result of converting the canonical NaN `a' to the double-
 737 | precision floating-point format.
 738 *----------------------------------------------------------------------------*/
 739
 740 static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
 741 {
 742     uint64_t mantissa = a.high>>12;
 743
 744     if ( STATUS(default_nan_mode) ) {
 745         return float64_default_nan;
 746     }
 747
 748     if ( mantissa )
 749         return make_float64(
 750               ( ( (uint64_t) a.sign )<<63 )
 751             | LIT64( 0x7FF0000000000000 )
 752             | ( a.high>>12 ));
 753     else
 754         return float64_default_nan;
 755 }
 756
 757 /*----------------------------------------------------------------------------
 758 | Takes two double-precision floating-point values `a' and `b', one of which
 759 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 760 | signaling NaN, the invalid exception is raised.
 761 *----------------------------------------------------------------------------*/
 762
 763 static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
 764 {
 765     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 766     flag aIsLargerSignificand;
 767     uint64_t av, bv;
 768
 769     aIsQuietNaN = float64_is_quiet_nan( a );
 770     aIsSignalingNaN = float64_is_signaling_nan( a );
 771     bIsQuietNaN = float64_is_quiet_nan( b );
 772     bIsSignalingNaN = float64_is_signaling_nan( b );
 773     av = float64_val(a);
 774     bv = float64_val(b);
 775
 776     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 777
 778     if ( STATUS(default_nan_mode) )
 779         return float64_default_nan;
 780
 781     if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
 782         aIsLargerSignificand = 0;
 783     } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
 784         aIsLargerSignificand = 1;
 785     } else {
 786         aIsLargerSignificand = (av < bv) ? 1 : 0;
 787     }
 788
 789     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 790                 aIsLargerSignificand)) {
 791         return float64_maybe_silence_nan(b);
 792     } else {
 793         return float64_maybe_silence_nan(a);
 794     }
 795 }
 796
 797 /*----------------------------------------------------------------------------
 798 | Takes three double-precision floating-point values `a', `b' and `c', one of
 799 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 800 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 801 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 802 | obviously c is a NaN, and whether to propagate c or some other NaN is
 803 | implementation defined).
 804 *----------------------------------------------------------------------------*/
 805
 806 static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
 807                                          float64 c, flag infzero STATUS_PARAM)
 808 {
 809     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 810         cIsQuietNaN, cIsSignalingNaN;
 811     int which;
 812
 813     aIsQuietNaN = float64_is_quiet_nan(a);
 814     aIsSignalingNaN = float64_is_signaling_nan(a);
 815     bIsQuietNaN = float64_is_quiet_nan(b);
 816     bIsSignalingNaN = float64_is_signaling_nan(b);
 817     cIsQuietNaN = float64_is_quiet_nan(c);
 818     cIsSignalingNaN = float64_is_signaling_nan(c);
 819
 820     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 821         float_raise(float_flag_invalid STATUS_VAR);
 822     }
 823
 824     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 825                           bIsQuietNaN, bIsSignalingNaN,
 826                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 827
 828     if (STATUS(default_nan_mode)) {
 829         /* Note that this check is after pickNaNMulAdd so that function
 830          * has an opportunity to set the Invalid flag.
 831          */
 832         return float64_default_nan;
 833     }
 834
 835     switch (which) {
 836     case 0:
 837         return float64_maybe_silence_nan(a);
 838     case 1:
 839         return float64_maybe_silence_nan(b);
 840     case 2:
 841         return float64_maybe_silence_nan(c);
 842     case 3:
 843     default:
 844         return float64_default_nan;
 845     }
 846 }
 847
 848 #ifdef NO_SIGNALING_NANS
 849 int floatx80_is_quiet_nan(floatx80 a_)
 850 {
 851     return floatx80_is_any_nan(a_);
 852 }
 853
 854 int floatx80_is_signaling_nan(floatx80 a_)
 855 {
 856     return 0;
 857 }
 858 #else
 859 /*----------------------------------------------------------------------------
 860 | Returns 1 if the extended double-precision floating-point value `a' is a
 861 | quiet NaN; otherwise returns 0. This slightly differs from the same
 862 | function for other types as floatx80 has an explicit bit.
 863 *----------------------------------------------------------------------------*/
 864
 865 int floatx80_is_quiet_nan( floatx80 a )
 866 {
 867 #if SNAN_BIT_IS_ONE
 868     uint64_t aLow;
 869
 870     aLow = a.low & ~0x4000000000000000ULL;
 871     return ((a.high & 0x7fff) == 0x7fff)
 872         && (aLow << 1)
 873         && (a.low == aLow);
 874 #else
 875     return ( ( a.high & 0x7FFF ) == 0x7FFF )
 876         && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
 877 #endif
 878 }
 879
 880 /*----------------------------------------------------------------------------
 881 | Returns 1 if the extended double-precision floating-point value `a' is a
 882 | signaling NaN; otherwise returns 0. This slightly differs from the same
 883 | function for other types as floatx80 has an explicit bit.
 884 *----------------------------------------------------------------------------*/
 885
 886 int floatx80_is_signaling_nan( floatx80 a )
 887 {
 888 #if SNAN_BIT_IS_ONE
 889     return ((a.high & 0x7fff) == 0x7fff)
 890         && ((a.low << 1) >= 0x8000000000000000ULL);
 891 #else
 892     uint64_t aLow;
 893
 894     aLow = a.low & ~ LIT64( 0x4000000000000000 );
 895     return
 896            ( ( a.high & 0x7FFF ) == 0x7FFF )
 897         && (uint64_t) ( aLow<<1 )
 898         && ( a.low == aLow );
 899 #endif
 900 }
 901 #endif
 902
 903 /*----------------------------------------------------------------------------
 904 | Returns a quiet NaN if the extended double-precision floating point value
 905 | `a' is a signaling NaN; otherwise returns `a'.
 906 *----------------------------------------------------------------------------*/
 907
 908 floatx80 floatx80_maybe_silence_nan( floatx80 a )
 909 {
 910     if (floatx80_is_signaling_nan(a)) {
 911 #if SNAN_BIT_IS_ONE
 912 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 913         a.low = floatx80_default_nan_low;
 914         a.high = floatx80_default_nan_high;
 915 #  else
 916 #    error Rules for silencing a signaling NaN are target-specific
 917 #  endif
 918 #else
 919         a.low |= LIT64( 0xC000000000000000 );
 920         return a;
 921 #endif
 922     }
 923     return a;
 924 }
 925
 926 /*----------------------------------------------------------------------------
 927 | Returns the result of converting the extended double-precision floating-
 928 | point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the
 929 | invalid exception is raised.
 930 *----------------------------------------------------------------------------*/
 931
 932 static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
 933 {
 934     commonNaNT z;
 935
 936     if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 937     if ( a.low >> 63 ) {
 938         z.sign = a.high >> 15;
 939         z.low = 0;
 940         z.high = a.low << 1;
 941     } else {
 942         z.sign = floatx80_default_nan_high >> 15;
 943         z.low = 0;
 944         z.high = floatx80_default_nan_low << 1;
 945     }
 946     return z;
 947 }
 948
 949 /*----------------------------------------------------------------------------
 950 | Returns the result of converting the canonical NaN `a' to the extended
 951 | double-precision floating-point format.
 952 *----------------------------------------------------------------------------*/
 953
 954 static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
 955 {
 956     floatx80 z;
 957
 958     if ( STATUS(default_nan_mode) ) {
 959         z.low = floatx80_default_nan_low;
 960         z.high = floatx80_default_nan_high;
 961         return z;
 962     }
 963
 964     if (a.high >> 1) {
 965         z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
 966         z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
 967     } else {
 968         z.low = floatx80_default_nan_low;
 969         z.high = floatx80_default_nan_high;
 970     }
 971
 972     return z;
 973 }
 974
 975 /*----------------------------------------------------------------------------
 976 | Takes two extended double-precision floating-point values `a' and `b', one
 977 | of which is a NaN, and returns the appropriate NaN result.  If either `a' or
 978 | `b' is a signaling NaN, the invalid exception is raised.
 979 *----------------------------------------------------------------------------*/
 980
 981 static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
 982 {
 983     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 984     flag aIsLargerSignificand;
 985
 986     aIsQuietNaN = floatx80_is_quiet_nan( a );
 987     aIsSignalingNaN = floatx80_is_signaling_nan( a );
 988     bIsQuietNaN = floatx80_is_quiet_nan( b );
 989     bIsSignalingNaN = floatx80_is_signaling_nan( b );
 990
 991     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 992
 993     if ( STATUS(default_nan_mode) ) {
 994         a.low = floatx80_default_nan_low;
 995         a.high = floatx80_default_nan_high;
 996         return a;
 997     }
 998
 999     if (a.low < b.low) {
1000         aIsLargerSignificand = 0;
1001     } else if (b.low < a.low) {
1002         aIsLargerSignificand = 1;
1003     } else {
1004         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1005     }
1006
1007     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1008                 aIsLargerSignificand)) {
1009         return floatx80_maybe_silence_nan(b);
1010     } else {
1011         return floatx80_maybe_silence_nan(a);
1012     }
1013 }
1014
1015 #ifdef NO_SIGNALING_NANS
1016 int float128_is_quiet_nan(float128 a_)
1017 {
1018     return float128_is_any_nan(a_);
1019 }
1020
1021 int float128_is_signaling_nan(float128 a_)
1022 {
1023     return 0;
1024 }
1025 #else
1026 /*----------------------------------------------------------------------------
1027 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1028 | NaN; otherwise returns 0.
1029 *----------------------------------------------------------------------------*/
1030
1031 int float128_is_quiet_nan( float128 a )
1032 {
1033 #if SNAN_BIT_IS_ONE
1034     return (((a.high >> 47) & 0xffff) == 0xfffe)
1035         && (a.low || (a.high & 0x00007fffffffffffULL));
1036 #else
1037     return
1038         ((a.high << 1) >= 0xffff000000000000ULL)
1039         && (a.low || (a.high & 0x0000ffffffffffffULL));
1040 #endif
1041 }
1042
1043 /*----------------------------------------------------------------------------
1044 | Returns 1 if the quadruple-precision floating-point value `a' is a
1045 | signaling NaN; otherwise returns 0.
1046 *----------------------------------------------------------------------------*/
1047
1048 int float128_is_signaling_nan( float128 a )
1049 {
1050 #if SNAN_BIT_IS_ONE
1051     return
1052         ((a.high << 1) >= 0xffff000000000000ULL)
1053         && (a.low || (a.high & 0x0000ffffffffffffULL));
1054 #else
1055     return
1056            ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1057         && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1058 #endif
1059 }
1060 #endif
1061
1062 /*----------------------------------------------------------------------------
1063 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1064 | a signaling NaN; otherwise returns `a'.
1065 *----------------------------------------------------------------------------*/
1066
1067 float128 float128_maybe_silence_nan( float128 a )
1068 {
1069     if (float128_is_signaling_nan(a)) {
1070 #if SNAN_BIT_IS_ONE
1071 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
1072         a.low = float128_default_nan_low;
1073         a.high = float128_default_nan_high;
1074 #  else
1075 #    error Rules for silencing a signaling NaN are target-specific
1076 #  endif
1077 #else
1078         a.high |= LIT64( 0x0000800000000000 );
1079         return a;
1080 #endif
1081     }
1082     return a;
1083 }
1084
1085 /*----------------------------------------------------------------------------
1086 | Returns the result of converting the quadruple-precision floating-point NaN
1087 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
1088 | exception is raised.
1089 *----------------------------------------------------------------------------*/
1090
1091 static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
1092 {
1093     commonNaNT z;
1094
1095     if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
1096     z.sign = a.high>>63;
1097     shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1098     return z;
1099 }
1100
1101 /*----------------------------------------------------------------------------
1102 | Returns the result of converting the canonical NaN `a' to the quadruple-
1103 | precision floating-point format.
1104 *----------------------------------------------------------------------------*/
1105
1106 static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
1107 {
1108     float128 z;
1109
1110     if ( STATUS(default_nan_mode) ) {
1111         z.low = float128_default_nan_low;
1112         z.high = float128_default_nan_high;
1113         return z;
1114     }
1115
1116     shift128Right( a.high, a.low, 16, &z.high, &z.low );
1117     z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
1118     return z;
1119 }
1120
1121 /*----------------------------------------------------------------------------
1122 | Takes two quadruple-precision floating-point values `a' and `b', one of
1123 | which is a NaN, and returns the appropriate NaN result.  If either `a' or
1124 | `b' is a signaling NaN, the invalid exception is raised.
1125 *----------------------------------------------------------------------------*/
1126
1127 static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
1128 {
1129     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1130     flag aIsLargerSignificand;
1131
1132     aIsQuietNaN = float128_is_quiet_nan( a );
1133     aIsSignalingNaN = float128_is_signaling_nan( a );
1134     bIsQuietNaN = float128_is_quiet_nan( b );
1135     bIsSignalingNaN = float128_is_signaling_nan( b );
1136
1137     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
1138
1139     if ( STATUS(default_nan_mode) ) {
1140         a.low = float128_default_nan_low;
1141         a.high = float128_default_nan_high;
1142         return a;
1143     }
1144
1145     if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
1146         aIsLargerSignificand = 0;
1147     } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
1148         aIsLargerSignificand = 1;
1149     } else {
1150         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1151     }
1152
1153     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1154                 aIsLargerSignificand)) {
1155         return float128_maybe_silence_nan(b);
1156     } else {
1157         return float128_maybe_silence_nan(a);
1158     }
1159 }
1160