4 * The code in this source file is derived from release 2a of the SoftFloat
5 * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
6 * some later contributions) are provided under that license, as detailed below.
7 * It has subsequently been modified by contributors to the QEMU Project,
8 * so some portions are provided under:
9 * the SoftFloat-2a license
13 * Any future contributions to this file after December 1st 2014 will be
14 * taken to be licensed under the Softfloat-2a license unless specifically
15 * indicated otherwise.
19 ===============================================================================
20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
21 Arithmetic Package, Release 2a.
23 Written by John R. Hauser. This work was made possible in part by the
24 International Computer Science Institute, located at Suite 600, 1947 Center
25 Street, Berkeley, California 94704. Funding was partially provided by the
26 National Science Foundation under grant MIP-9311980. The original version
27 of this code was written as part of a project to build a fixed-point vector
28 processor in collaboration with the University of California at Berkeley,
29 overseen by Profs. Nelson Morgan and John Wawrzynek. More information
30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
31 arithmetic/SoftFloat.html'.
33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
35 TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
39 Derivative works are acceptable, even for commercial purposes, so long as
40 (1) they include prominent notice that the work is derivative, and (2) they
41 include prominent notice akin to these four paragraphs for those parts of
42 this code that are retained.
44 ===============================================================================
48 * Copyright (c) 2006, Fabrice Bellard
49 * All rights reserved.
51 * Redistribution and use in source and binary forms, with or without
52 * modification, are permitted provided that the following conditions are met:
54 * 1. Redistributions of source code must retain the above copyright notice,
55 * this list of conditions and the following disclaimer.
57 * 2. Redistributions in binary form must reproduce the above copyright notice,
58 * this list of conditions and the following disclaimer in the documentation
59 * and/or other materials provided with the distribution.
61 * 3. Neither the name of the copyright holder nor the names of its contributors
62 * may be used to endorse or promote products derived from this software without
63 * specific prior written permission.
65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
68 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
69 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
70 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
71 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
72 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
73 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
74 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
75 * THE POSSIBILITY OF SUCH DAMAGE.
78 /* Portions of this work are licensed under the terms of the GNU GPL,
79 * version 2 or later. See the COPYING file in the top-level directory.
82 /* Define for architectures which deviate from IEEE in not supporting
83 * signaling NaNs (so all NaNs are treated as quiet).
85 #if defined(TARGET_XTENSA)
86 #define NO_SIGNALING_NANS 1
89 /* Define how the architecture discriminates signaling NaNs.
90 * This done with the most significant bit of the fraction.
91 * In IEEE 754-1985 this was implementation defined, but in IEEE 754-2008
92 * the msb must be zero. MIPS is (so far) unique in supporting both the
93 * 2008 revision and backward compatibility with their original choice.
94 * Thus for MIPS we must make the choice at runtime.
96 static inline flag
snan_bit_is_one(float_status
*status
)
98 #if defined(TARGET_MIPS)
99 return status
->snan_bit_is_one
;
100 #elif defined(TARGET_HPPA) || defined(TARGET_UNICORE32) || defined(TARGET_SH4)
107 /*----------------------------------------------------------------------------
108 | For the deconstructed floating-point with fraction FRAC, return true
109 | if the fraction represents a signalling NaN; otherwise false.
110 *----------------------------------------------------------------------------*/
112 static bool parts_is_snan_frac(uint64_t frac
, float_status
*status
)
114 #ifdef NO_SIGNALING_NANS
117 flag msb
= extract64(frac
, DECOMPOSED_BINARY_POINT
- 1, 1);
118 return msb
== snan_bit_is_one(status
);
122 /*----------------------------------------------------------------------------
123 | The pattern for a default generated deconstructed floating-point NaN.
124 *----------------------------------------------------------------------------*/
126 static FloatParts
parts_default_nan(float_status
*status
)
131 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
132 frac
= (1ULL << DECOMPOSED_BINARY_POINT
) - 1;
133 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
134 defined(TARGET_S390X) || defined(TARGET_RISCV)
135 frac
= 1ULL << (DECOMPOSED_BINARY_POINT
- 1);
136 #elif defined(TARGET_HPPA)
137 frac
= 1ULL << (DECOMPOSED_BINARY_POINT
- 2);
139 if (snan_bit_is_one(status
)) {
140 frac
= (1ULL << (DECOMPOSED_BINARY_POINT
- 1)) - 1;
142 #if defined(TARGET_MIPS)
143 frac
= 1ULL << (DECOMPOSED_BINARY_POINT
- 1);
145 frac
= 1ULL << (DECOMPOSED_BINARY_POINT
- 1);
151 return (FloatParts
) {
152 .cls
= float_class_qnan
,
159 /*----------------------------------------------------------------------------
160 | Returns a quiet NaN from a signalling NaN for the deconstructed
161 | floating-point parts.
162 *----------------------------------------------------------------------------*/
164 static FloatParts
parts_silence_nan(FloatParts a
, float_status
*status
)
166 #ifdef NO_SIGNALING_NANS
167 g_assert_not_reached();
168 #elif defined(TARGET_HPPA)
169 a
.frac
&= ~(1ULL << (DECOMPOSED_BINARY_POINT
- 1));
170 a
.frac
|= 1ULL << (DECOMPOSED_BINARY_POINT
- 2);
172 if (snan_bit_is_one(status
)) {
173 return parts_default_nan(status
);
175 a
.frac
|= 1ULL << (DECOMPOSED_BINARY_POINT
- 1);
178 a
.cls
= float_class_qnan
;
182 /*----------------------------------------------------------------------------
183 | The pattern for a default generated half-precision NaN.
184 *----------------------------------------------------------------------------*/
185 float16
float16_default_nan(float_status
*status
)
187 #if defined(TARGET_ARM)
188 return const_float16(0x7E00);
190 if (snan_bit_is_one(status
)) {
191 return const_float16(0x7DFF);
193 #if defined(TARGET_MIPS)
194 return const_float16(0x7E00);
196 return const_float16(0xFE00);
202 /*----------------------------------------------------------------------------
203 | The pattern for a default generated single-precision NaN.
204 *----------------------------------------------------------------------------*/
205 float32
float32_default_nan(float_status
*status
)
207 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
208 return const_float32(0x7FFFFFFF);
209 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
210 defined(TARGET_XTENSA) || defined(TARGET_S390X) || \
211 defined(TARGET_TRICORE) || defined(TARGET_RISCV)
212 return const_float32(0x7FC00000);
213 #elif defined(TARGET_HPPA)
214 return const_float32(0x7FA00000);
216 if (snan_bit_is_one(status
)) {
217 return const_float32(0x7FBFFFFF);
219 #if defined(TARGET_MIPS)
220 return const_float32(0x7FC00000);
222 return const_float32(0xFFC00000);
228 /*----------------------------------------------------------------------------
229 | The pattern for a default generated double-precision NaN.
230 *----------------------------------------------------------------------------*/
231 float64
float64_default_nan(float_status
*status
)
233 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
234 return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
235 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
236 defined(TARGET_S390X) || defined(TARGET_RISCV)
237 return const_float64(LIT64(0x7FF8000000000000));
238 #elif defined(TARGET_HPPA)
239 return const_float64(LIT64(0x7FF4000000000000));
241 if (snan_bit_is_one(status
)) {
242 return const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
244 #if defined(TARGET_MIPS)
245 return const_float64(LIT64(0x7FF8000000000000));
247 return const_float64(LIT64(0xFFF8000000000000));
253 /*----------------------------------------------------------------------------
254 | The pattern for a default generated extended double-precision NaN.
255 *----------------------------------------------------------------------------*/
256 floatx80
floatx80_default_nan(float_status
*status
)
259 #if defined(TARGET_M68K)
260 r
.low
= LIT64(0xFFFFFFFFFFFFFFFF);
263 if (snan_bit_is_one(status
)) {
264 r
.low
= LIT64(0xBFFFFFFFFFFFFFFF);
267 r
.low
= LIT64(0xC000000000000000);
274 /*----------------------------------------------------------------------------
275 | The pattern for a default generated extended double-precision inf.
276 *----------------------------------------------------------------------------*/
278 #define floatx80_infinity_high 0x7FFF
279 #if defined(TARGET_M68K)
280 #define floatx80_infinity_low LIT64(0x0000000000000000)
282 #define floatx80_infinity_low LIT64(0x8000000000000000)
285 const floatx80 floatx80_infinity
286 = make_floatx80_init(floatx80_infinity_high
, floatx80_infinity_low
);
288 /*----------------------------------------------------------------------------
289 | The pattern for a default generated quadruple-precision NaN.
290 *----------------------------------------------------------------------------*/
291 float128
float128_default_nan(float_status
*status
)
295 if (snan_bit_is_one(status
)) {
296 r
.low
= LIT64(0xFFFFFFFFFFFFFFFF);
297 r
.high
= LIT64(0x7FFF7FFFFFFFFFFF);
299 r
.low
= LIT64(0x0000000000000000);
300 #if defined(TARGET_S390X) || defined(TARGET_PPC) || defined(TARGET_RISCV)
301 r
.high
= LIT64(0x7FFF800000000000);
303 r
.high
= LIT64(0xFFFF800000000000);
309 /*----------------------------------------------------------------------------
310 | Raises the exceptions specified by `flags'. Floating-point traps can be
311 | defined here if desired. It is currently not possible for such a trap
312 | to substitute a result value. If traps are not implemented, this routine
313 | should be simply `float_exception_flags |= flags;'.
314 *----------------------------------------------------------------------------*/
316 void float_raise(uint8_t flags
, float_status
*status
)
318 status
->float_exception_flags
|= flags
;
321 /*----------------------------------------------------------------------------
322 | Internal canonical NaN format.
323 *----------------------------------------------------------------------------*/
329 /*----------------------------------------------------------------------------
330 | Returns 1 if the half-precision floating-point value `a' is a quiet
331 | NaN; otherwise returns 0.
332 *----------------------------------------------------------------------------*/
334 int float16_is_quiet_nan(float16 a_
, float_status
*status
)
336 #ifdef NO_SIGNALING_NANS
337 return float16_is_any_nan(a_
);
339 uint16_t a
= float16_val(a_
);
340 if (snan_bit_is_one(status
)) {
341 return (((a
>> 9) & 0x3F) == 0x3E) && (a
& 0x1FF);
343 return ((a
& ~0x8000) >= 0x7C80);
348 /*----------------------------------------------------------------------------
349 | Returns 1 if the half-precision floating-point value `a' is a signaling
350 | NaN; otherwise returns 0.
351 *----------------------------------------------------------------------------*/
353 int float16_is_signaling_nan(float16 a_
, float_status
*status
)
355 #ifdef NO_SIGNALING_NANS
358 uint16_t a
= float16_val(a_
);
359 if (snan_bit_is_one(status
)) {
360 return ((a
& ~0x8000) >= 0x7C80);
362 return (((a
>> 9) & 0x3F) == 0x3E) && (a
& 0x1FF);
367 /*----------------------------------------------------------------------------
368 | Returns a quiet NaN from a signalling NaN for the half-precision
369 | floating point value `a'.
370 *----------------------------------------------------------------------------*/
372 float16
float16_silence_nan(float16 a
, float_status
*status
)
374 #ifdef NO_SIGNALING_NANS
375 g_assert_not_reached();
377 if (snan_bit_is_one(status
)) {
378 return float16_default_nan(status
);
385 /*----------------------------------------------------------------------------
386 | Returns 1 if the single-precision floating-point value `a' is a quiet
387 | NaN; otherwise returns 0.
388 *----------------------------------------------------------------------------*/
390 int float32_is_quiet_nan(float32 a_
, float_status
*status
)
392 #ifdef NO_SIGNALING_NANS
393 return float32_is_any_nan(a_
);
395 uint32_t a
= float32_val(a_
);
396 if (snan_bit_is_one(status
)) {
397 return (((a
>> 22) & 0x1FF) == 0x1FE) && (a
& 0x003FFFFF);
399 return ((uint32_t)(a
<< 1) >= 0xFF800000);
404 /*----------------------------------------------------------------------------
405 | Returns 1 if the single-precision floating-point value `a' is a signaling
406 | NaN; otherwise returns 0.
407 *----------------------------------------------------------------------------*/
409 int float32_is_signaling_nan(float32 a_
, float_status
*status
)
411 #ifdef NO_SIGNALING_NANS
414 uint32_t a
= float32_val(a_
);
415 if (snan_bit_is_one(status
)) {
416 return ((uint32_t)(a
<< 1) >= 0xFF800000);
418 return (((a
>> 22) & 0x1FF) == 0x1FE) && (a
& 0x003FFFFF);
423 /*----------------------------------------------------------------------------
424 | Returns a quiet NaN from a signalling NaN for the single-precision
425 | floating point value `a'.
426 *----------------------------------------------------------------------------*/
428 float32
float32_silence_nan(float32 a
, float_status
*status
)
430 #ifdef NO_SIGNALING_NANS
431 g_assert_not_reached();
433 if (snan_bit_is_one(status
)) {
439 return float32_default_nan(status
);
442 return a
| (1 << 22);
447 /*----------------------------------------------------------------------------
448 | Returns the result of converting the single-precision floating-point NaN
449 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
450 | exception is raised.
451 *----------------------------------------------------------------------------*/
453 static commonNaNT
float32ToCommonNaN(float32 a
, float_status
*status
)
457 if (float32_is_signaling_nan(a
, status
)) {
458 float_raise(float_flag_invalid
, status
);
460 z
.sign
= float32_val(a
) >> 31;
462 z
.high
= ((uint64_t)float32_val(a
)) << 41;
466 /*----------------------------------------------------------------------------
467 | Returns the result of converting the canonical NaN `a' to the single-
468 | precision floating-point format.
469 *----------------------------------------------------------------------------*/
471 static float32
commonNaNToFloat32(commonNaNT a
, float_status
*status
)
473 uint32_t mantissa
= a
.high
>> 41;
475 if (status
->default_nan_mode
) {
476 return float32_default_nan(status
);
481 (((uint32_t)a
.sign
) << 31) | 0x7F800000 | (a
.high
>> 41));
483 return float32_default_nan(status
);
487 /*----------------------------------------------------------------------------
488 | Select which NaN to propagate for a two-input operation.
489 | IEEE754 doesn't specify all the details of this, so the
490 | algorithm is target-specific.
491 | The routine is passed various bits of information about the
492 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
493 | Note that signalling NaNs are always squashed to quiet NaNs
494 | by the caller, by calling floatXX_silence_nan() before
497 | aIsLargerSignificand is only valid if both a and b are NaNs
498 | of some kind, and is true if a has the larger significand,
499 | or if both a and b have the same significand but a is
500 | positive but b is negative. It is only needed for the x87
502 *----------------------------------------------------------------------------*/
504 #if defined(TARGET_ARM)
505 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
506 flag aIsLargerSignificand
)
508 /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
510 * 1. A if it is signaling
511 * 2. B if it is signaling
514 * A signaling NaN is always quietened before returning it.
518 } else if (bIsSNaN
) {
520 } else if (aIsQNaN
) {
526 #elif defined(TARGET_MIPS) || defined(TARGET_HPPA)
527 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
528 flag aIsLargerSignificand
)
530 /* According to MIPS specifications, if one of the two operands is
531 * a sNaN, a new qNaN has to be generated. This is done in
532 * floatXX_silence_nan(). For qNaN inputs the specifications
533 * says: "When possible, this QNaN result is one of the operand QNaN
534 * values." In practice it seems that most implementations choose
535 * the first operand if both operands are qNaN. In short this gives
536 * the following rules:
537 * 1. A if it is signaling
538 * 2. B if it is signaling
541 * A signaling NaN is always silenced before returning it.
545 } else if (bIsSNaN
) {
547 } else if (aIsQNaN
) {
553 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
554 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
555 flag aIsLargerSignificand
)
557 /* PowerPC propagation rules:
558 * 1. A if it sNaN or qNaN
559 * 2. B if it sNaN or qNaN
560 * A signaling NaN is always silenced before returning it.
562 if (aIsSNaN
|| aIsQNaN
) {
568 #elif defined(TARGET_M68K)
569 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
570 flag aIsLargerSignificand
)
572 /* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
573 * 3.4 FLOATING-POINT INSTRUCTION DETAILS
574 * If either operand, but not both operands, of an operation is a
575 * nonsignaling NaN, then that NaN is returned as the result. If both
576 * operands are nonsignaling NaNs, then the destination operand
577 * nonsignaling NaN is returned as the result.
578 * If either operand to an operation is a signaling NaN (SNaN), then the
579 * SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
580 * is set in the FPCR ENABLE byte, then the exception is taken and the
581 * destination is not modified. If the SNaN exception enable bit is not
582 * set, setting the SNaN bit in the operand to a one converts the SNaN to
583 * a nonsignaling NaN. The operation then continues as described in the
584 * preceding paragraph for nonsignaling NaNs.
586 if (aIsQNaN
|| aIsSNaN
) { /* a is the destination operand */
587 return 0; /* return the destination operand */
589 return 1; /* return b */
593 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
594 flag aIsLargerSignificand
)
596 /* This implements x87 NaN propagation rules:
597 * SNaN + QNaN => return the QNaN
598 * two SNaNs => return the one with the larger significand, silenced
599 * two QNaNs => return the one with the larger significand
600 * SNaN and a non-NaN => return the SNaN, silenced
601 * QNaN and a non-NaN => return the QNaN
603 * If we get down to comparing significands and they are the same,
604 * return the NaN with the positive sign bit (if any).
608 return aIsLargerSignificand
? 0 : 1;
610 return bIsQNaN
? 1 : 0;
611 } else if (aIsQNaN
) {
612 if (bIsSNaN
|| !bIsQNaN
) {
615 return aIsLargerSignificand
? 0 : 1;
623 /*----------------------------------------------------------------------------
624 | Select which NaN to propagate for a three-input operation.
625 | For the moment we assume that no CPU needs the 'larger significand'
627 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
628 *----------------------------------------------------------------------------*/
629 #if defined(TARGET_ARM)
630 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
631 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
632 float_status
*status
)
634 /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
637 if (infzero
&& cIsQNaN
) {
638 float_raise(float_flag_invalid
, status
);
642 /* This looks different from the ARM ARM pseudocode, because the ARM ARM
643 * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
647 } else if (aIsSNaN
) {
649 } else if (bIsSNaN
) {
651 } else if (cIsQNaN
) {
653 } else if (aIsQNaN
) {
659 #elif defined(TARGET_MIPS)
660 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
661 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
662 float_status
*status
)
664 /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
668 float_raise(float_flag_invalid
, status
);
672 if (snan_bit_is_one(status
)) {
673 /* Prefer sNaN over qNaN, in the a, b, c order. */
676 } else if (bIsSNaN
) {
678 } else if (cIsSNaN
) {
680 } else if (aIsQNaN
) {
682 } else if (bIsQNaN
) {
688 /* Prefer sNaN over qNaN, in the c, a, b order. */
691 } else if (aIsSNaN
) {
693 } else if (bIsSNaN
) {
695 } else if (cIsQNaN
) {
697 } else if (aIsQNaN
) {
704 #elif defined(TARGET_PPC)
705 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
706 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
707 float_status
*status
)
709 /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
710 * to return an input NaN if we have one (ie c) rather than generating
714 float_raise(float_flag_invalid
, status
);
718 /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
719 * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
721 if (aIsSNaN
|| aIsQNaN
) {
723 } else if (cIsSNaN
|| cIsQNaN
) {
730 /* A default implementation: prefer a to b to c.
731 * This is unlikely to actually match any real implementation.
733 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
734 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
735 float_status
*status
)
737 if (aIsSNaN
|| aIsQNaN
) {
739 } else if (bIsSNaN
|| bIsQNaN
) {
747 /*----------------------------------------------------------------------------
748 | Takes two single-precision floating-point values `a' and `b', one of which
749 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
750 | signaling NaN, the invalid exception is raised.
751 *----------------------------------------------------------------------------*/
753 static float32
propagateFloat32NaN(float32 a
, float32 b
, float_status
*status
)
755 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
756 flag aIsLargerSignificand
;
759 aIsQuietNaN
= float32_is_quiet_nan(a
, status
);
760 aIsSignalingNaN
= float32_is_signaling_nan(a
, status
);
761 bIsQuietNaN
= float32_is_quiet_nan(b
, status
);
762 bIsSignalingNaN
= float32_is_signaling_nan(b
, status
);
766 if (aIsSignalingNaN
| bIsSignalingNaN
) {
767 float_raise(float_flag_invalid
, status
);
770 if (status
->default_nan_mode
) {
771 return float32_default_nan(status
);
774 if ((uint32_t)(av
<< 1) < (uint32_t)(bv
<< 1)) {
775 aIsLargerSignificand
= 0;
776 } else if ((uint32_t)(bv
<< 1) < (uint32_t)(av
<< 1)) {
777 aIsLargerSignificand
= 1;
779 aIsLargerSignificand
= (av
< bv
) ? 1 : 0;
782 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
783 aIsLargerSignificand
)) {
784 if (bIsSignalingNaN
) {
785 return float32_silence_nan(b
, status
);
789 if (aIsSignalingNaN
) {
790 return float32_silence_nan(a
, status
);
796 /*----------------------------------------------------------------------------
797 | Returns 1 if the double-precision floating-point value `a' is a quiet
798 | NaN; otherwise returns 0.
799 *----------------------------------------------------------------------------*/
801 int float64_is_quiet_nan(float64 a_
, float_status
*status
)
803 #ifdef NO_SIGNALING_NANS
804 return float64_is_any_nan(a_
);
806 uint64_t a
= float64_val(a_
);
807 if (snan_bit_is_one(status
)) {
808 return (((a
>> 51) & 0xFFF) == 0xFFE)
809 && (a
& 0x0007FFFFFFFFFFFFULL
);
811 return ((a
<< 1) >= 0xFFF0000000000000ULL
);
816 /*----------------------------------------------------------------------------
817 | Returns 1 if the double-precision floating-point value `a' is a signaling
818 | NaN; otherwise returns 0.
819 *----------------------------------------------------------------------------*/
821 int float64_is_signaling_nan(float64 a_
, float_status
*status
)
823 #ifdef NO_SIGNALING_NANS
826 uint64_t a
= float64_val(a_
);
827 if (snan_bit_is_one(status
)) {
828 return ((a
<< 1) >= 0xFFF0000000000000ULL
);
830 return (((a
>> 51) & 0xFFF) == 0xFFE)
831 && (a
& LIT64(0x0007FFFFFFFFFFFF));
836 /*----------------------------------------------------------------------------
837 | Returns a quiet NaN from a signalling NaN for the double-precision
838 | floating point value `a'.
839 *----------------------------------------------------------------------------*/
841 float64
float64_silence_nan(float64 a
, float_status
*status
)
843 #ifdef NO_SIGNALING_NANS
844 g_assert_not_reached();
846 if (snan_bit_is_one(status
)) {
848 a
&= ~0x0008000000000000ULL
;
849 a
|= 0x0004000000000000ULL
;
852 return float64_default_nan(status
);
855 return a
| LIT64(0x0008000000000000);
861 /*----------------------------------------------------------------------------
862 | Returns the result of converting the double-precision floating-point NaN
863 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
864 | exception is raised.
865 *----------------------------------------------------------------------------*/
867 static commonNaNT
float64ToCommonNaN(float64 a
, float_status
*status
)
871 if (float64_is_signaling_nan(a
, status
)) {
872 float_raise(float_flag_invalid
, status
);
874 z
.sign
= float64_val(a
) >> 63;
876 z
.high
= float64_val(a
) << 12;
880 /*----------------------------------------------------------------------------
881 | Returns the result of converting the canonical NaN `a' to the double-
882 | precision floating-point format.
883 *----------------------------------------------------------------------------*/
885 static float64
commonNaNToFloat64(commonNaNT a
, float_status
*status
)
887 uint64_t mantissa
= a
.high
>> 12;
889 if (status
->default_nan_mode
) {
890 return float64_default_nan(status
);
895 (((uint64_t) a
.sign
) << 63)
896 | LIT64(0x7FF0000000000000)
899 return float64_default_nan(status
);
903 /*----------------------------------------------------------------------------
904 | Takes two double-precision floating-point values `a' and `b', one of which
905 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
906 | signaling NaN, the invalid exception is raised.
907 *----------------------------------------------------------------------------*/
909 static float64
propagateFloat64NaN(float64 a
, float64 b
, float_status
*status
)
911 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
912 flag aIsLargerSignificand
;
915 aIsQuietNaN
= float64_is_quiet_nan(a
, status
);
916 aIsSignalingNaN
= float64_is_signaling_nan(a
, status
);
917 bIsQuietNaN
= float64_is_quiet_nan(b
, status
);
918 bIsSignalingNaN
= float64_is_signaling_nan(b
, status
);
922 if (aIsSignalingNaN
| bIsSignalingNaN
) {
923 float_raise(float_flag_invalid
, status
);
926 if (status
->default_nan_mode
) {
927 return float64_default_nan(status
);
930 if ((uint64_t)(av
<< 1) < (uint64_t)(bv
<< 1)) {
931 aIsLargerSignificand
= 0;
932 } else if ((uint64_t)(bv
<< 1) < (uint64_t)(av
<< 1)) {
933 aIsLargerSignificand
= 1;
935 aIsLargerSignificand
= (av
< bv
) ? 1 : 0;
938 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
939 aIsLargerSignificand
)) {
940 if (bIsSignalingNaN
) {
941 return float64_silence_nan(b
, status
);
945 if (aIsSignalingNaN
) {
946 return float64_silence_nan(a
, status
);
952 /*----------------------------------------------------------------------------
953 | Returns 1 if the extended double-precision floating-point value `a' is a
954 | quiet NaN; otherwise returns 0. This slightly differs from the same
955 | function for other types as floatx80 has an explicit bit.
956 *----------------------------------------------------------------------------*/
958 int floatx80_is_quiet_nan(floatx80 a
, float_status
*status
)
960 #ifdef NO_SIGNALING_NANS
961 return floatx80_is_any_nan(a
);
963 if (snan_bit_is_one(status
)) {
966 aLow
= a
.low
& ~0x4000000000000000ULL
;
967 return ((a
.high
& 0x7FFF) == 0x7FFF)
971 return ((a
.high
& 0x7FFF) == 0x7FFF)
972 && (LIT64(0x8000000000000000) <= ((uint64_t)(a
.low
<< 1)));
977 /*----------------------------------------------------------------------------
978 | Returns 1 if the extended double-precision floating-point value `a' is a
979 | signaling NaN; otherwise returns 0. This slightly differs from the same
980 | function for other types as floatx80 has an explicit bit.
981 *----------------------------------------------------------------------------*/
983 int floatx80_is_signaling_nan(floatx80 a
, float_status
*status
)
985 #ifdef NO_SIGNALING_NANS
988 if (snan_bit_is_one(status
)) {
989 return ((a
.high
& 0x7FFF) == 0x7FFF)
990 && ((a
.low
<< 1) >= 0x8000000000000000ULL
);
994 aLow
= a
.low
& ~LIT64(0x4000000000000000);
995 return ((a
.high
& 0x7FFF) == 0x7FFF)
996 && (uint64_t)(aLow
<< 1)
1002 /*----------------------------------------------------------------------------
1003 | Returns a quiet NaN from a signalling NaN for the extended double-precision
1004 | floating point value `a'.
1005 *----------------------------------------------------------------------------*/
1007 floatx80
floatx80_silence_nan(floatx80 a
, float_status
*status
)
1009 #ifdef NO_SIGNALING_NANS
1010 g_assert_not_reached();
1012 if (snan_bit_is_one(status
)) {
1013 return floatx80_default_nan(status
);
1015 a
.low
|= LIT64(0xC000000000000000);
1021 /*----------------------------------------------------------------------------
1022 | Returns the result of converting the extended double-precision floating-
1023 | point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
1024 | invalid exception is raised.
1025 *----------------------------------------------------------------------------*/
1027 static commonNaNT
floatx80ToCommonNaN(floatx80 a
, float_status
*status
)
1032 if (floatx80_is_signaling_nan(a
, status
)) {
1033 float_raise(float_flag_invalid
, status
);
1036 z
.sign
= a
.high
>> 15;
1038 z
.high
= a
.low
<< 1;
1040 dflt
= floatx80_default_nan(status
);
1041 z
.sign
= dflt
.high
>> 15;
1043 z
.high
= dflt
.low
<< 1;
1048 /*----------------------------------------------------------------------------
1049 | Returns the result of converting the canonical NaN `a' to the extended
1050 | double-precision floating-point format.
1051 *----------------------------------------------------------------------------*/
1053 static floatx80
commonNaNToFloatx80(commonNaNT a
, float_status
*status
)
1057 if (status
->default_nan_mode
) {
1058 return floatx80_default_nan(status
);
1062 z
.low
= LIT64(0x8000000000000000) | a
.high
>> 1;
1063 z
.high
= (((uint16_t)a
.sign
) << 15) | 0x7FFF;
1065 z
= floatx80_default_nan(status
);
1070 /*----------------------------------------------------------------------------
1071 | Takes two extended double-precision floating-point values `a' and `b', one
1072 | of which is a NaN, and returns the appropriate NaN result. If either `a' or
1073 | `b' is a signaling NaN, the invalid exception is raised.
1074 *----------------------------------------------------------------------------*/
1076 floatx80
propagateFloatx80NaN(floatx80 a
, floatx80 b
, float_status
*status
)
1078 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
1079 flag aIsLargerSignificand
;
1081 aIsQuietNaN
= floatx80_is_quiet_nan(a
, status
);
1082 aIsSignalingNaN
= floatx80_is_signaling_nan(a
, status
);
1083 bIsQuietNaN
= floatx80_is_quiet_nan(b
, status
);
1084 bIsSignalingNaN
= floatx80_is_signaling_nan(b
, status
);
1086 if (aIsSignalingNaN
| bIsSignalingNaN
) {
1087 float_raise(float_flag_invalid
, status
);
1090 if (status
->default_nan_mode
) {
1091 return floatx80_default_nan(status
);
1094 if (a
.low
< b
.low
) {
1095 aIsLargerSignificand
= 0;
1096 } else if (b
.low
< a
.low
) {
1097 aIsLargerSignificand
= 1;
1099 aIsLargerSignificand
= (a
.high
< b
.high
) ? 1 : 0;
1102 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
1103 aIsLargerSignificand
)) {
1104 if (bIsSignalingNaN
) {
1105 return floatx80_silence_nan(b
, status
);
1109 if (aIsSignalingNaN
) {
1110 return floatx80_silence_nan(a
, status
);
1116 /*----------------------------------------------------------------------------
1117 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1118 | NaN; otherwise returns 0.
1119 *----------------------------------------------------------------------------*/
1121 int float128_is_quiet_nan(float128 a
, float_status
*status
)
1123 #ifdef NO_SIGNALING_NANS
1124 return float128_is_any_nan(a
);
1126 if (snan_bit_is_one(status
)) {
1127 return (((a
.high
>> 47) & 0xFFFF) == 0xFFFE)
1128 && (a
.low
|| (a
.high
& 0x00007FFFFFFFFFFFULL
));
1130 return ((a
.high
<< 1) >= 0xFFFF000000000000ULL
)
1131 && (a
.low
|| (a
.high
& 0x0000FFFFFFFFFFFFULL
));
1136 /*----------------------------------------------------------------------------
1137 | Returns 1 if the quadruple-precision floating-point value `a' is a
1138 | signaling NaN; otherwise returns 0.
1139 *----------------------------------------------------------------------------*/
1141 int float128_is_signaling_nan(float128 a
, float_status
*status
)
1143 #ifdef NO_SIGNALING_NANS
1146 if (snan_bit_is_one(status
)) {
1147 return ((a
.high
<< 1) >= 0xFFFF000000000000ULL
)
1148 && (a
.low
|| (a
.high
& 0x0000FFFFFFFFFFFFULL
));
1150 return (((a
.high
>> 47) & 0xFFFF) == 0xFFFE)
1151 && (a
.low
|| (a
.high
& LIT64(0x00007FFFFFFFFFFF)));
1156 /*----------------------------------------------------------------------------
1157 | Returns a quiet NaN from a signalling NaN for the quadruple-precision
1158 | floating point value `a'.
1159 *----------------------------------------------------------------------------*/
1161 float128
float128_silence_nan(float128 a
, float_status
*status
)
1163 #ifdef NO_SIGNALING_NANS
1164 g_assert_not_reached();
1166 if (snan_bit_is_one(status
)) {
1167 return float128_default_nan(status
);
1169 a
.high
|= LIT64(0x0000800000000000);
1175 /*----------------------------------------------------------------------------
1176 | Returns the result of converting the quadruple-precision floating-point NaN
1177 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
1178 | exception is raised.
1179 *----------------------------------------------------------------------------*/
1181 static commonNaNT
float128ToCommonNaN(float128 a
, float_status
*status
)
1185 if (float128_is_signaling_nan(a
, status
)) {
1186 float_raise(float_flag_invalid
, status
);
1188 z
.sign
= a
.high
>> 63;
1189 shortShift128Left(a
.high
, a
.low
, 16, &z
.high
, &z
.low
);
1193 /*----------------------------------------------------------------------------
1194 | Returns the result of converting the canonical NaN `a' to the quadruple-
1195 | precision floating-point format.
1196 *----------------------------------------------------------------------------*/
1198 static float128
commonNaNToFloat128(commonNaNT a
, float_status
*status
)
1202 if (status
->default_nan_mode
) {
1203 return float128_default_nan(status
);
1206 shift128Right(a
.high
, a
.low
, 16, &z
.high
, &z
.low
);
1207 z
.high
|= (((uint64_t)a
.sign
) << 63) | LIT64(0x7FFF000000000000);
1211 /*----------------------------------------------------------------------------
1212 | Takes two quadruple-precision floating-point values `a' and `b', one of
1213 | which is a NaN, and returns the appropriate NaN result. If either `a' or
1214 | `b' is a signaling NaN, the invalid exception is raised.
1215 *----------------------------------------------------------------------------*/
1217 static float128
propagateFloat128NaN(float128 a
, float128 b
,
1218 float_status
*status
)
1220 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
1221 flag aIsLargerSignificand
;
1223 aIsQuietNaN
= float128_is_quiet_nan(a
, status
);
1224 aIsSignalingNaN
= float128_is_signaling_nan(a
, status
);
1225 bIsQuietNaN
= float128_is_quiet_nan(b
, status
);
1226 bIsSignalingNaN
= float128_is_signaling_nan(b
, status
);
1228 if (aIsSignalingNaN
| bIsSignalingNaN
) {
1229 float_raise(float_flag_invalid
, status
);
1232 if (status
->default_nan_mode
) {
1233 return float128_default_nan(status
);
1236 if (lt128(a
.high
<< 1, a
.low
, b
.high
<< 1, b
.low
)) {
1237 aIsLargerSignificand
= 0;
1238 } else if (lt128(b
.high
<< 1, b
.low
, a
.high
<< 1, a
.low
)) {
1239 aIsLargerSignificand
= 1;
1241 aIsLargerSignificand
= (a
.high
< b
.high
) ? 1 : 0;
1244 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
1245 aIsLargerSignificand
)) {
1246 if (bIsSignalingNaN
) {
1247 return float128_silence_nan(b
, status
);
1251 if (aIsSignalingNaN
) {
1252 return float128_silence_nan(a
, status
);