4 * The code in this source file is derived from release 2a of the SoftFloat
5 * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
6 * some later contributions) are provided under that license, as detailed below.
7 * It has subsequently been modified by contributors to the QEMU Project,
8 * so some portions are provided under:
9 * the SoftFloat-2a license
13 * Any future contributions to this file after December 1st 2014 will be
14 * taken to be licensed under the Softfloat-2a license unless specifically
15 * indicated otherwise.
19 ===============================================================================
20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
21 Arithmetic Package, Release 2a.
23 Written by John R. Hauser. This work was made possible in part by the
24 International Computer Science Institute, located at Suite 600, 1947 Center
25 Street, Berkeley, California 94704. Funding was partially provided by the
26 National Science Foundation under grant MIP-9311980. The original version
27 of this code was written as part of a project to build a fixed-point vector
28 processor in collaboration with the University of California at Berkeley,
29 overseen by Profs. Nelson Morgan and John Wawrzynek. More information
30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
31 arithmetic/SoftFloat.html'.
33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
35 TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
39 Derivative works are acceptable, even for commercial purposes, so long as
40 (1) they include prominent notice that the work is derivative, and (2) they
41 include prominent notice akin to these four paragraphs for those parts of
42 this code that are retained.
44 ===============================================================================
48 * Copyright (c) 2006, Fabrice Bellard
49 * All rights reserved.
51 * Redistribution and use in source and binary forms, with or without
52 * modification, are permitted provided that the following conditions are met:
54 * 1. Redistributions of source code must retain the above copyright notice,
55 * this list of conditions and the following disclaimer.
57 * 2. Redistributions in binary form must reproduce the above copyright notice,
58 * this list of conditions and the following disclaimer in the documentation
59 * and/or other materials provided with the distribution.
61 * 3. Neither the name of the copyright holder nor the names of its contributors
62 * may be used to endorse or promote products derived from this software without
63 * specific prior written permission.
65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
68 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
69 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
70 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
71 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
72 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
73 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
74 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
75 * THE POSSIBILITY OF SUCH DAMAGE.
78 /* Portions of this work are licensed under the terms of the GNU GPL,
79 * version 2 or later. See the COPYING file in the top-level directory.
82 #if defined(TARGET_XTENSA)
83 /* Define for architectures which deviate from IEEE in not supporting
84 * signaling NaNs (so all NaNs are treated as quiet).
86 #define NO_SIGNALING_NANS 1
89 /*----------------------------------------------------------------------------
90 | The pattern for a default generated half-precision NaN.
91 *----------------------------------------------------------------------------*/
92 float16
float16_default_nan(float_status
*status
)
94 #if defined(TARGET_ARM)
95 return const_float16(0x7E00);
97 if (status
->snan_bit_is_one
) {
98 return const_float16(0x7DFF);
100 #if defined(TARGET_MIPS)
101 return const_float16(0x7E00);
103 return const_float16(0xFE00);
109 /*----------------------------------------------------------------------------
110 | The pattern for a default generated single-precision NaN.
111 *----------------------------------------------------------------------------*/
112 float32
float32_default_nan(float_status
*status
)
114 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
115 return const_float32(0x7FFFFFFF);
116 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
117 defined(TARGET_XTENSA) || defined(TARGET_S390X) || defined(TARGET_TRICORE)
118 return const_float32(0x7FC00000);
119 #elif defined(TARGET_HPPA)
120 return const_float32(0x7FA00000);
122 if (status
->snan_bit_is_one
) {
123 return const_float32(0x7FBFFFFF);
125 #if defined(TARGET_MIPS)
126 return const_float32(0x7FC00000);
128 return const_float32(0xFFC00000);
134 /*----------------------------------------------------------------------------
135 | The pattern for a default generated double-precision NaN.
136 *----------------------------------------------------------------------------*/
137 float64
float64_default_nan(float_status
*status
)
139 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
140 return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
141 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
142 defined(TARGET_S390X)
143 return const_float64(LIT64(0x7FF8000000000000));
144 #elif defined(TARGET_HPPA)
145 return const_float64(LIT64(0x7FF4000000000000));
147 if (status
->snan_bit_is_one
) {
148 return const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
150 #if defined(TARGET_MIPS)
151 return const_float64(LIT64(0x7FF8000000000000));
153 return const_float64(LIT64(0xFFF8000000000000));
159 /*----------------------------------------------------------------------------
160 | The pattern for a default generated extended double-precision NaN.
161 *----------------------------------------------------------------------------*/
162 floatx80
floatx80_default_nan(float_status
*status
)
165 #if defined(TARGET_M68K)
166 r
.low
= LIT64(0xFFFFFFFFFFFFFFFF);
169 if (status
->snan_bit_is_one
) {
170 r
.low
= LIT64(0xBFFFFFFFFFFFFFFF);
173 r
.low
= LIT64(0xC000000000000000);
180 /*----------------------------------------------------------------------------
181 | The pattern for a default generated quadruple-precision NaN.
182 *----------------------------------------------------------------------------*/
183 float128
float128_default_nan(float_status
*status
)
187 if (status
->snan_bit_is_one
) {
188 r
.low
= LIT64(0xFFFFFFFFFFFFFFFF);
189 r
.high
= LIT64(0x7FFF7FFFFFFFFFFF);
191 r
.low
= LIT64(0x0000000000000000);
192 #if defined(TARGET_S390X) || defined(TARGET_PPC)
193 r
.high
= LIT64(0x7FFF800000000000);
195 r
.high
= LIT64(0xFFFF800000000000);
201 /*----------------------------------------------------------------------------
202 | Raises the exceptions specified by `flags'. Floating-point traps can be
203 | defined here if desired. It is currently not possible for such a trap
204 | to substitute a result value. If traps are not implemented, this routine
205 | should be simply `float_exception_flags |= flags;'.
206 *----------------------------------------------------------------------------*/
208 void float_raise(uint8_t flags
, float_status
*status
)
210 status
->float_exception_flags
|= flags
;
213 /*----------------------------------------------------------------------------
214 | Internal canonical NaN format.
215 *----------------------------------------------------------------------------*/
221 #ifdef NO_SIGNALING_NANS
222 int float16_is_quiet_nan(float16 a_
, float_status
*status
)
224 return float16_is_any_nan(a_
);
227 int float16_is_signaling_nan(float16 a_
, float_status
*status
)
232 /*----------------------------------------------------------------------------
233 | Returns 1 if the half-precision floating-point value `a' is a quiet
234 | NaN; otherwise returns 0.
235 *----------------------------------------------------------------------------*/
237 int float16_is_quiet_nan(float16 a_
, float_status
*status
)
239 uint16_t a
= float16_val(a_
);
240 if (status
->snan_bit_is_one
) {
241 return (((a
>> 9) & 0x3F) == 0x3E) && (a
& 0x1FF);
243 return ((a
& ~0x8000) >= 0x7C80);
247 /*----------------------------------------------------------------------------
248 | Returns 1 if the half-precision floating-point value `a' is a signaling
249 | NaN; otherwise returns 0.
250 *----------------------------------------------------------------------------*/
252 int float16_is_signaling_nan(float16 a_
, float_status
*status
)
254 uint16_t a
= float16_val(a_
);
255 if (status
->snan_bit_is_one
) {
256 return ((a
& ~0x8000) >= 0x7C80);
258 return (((a
>> 9) & 0x3F) == 0x3E) && (a
& 0x1FF);
263 /*----------------------------------------------------------------------------
264 | Returns a quiet NaN if the half-precision floating point value `a' is a
265 | signaling NaN; otherwise returns `a'.
266 *----------------------------------------------------------------------------*/
267 float16
float16_maybe_silence_nan(float16 a_
, float_status
*status
)
269 if (float16_is_signaling_nan(a_
, status
)) {
270 if (status
->snan_bit_is_one
) {
271 return float16_default_nan(status
);
273 uint16_t a
= float16_val(a_
);
275 return make_float16(a
);
281 /*----------------------------------------------------------------------------
282 | Returns the result of converting the half-precision floating-point NaN
283 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
284 | exception is raised.
285 *----------------------------------------------------------------------------*/
287 static commonNaNT
float16ToCommonNaN(float16 a
, float_status
*status
)
291 if (float16_is_signaling_nan(a
, status
)) {
292 float_raise(float_flag_invalid
, status
);
294 z
.sign
= float16_val(a
) >> 15;
296 z
.high
= ((uint64_t) float16_val(a
)) << 54;
300 /*----------------------------------------------------------------------------
301 | Returns the result of converting the canonical NaN `a' to the half-
302 | precision floating-point format.
303 *----------------------------------------------------------------------------*/
305 static float16
commonNaNToFloat16(commonNaNT a
, float_status
*status
)
307 uint16_t mantissa
= a
.high
>> 54;
309 if (status
->default_nan_mode
) {
310 return float16_default_nan(status
);
314 return make_float16(((((uint16_t) a
.sign
) << 15)
315 | (0x1F << 10) | mantissa
));
317 return float16_default_nan(status
);
321 #ifdef NO_SIGNALING_NANS
322 int float32_is_quiet_nan(float32 a_
, float_status
*status
)
324 return float32_is_any_nan(a_
);
327 int float32_is_signaling_nan(float32 a_
, float_status
*status
)
332 /*----------------------------------------------------------------------------
333 | Returns 1 if the single-precision floating-point value `a' is a quiet
334 | NaN; otherwise returns 0.
335 *----------------------------------------------------------------------------*/
337 int float32_is_quiet_nan(float32 a_
, float_status
*status
)
339 uint32_t a
= float32_val(a_
);
340 if (status
->snan_bit_is_one
) {
341 return (((a
>> 22) & 0x1FF) == 0x1FE) && (a
& 0x003FFFFF);
343 return ((uint32_t)(a
<< 1) >= 0xFF800000);
347 /*----------------------------------------------------------------------------
348 | Returns 1 if the single-precision floating-point value `a' is a signaling
349 | NaN; otherwise returns 0.
350 *----------------------------------------------------------------------------*/
352 int float32_is_signaling_nan(float32 a_
, float_status
*status
)
354 uint32_t a
= float32_val(a_
);
355 if (status
->snan_bit_is_one
) {
356 return ((uint32_t)(a
<< 1) >= 0xFF800000);
358 return (((a
>> 22) & 0x1FF) == 0x1FE) && (a
& 0x003FFFFF);
363 /*----------------------------------------------------------------------------
364 | Returns a quiet NaN if the single-precision floating point value `a' is a
365 | signaling NaN; otherwise returns `a'.
366 *----------------------------------------------------------------------------*/
368 float32
float32_maybe_silence_nan(float32 a_
, float_status
*status
)
370 if (float32_is_signaling_nan(a_
, status
)) {
371 if (status
->snan_bit_is_one
) {
373 uint32_t a
= float32_val(a_
);
376 return make_float32(a
);
378 return float32_default_nan(status
);
381 uint32_t a
= float32_val(a_
);
383 return make_float32(a
);
389 /*----------------------------------------------------------------------------
390 | Returns the result of converting the single-precision floating-point NaN
391 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
392 | exception is raised.
393 *----------------------------------------------------------------------------*/
395 static commonNaNT
float32ToCommonNaN(float32 a
, float_status
*status
)
399 if (float32_is_signaling_nan(a
, status
)) {
400 float_raise(float_flag_invalid
, status
);
402 z
.sign
= float32_val(a
) >> 31;
404 z
.high
= ((uint64_t)float32_val(a
)) << 41;
408 /*----------------------------------------------------------------------------
409 | Returns the result of converting the canonical NaN `a' to the single-
410 | precision floating-point format.
411 *----------------------------------------------------------------------------*/
413 static float32
commonNaNToFloat32(commonNaNT a
, float_status
*status
)
415 uint32_t mantissa
= a
.high
>> 41;
417 if (status
->default_nan_mode
) {
418 return float32_default_nan(status
);
423 (((uint32_t)a
.sign
) << 31) | 0x7F800000 | (a
.high
>> 41));
425 return float32_default_nan(status
);
429 /*----------------------------------------------------------------------------
430 | Select which NaN to propagate for a two-input operation.
431 | IEEE754 doesn't specify all the details of this, so the
432 | algorithm is target-specific.
433 | The routine is passed various bits of information about the
434 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
435 | Note that signalling NaNs are always squashed to quiet NaNs
436 | by the caller, by calling floatXX_maybe_silence_nan() before
439 | aIsLargerSignificand is only valid if both a and b are NaNs
440 | of some kind, and is true if a has the larger significand,
441 | or if both a and b have the same significand but a is
442 | positive but b is negative. It is only needed for the x87
444 *----------------------------------------------------------------------------*/
446 #if defined(TARGET_ARM)
447 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
448 flag aIsLargerSignificand
)
450 /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
452 * 1. A if it is signaling
453 * 2. B if it is signaling
456 * A signaling NaN is always quietened before returning it.
460 } else if (bIsSNaN
) {
462 } else if (aIsQNaN
) {
468 #elif defined(TARGET_MIPS) || defined(TARGET_HPPA)
469 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
470 flag aIsLargerSignificand
)
472 /* According to MIPS specifications, if one of the two operands is
473 * a sNaN, a new qNaN has to be generated. This is done in
474 * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
475 * says: "When possible, this QNaN result is one of the operand QNaN
476 * values." In practice it seems that most implementations choose
477 * the first operand if both operands are qNaN. In short this gives
478 * the following rules:
479 * 1. A if it is signaling
480 * 2. B if it is signaling
483 * A signaling NaN is always silenced before returning it.
487 } else if (bIsSNaN
) {
489 } else if (aIsQNaN
) {
495 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
496 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
497 flag aIsLargerSignificand
)
499 /* PowerPC propagation rules:
500 * 1. A if it sNaN or qNaN
501 * 2. B if it sNaN or qNaN
502 * A signaling NaN is always silenced before returning it.
504 if (aIsSNaN
|| aIsQNaN
) {
510 #elif defined(TARGET_M68K)
511 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
512 flag aIsLargerSignificand
)
514 /* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
515 * 3.4 FLOATING-POINT INSTRUCTION DETAILS
516 * If either operand, but not both operands, of an operation is a
517 * nonsignaling NaN, then that NaN is returned as the result. If both
518 * operands are nonsignaling NaNs, then the destination operand
519 * nonsignaling NaN is returned as the result.
520 * If either operand to an operation is a signaling NaN (SNaN), then the
521 * SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
522 * is set in the FPCR ENABLE byte, then the exception is taken and the
523 * destination is not modified. If the SNaN exception enable bit is not
524 * set, setting the SNaN bit in the operand to a one converts the SNaN to
525 * a nonsignaling NaN. The operation then continues as described in the
526 * preceding paragraph for nonsignaling NaNs.
528 if (aIsQNaN
|| aIsSNaN
) { /* a is the destination operand */
529 return 0; /* return the destination operand */
531 return 1; /* return b */
535 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
536 flag aIsLargerSignificand
)
538 /* This implements x87 NaN propagation rules:
539 * SNaN + QNaN => return the QNaN
540 * two SNaNs => return the one with the larger significand, silenced
541 * two QNaNs => return the one with the larger significand
542 * SNaN and a non-NaN => return the SNaN, silenced
543 * QNaN and a non-NaN => return the QNaN
545 * If we get down to comparing significands and they are the same,
546 * return the NaN with the positive sign bit (if any).
550 return aIsLargerSignificand
? 0 : 1;
552 return bIsQNaN
? 1 : 0;
553 } else if (aIsQNaN
) {
554 if (bIsSNaN
|| !bIsQNaN
) {
557 return aIsLargerSignificand
? 0 : 1;
565 /*----------------------------------------------------------------------------
566 | Select which NaN to propagate for a three-input operation.
567 | For the moment we assume that no CPU needs the 'larger significand'
569 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
570 *----------------------------------------------------------------------------*/
571 #if defined(TARGET_ARM)
572 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
573 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
574 float_status
*status
)
576 /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
579 if (infzero
&& cIsQNaN
) {
580 float_raise(float_flag_invalid
, status
);
584 /* This looks different from the ARM ARM pseudocode, because the ARM ARM
585 * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
589 } else if (aIsSNaN
) {
591 } else if (bIsSNaN
) {
593 } else if (cIsQNaN
) {
595 } else if (aIsQNaN
) {
601 #elif defined(TARGET_MIPS)
602 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
603 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
604 float_status
*status
)
606 /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
610 float_raise(float_flag_invalid
, status
);
614 if (status
->snan_bit_is_one
) {
615 /* Prefer sNaN over qNaN, in the a, b, c order. */
618 } else if (bIsSNaN
) {
620 } else if (cIsSNaN
) {
622 } else if (aIsQNaN
) {
624 } else if (bIsQNaN
) {
630 /* Prefer sNaN over qNaN, in the c, a, b order. */
633 } else if (aIsSNaN
) {
635 } else if (bIsSNaN
) {
637 } else if (cIsQNaN
) {
639 } else if (aIsQNaN
) {
646 #elif defined(TARGET_PPC)
647 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
648 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
649 float_status
*status
)
651 /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
652 * to return an input NaN if we have one (ie c) rather than generating
656 float_raise(float_flag_invalid
, status
);
660 /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
661 * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
663 if (aIsSNaN
|| aIsQNaN
) {
665 } else if (cIsSNaN
|| cIsQNaN
) {
672 /* A default implementation: prefer a to b to c.
673 * This is unlikely to actually match any real implementation.
675 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
676 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
677 float_status
*status
)
679 if (aIsSNaN
|| aIsQNaN
) {
681 } else if (bIsSNaN
|| bIsQNaN
) {
689 /*----------------------------------------------------------------------------
690 | Takes two single-precision floating-point values `a' and `b', one of which
691 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
692 | signaling NaN, the invalid exception is raised.
693 *----------------------------------------------------------------------------*/
695 static float32
propagateFloat32NaN(float32 a
, float32 b
, float_status
*status
)
697 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
698 flag aIsLargerSignificand
;
701 aIsQuietNaN
= float32_is_quiet_nan(a
, status
);
702 aIsSignalingNaN
= float32_is_signaling_nan(a
, status
);
703 bIsQuietNaN
= float32_is_quiet_nan(b
, status
);
704 bIsSignalingNaN
= float32_is_signaling_nan(b
, status
);
708 if (aIsSignalingNaN
| bIsSignalingNaN
) {
709 float_raise(float_flag_invalid
, status
);
712 if (status
->default_nan_mode
) {
713 return float32_default_nan(status
);
716 if ((uint32_t)(av
<< 1) < (uint32_t)(bv
<< 1)) {
717 aIsLargerSignificand
= 0;
718 } else if ((uint32_t)(bv
<< 1) < (uint32_t)(av
<< 1)) {
719 aIsLargerSignificand
= 1;
721 aIsLargerSignificand
= (av
< bv
) ? 1 : 0;
724 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
725 aIsLargerSignificand
)) {
726 return float32_maybe_silence_nan(b
, status
);
728 return float32_maybe_silence_nan(a
, status
);
732 /*----------------------------------------------------------------------------
733 | Takes three single-precision floating-point values `a', `b' and `c', one of
734 | which is a NaN, and returns the appropriate NaN result. If any of `a',
735 | `b' or `c' is a signaling NaN, the invalid exception is raised.
736 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
737 | obviously c is a NaN, and whether to propagate c or some other NaN is
738 | implementation defined).
739 *----------------------------------------------------------------------------*/
741 static float32
propagateFloat32MulAddNaN(float32 a
, float32 b
,
742 float32 c
, flag infzero
,
743 float_status
*status
)
745 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
746 cIsQuietNaN
, cIsSignalingNaN
;
749 aIsQuietNaN
= float32_is_quiet_nan(a
, status
);
750 aIsSignalingNaN
= float32_is_signaling_nan(a
, status
);
751 bIsQuietNaN
= float32_is_quiet_nan(b
, status
);
752 bIsSignalingNaN
= float32_is_signaling_nan(b
, status
);
753 cIsQuietNaN
= float32_is_quiet_nan(c
, status
);
754 cIsSignalingNaN
= float32_is_signaling_nan(c
, status
);
756 if (aIsSignalingNaN
| bIsSignalingNaN
| cIsSignalingNaN
) {
757 float_raise(float_flag_invalid
, status
);
760 which
= pickNaNMulAdd(aIsQuietNaN
, aIsSignalingNaN
,
761 bIsQuietNaN
, bIsSignalingNaN
,
762 cIsQuietNaN
, cIsSignalingNaN
, infzero
, status
);
764 if (status
->default_nan_mode
) {
765 /* Note that this check is after pickNaNMulAdd so that function
766 * has an opportunity to set the Invalid flag.
768 return float32_default_nan(status
);
773 return float32_maybe_silence_nan(a
, status
);
775 return float32_maybe_silence_nan(b
, status
);
777 return float32_maybe_silence_nan(c
, status
);
780 return float32_default_nan(status
);
784 #ifdef NO_SIGNALING_NANS
785 int float64_is_quiet_nan(float64 a_
, float_status
*status
)
787 return float64_is_any_nan(a_
);
790 int float64_is_signaling_nan(float64 a_
, float_status
*status
)
795 /*----------------------------------------------------------------------------
796 | Returns 1 if the double-precision floating-point value `a' is a quiet
797 | NaN; otherwise returns 0.
798 *----------------------------------------------------------------------------*/
800 int float64_is_quiet_nan(float64 a_
, float_status
*status
)
802 uint64_t a
= float64_val(a_
);
803 if (status
->snan_bit_is_one
) {
804 return (((a
>> 51) & 0xFFF) == 0xFFE)
805 && (a
& 0x0007FFFFFFFFFFFFULL
);
807 return ((a
<< 1) >= 0xFFF0000000000000ULL
);
811 /*----------------------------------------------------------------------------
812 | Returns 1 if the double-precision floating-point value `a' is a signaling
813 | NaN; otherwise returns 0.
814 *----------------------------------------------------------------------------*/
816 int float64_is_signaling_nan(float64 a_
, float_status
*status
)
818 uint64_t a
= float64_val(a_
);
819 if (status
->snan_bit_is_one
) {
820 return ((a
<< 1) >= 0xFFF0000000000000ULL
);
822 return (((a
>> 51) & 0xFFF) == 0xFFE)
823 && (a
& LIT64(0x0007FFFFFFFFFFFF));
828 /*----------------------------------------------------------------------------
829 | Returns a quiet NaN if the double-precision floating point value `a' is a
830 | signaling NaN; otherwise returns `a'.
831 *----------------------------------------------------------------------------*/
833 float64
float64_maybe_silence_nan(float64 a_
, float_status
*status
)
835 if (float64_is_signaling_nan(a_
, status
)) {
836 if (status
->snan_bit_is_one
) {
838 uint64_t a
= float64_val(a_
);
839 a
&= ~0x0008000000000000ULL
;
840 a
|= 0x0004000000000000ULL
;
841 return make_float64(a
);
843 return float64_default_nan(status
);
846 uint64_t a
= float64_val(a_
);
847 a
|= LIT64(0x0008000000000000);
848 return make_float64(a
);
854 /*----------------------------------------------------------------------------
855 | Returns the result of converting the double-precision floating-point NaN
856 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
857 | exception is raised.
858 *----------------------------------------------------------------------------*/
860 static commonNaNT
float64ToCommonNaN(float64 a
, float_status
*status
)
864 if (float64_is_signaling_nan(a
, status
)) {
865 float_raise(float_flag_invalid
, status
);
867 z
.sign
= float64_val(a
) >> 63;
869 z
.high
= float64_val(a
) << 12;
873 /*----------------------------------------------------------------------------
874 | Returns the result of converting the canonical NaN `a' to the double-
875 | precision floating-point format.
876 *----------------------------------------------------------------------------*/
878 static float64
commonNaNToFloat64(commonNaNT a
, float_status
*status
)
880 uint64_t mantissa
= a
.high
>> 12;
882 if (status
->default_nan_mode
) {
883 return float64_default_nan(status
);
888 (((uint64_t) a
.sign
) << 63)
889 | LIT64(0x7FF0000000000000)
892 return float64_default_nan(status
);
896 /*----------------------------------------------------------------------------
897 | Takes two double-precision floating-point values `a' and `b', one of which
898 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
899 | signaling NaN, the invalid exception is raised.
900 *----------------------------------------------------------------------------*/
902 static float64
propagateFloat64NaN(float64 a
, float64 b
, float_status
*status
)
904 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
905 flag aIsLargerSignificand
;
908 aIsQuietNaN
= float64_is_quiet_nan(a
, status
);
909 aIsSignalingNaN
= float64_is_signaling_nan(a
, status
);
910 bIsQuietNaN
= float64_is_quiet_nan(b
, status
);
911 bIsSignalingNaN
= float64_is_signaling_nan(b
, status
);
915 if (aIsSignalingNaN
| bIsSignalingNaN
) {
916 float_raise(float_flag_invalid
, status
);
919 if (status
->default_nan_mode
) {
920 return float64_default_nan(status
);
923 if ((uint64_t)(av
<< 1) < (uint64_t)(bv
<< 1)) {
924 aIsLargerSignificand
= 0;
925 } else if ((uint64_t)(bv
<< 1) < (uint64_t)(av
<< 1)) {
926 aIsLargerSignificand
= 1;
928 aIsLargerSignificand
= (av
< bv
) ? 1 : 0;
931 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
932 aIsLargerSignificand
)) {
933 return float64_maybe_silence_nan(b
, status
);
935 return float64_maybe_silence_nan(a
, status
);
939 /*----------------------------------------------------------------------------
940 | Takes three double-precision floating-point values `a', `b' and `c', one of
941 | which is a NaN, and returns the appropriate NaN result. If any of `a',
942 | `b' or `c' is a signaling NaN, the invalid exception is raised.
943 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
944 | obviously c is a NaN, and whether to propagate c or some other NaN is
945 | implementation defined).
946 *----------------------------------------------------------------------------*/
948 static float64
propagateFloat64MulAddNaN(float64 a
, float64 b
,
949 float64 c
, flag infzero
,
950 float_status
*status
)
952 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
953 cIsQuietNaN
, cIsSignalingNaN
;
956 aIsQuietNaN
= float64_is_quiet_nan(a
, status
);
957 aIsSignalingNaN
= float64_is_signaling_nan(a
, status
);
958 bIsQuietNaN
= float64_is_quiet_nan(b
, status
);
959 bIsSignalingNaN
= float64_is_signaling_nan(b
, status
);
960 cIsQuietNaN
= float64_is_quiet_nan(c
, status
);
961 cIsSignalingNaN
= float64_is_signaling_nan(c
, status
);
963 if (aIsSignalingNaN
| bIsSignalingNaN
| cIsSignalingNaN
) {
964 float_raise(float_flag_invalid
, status
);
967 which
= pickNaNMulAdd(aIsQuietNaN
, aIsSignalingNaN
,
968 bIsQuietNaN
, bIsSignalingNaN
,
969 cIsQuietNaN
, cIsSignalingNaN
, infzero
, status
);
971 if (status
->default_nan_mode
) {
972 /* Note that this check is after pickNaNMulAdd so that function
973 * has an opportunity to set the Invalid flag.
975 return float64_default_nan(status
);
980 return float64_maybe_silence_nan(a
, status
);
982 return float64_maybe_silence_nan(b
, status
);
984 return float64_maybe_silence_nan(c
, status
);
987 return float64_default_nan(status
);
991 #ifdef NO_SIGNALING_NANS
992 int floatx80_is_quiet_nan(floatx80 a_
, float_status
*status
)
994 return floatx80_is_any_nan(a_
);
997 int floatx80_is_signaling_nan(floatx80 a_
, float_status
*status
)
1002 /*----------------------------------------------------------------------------
1003 | Returns 1 if the extended double-precision floating-point value `a' is a
1004 | quiet NaN; otherwise returns 0. This slightly differs from the same
1005 | function for other types as floatx80 has an explicit bit.
1006 *----------------------------------------------------------------------------*/
1008 int floatx80_is_quiet_nan(floatx80 a
, float_status
*status
)
1010 if (status
->snan_bit_is_one
) {
1013 aLow
= a
.low
& ~0x4000000000000000ULL
;
1014 return ((a
.high
& 0x7FFF) == 0x7FFF)
1018 return ((a
.high
& 0x7FFF) == 0x7FFF)
1019 && (LIT64(0x8000000000000000) <= ((uint64_t)(a
.low
<< 1)));
1023 /*----------------------------------------------------------------------------
1024 | Returns 1 if the extended double-precision floating-point value `a' is a
1025 | signaling NaN; otherwise returns 0. This slightly differs from the same
1026 | function for other types as floatx80 has an explicit bit.
1027 *----------------------------------------------------------------------------*/
1029 int floatx80_is_signaling_nan(floatx80 a
, float_status
*status
)
1031 if (status
->snan_bit_is_one
) {
1032 return ((a
.high
& 0x7FFF) == 0x7FFF)
1033 && ((a
.low
<< 1) >= 0x8000000000000000ULL
);
1037 aLow
= a
.low
& ~LIT64(0x4000000000000000);
1038 return ((a
.high
& 0x7FFF) == 0x7FFF)
1039 && (uint64_t)(aLow
<< 1)
1045 /*----------------------------------------------------------------------------
1046 | Returns a quiet NaN if the extended double-precision floating point value
1047 | `a' is a signaling NaN; otherwise returns `a'.
1048 *----------------------------------------------------------------------------*/
1050 floatx80
floatx80_maybe_silence_nan(floatx80 a
, float_status
*status
)
1052 if (floatx80_is_signaling_nan(a
, status
)) {
1053 if (status
->snan_bit_is_one
) {
1054 a
= floatx80_default_nan(status
);
1056 a
.low
|= LIT64(0xC000000000000000);
1063 /*----------------------------------------------------------------------------
1064 | Returns the result of converting the extended double-precision floating-
1065 | point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
1066 | invalid exception is raised.
1067 *----------------------------------------------------------------------------*/
1069 static commonNaNT
floatx80ToCommonNaN(floatx80 a
, float_status
*status
)
1074 if (floatx80_is_signaling_nan(a
, status
)) {
1075 float_raise(float_flag_invalid
, status
);
1078 z
.sign
= a
.high
>> 15;
1080 z
.high
= a
.low
<< 1;
1082 dflt
= floatx80_default_nan(status
);
1083 z
.sign
= dflt
.high
>> 15;
1085 z
.high
= dflt
.low
<< 1;
1090 /*----------------------------------------------------------------------------
1091 | Returns the result of converting the canonical NaN `a' to the extended
1092 | double-precision floating-point format.
1093 *----------------------------------------------------------------------------*/
1095 static floatx80
commonNaNToFloatx80(commonNaNT a
, float_status
*status
)
1099 if (status
->default_nan_mode
) {
1100 return floatx80_default_nan(status
);
1104 z
.low
= LIT64(0x8000000000000000) | a
.high
>> 1;
1105 z
.high
= (((uint16_t)a
.sign
) << 15) | 0x7FFF;
1107 z
= floatx80_default_nan(status
);
1112 /*----------------------------------------------------------------------------
1113 | Takes two extended double-precision floating-point values `a' and `b', one
1114 | of which is a NaN, and returns the appropriate NaN result. If either `a' or
1115 | `b' is a signaling NaN, the invalid exception is raised.
1116 *----------------------------------------------------------------------------*/
1118 static floatx80
propagateFloatx80NaN(floatx80 a
, floatx80 b
,
1119 float_status
*status
)
1121 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
1122 flag aIsLargerSignificand
;
1124 aIsQuietNaN
= floatx80_is_quiet_nan(a
, status
);
1125 aIsSignalingNaN
= floatx80_is_signaling_nan(a
, status
);
1126 bIsQuietNaN
= floatx80_is_quiet_nan(b
, status
);
1127 bIsSignalingNaN
= floatx80_is_signaling_nan(b
, status
);
1129 if (aIsSignalingNaN
| bIsSignalingNaN
) {
1130 float_raise(float_flag_invalid
, status
);
1133 if (status
->default_nan_mode
) {
1134 return floatx80_default_nan(status
);
1137 if (a
.low
< b
.low
) {
1138 aIsLargerSignificand
= 0;
1139 } else if (b
.low
< a
.low
) {
1140 aIsLargerSignificand
= 1;
1142 aIsLargerSignificand
= (a
.high
< b
.high
) ? 1 : 0;
1145 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
1146 aIsLargerSignificand
)) {
1147 return floatx80_maybe_silence_nan(b
, status
);
1149 return floatx80_maybe_silence_nan(a
, status
);
1153 #ifdef NO_SIGNALING_NANS
1154 int float128_is_quiet_nan(float128 a_
, float_status
*status
)
1156 return float128_is_any_nan(a_
);
1159 int float128_is_signaling_nan(float128 a_
, float_status
*status
)
1164 /*----------------------------------------------------------------------------
1165 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1166 | NaN; otherwise returns 0.
1167 *----------------------------------------------------------------------------*/
1169 int float128_is_quiet_nan(float128 a
, float_status
*status
)
1171 if (status
->snan_bit_is_one
) {
1172 return (((a
.high
>> 47) & 0xFFFF) == 0xFFFE)
1173 && (a
.low
|| (a
.high
& 0x00007FFFFFFFFFFFULL
));
1175 return ((a
.high
<< 1) >= 0xFFFF000000000000ULL
)
1176 && (a
.low
|| (a
.high
& 0x0000FFFFFFFFFFFFULL
));
1180 /*----------------------------------------------------------------------------
1181 | Returns 1 if the quadruple-precision floating-point value `a' is a
1182 | signaling NaN; otherwise returns 0.
1183 *----------------------------------------------------------------------------*/
1185 int float128_is_signaling_nan(float128 a
, float_status
*status
)
1187 if (status
->snan_bit_is_one
) {
1188 return ((a
.high
<< 1) >= 0xFFFF000000000000ULL
)
1189 && (a
.low
|| (a
.high
& 0x0000FFFFFFFFFFFFULL
));
1191 return (((a
.high
>> 47) & 0xFFFF) == 0xFFFE)
1192 && (a
.low
|| (a
.high
& LIT64(0x00007FFFFFFFFFFF)));
1197 /*----------------------------------------------------------------------------
1198 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1199 | a signaling NaN; otherwise returns `a'.
1200 *----------------------------------------------------------------------------*/
1202 float128
float128_maybe_silence_nan(float128 a
, float_status
*status
)
1204 if (float128_is_signaling_nan(a
, status
)) {
1205 if (status
->snan_bit_is_one
) {
1206 a
= float128_default_nan(status
);
1208 a
.high
|= LIT64(0x0000800000000000);
1215 /*----------------------------------------------------------------------------
1216 | Returns the result of converting the quadruple-precision floating-point NaN
1217 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
1218 | exception is raised.
1219 *----------------------------------------------------------------------------*/
1221 static commonNaNT
float128ToCommonNaN(float128 a
, float_status
*status
)
1225 if (float128_is_signaling_nan(a
, status
)) {
1226 float_raise(float_flag_invalid
, status
);
1228 z
.sign
= a
.high
>> 63;
1229 shortShift128Left(a
.high
, a
.low
, 16, &z
.high
, &z
.low
);
1233 /*----------------------------------------------------------------------------
1234 | Returns the result of converting the canonical NaN `a' to the quadruple-
1235 | precision floating-point format.
1236 *----------------------------------------------------------------------------*/
1238 static float128
commonNaNToFloat128(commonNaNT a
, float_status
*status
)
1242 if (status
->default_nan_mode
) {
1243 return float128_default_nan(status
);
1246 shift128Right(a
.high
, a
.low
, 16, &z
.high
, &z
.low
);
1247 z
.high
|= (((uint64_t)a
.sign
) << 63) | LIT64(0x7FFF000000000000);
1251 /*----------------------------------------------------------------------------
1252 | Takes two quadruple-precision floating-point values `a' and `b', one of
1253 | which is a NaN, and returns the appropriate NaN result. If either `a' or
1254 | `b' is a signaling NaN, the invalid exception is raised.
1255 *----------------------------------------------------------------------------*/
1257 static float128
propagateFloat128NaN(float128 a
, float128 b
,
1258 float_status
*status
)
1260 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
1261 flag aIsLargerSignificand
;
1263 aIsQuietNaN
= float128_is_quiet_nan(a
, status
);
1264 aIsSignalingNaN
= float128_is_signaling_nan(a
, status
);
1265 bIsQuietNaN
= float128_is_quiet_nan(b
, status
);
1266 bIsSignalingNaN
= float128_is_signaling_nan(b
, status
);
1268 if (aIsSignalingNaN
| bIsSignalingNaN
) {
1269 float_raise(float_flag_invalid
, status
);
1272 if (status
->default_nan_mode
) {
1273 return float128_default_nan(status
);
1276 if (lt128(a
.high
<< 1, a
.low
, b
.high
<< 1, b
.low
)) {
1277 aIsLargerSignificand
= 0;
1278 } else if (lt128(b
.high
<< 1, b
.low
, a
.high
<< 1, a
.low
)) {
1279 aIsLargerSignificand
= 1;
1281 aIsLargerSignificand
= (a
.high
< b
.high
) ? 1 : 0;
1284 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
1285 aIsLargerSignificand
)) {
1286 return float128_maybe_silence_nan(b
, status
);
1288 return float128_maybe_silence_nan(a
, status
);