4 * The code in this source file is derived from release 2a of the SoftFloat
5 * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
6 * some later contributions) are provided under that license, as detailed below.
7 * It has subsequently been modified by contributors to the QEMU Project,
8 * so some portions are provided under:
9 * the SoftFloat-2a license
13 * Any future contributions to this file after December 1st 2014 will be
14 * taken to be licensed under the Softfloat-2a license unless specifically
15 * indicated otherwise.
19 ===============================================================================
20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
21 Arithmetic Package, Release 2a.
23 Written by John R. Hauser. This work was made possible in part by the
24 International Computer Science Institute, located at Suite 600, 1947 Center
25 Street, Berkeley, California 94704. Funding was partially provided by the
26 National Science Foundation under grant MIP-9311980. The original version
27 of this code was written as part of a project to build a fixed-point vector
28 processor in collaboration with the University of California at Berkeley,
29 overseen by Profs. Nelson Morgan and John Wawrzynek. More information
30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
31 arithmetic/SoftFloat.html'.
33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
35 TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
39 Derivative works are acceptable, even for commercial purposes, so long as
40 (1) they include prominent notice that the work is derivative, and (2) they
41 include prominent notice akin to these four paragraphs for those parts of
42 this code that are retained.
44 ===============================================================================
48 * Copyright (c) 2006, Fabrice Bellard
49 * All rights reserved.
51 * Redistribution and use in source and binary forms, with or without
52 * modification, are permitted provided that the following conditions are met:
54 * 1. Redistributions of source code must retain the above copyright notice,
55 * this list of conditions and the following disclaimer.
57 * 2. Redistributions in binary form must reproduce the above copyright notice,
58 * this list of conditions and the following disclaimer in the documentation
59 * and/or other materials provided with the distribution.
61 * 3. Neither the name of the copyright holder nor the names of its contributors
62 * may be used to endorse or promote products derived from this software without
63 * specific prior written permission.
65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
68 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
69 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
70 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
71 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
72 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
73 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
74 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
75 * THE POSSIBILITY OF SUCH DAMAGE.
78 /* Portions of this work are licensed under the terms of the GNU GPL,
79 * version 2 or later. See the COPYING file in the top-level directory.
82 #if defined(TARGET_XTENSA)
83 /* Define for architectures which deviate from IEEE in not supporting
84 * signaling NaNs (so all NaNs are treated as quiet).
86 #define NO_SIGNALING_NANS 1
89 /*----------------------------------------------------------------------------
90 | For the deconstructed floating-point with fraction FRAC, return true
91 | if the fraction represents a signalling NaN; otherwise false.
92 *----------------------------------------------------------------------------*/
94 static bool parts_is_snan_frac(uint64_t frac
, float_status
*status
)
96 #ifdef NO_SIGNALING_NANS
99 flag msb
= extract64(frac
, DECOMPOSED_BINARY_POINT
- 1, 1);
100 return msb
== status
->snan_bit_is_one
;
104 /*----------------------------------------------------------------------------
105 | The pattern for a default generated half-precision NaN.
106 *----------------------------------------------------------------------------*/
107 float16
float16_default_nan(float_status
*status
)
109 #if defined(TARGET_ARM)
110 return const_float16(0x7E00);
112 if (status
->snan_bit_is_one
) {
113 return const_float16(0x7DFF);
115 #if defined(TARGET_MIPS)
116 return const_float16(0x7E00);
118 return const_float16(0xFE00);
124 /*----------------------------------------------------------------------------
125 | The pattern for a default generated single-precision NaN.
126 *----------------------------------------------------------------------------*/
127 float32
float32_default_nan(float_status
*status
)
129 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
130 return const_float32(0x7FFFFFFF);
131 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
132 defined(TARGET_XTENSA) || defined(TARGET_S390X) || \
133 defined(TARGET_TRICORE) || defined(TARGET_RISCV)
134 return const_float32(0x7FC00000);
135 #elif defined(TARGET_HPPA)
136 return const_float32(0x7FA00000);
138 if (status
->snan_bit_is_one
) {
139 return const_float32(0x7FBFFFFF);
141 #if defined(TARGET_MIPS)
142 return const_float32(0x7FC00000);
144 return const_float32(0xFFC00000);
150 /*----------------------------------------------------------------------------
151 | The pattern for a default generated double-precision NaN.
152 *----------------------------------------------------------------------------*/
153 float64
float64_default_nan(float_status
*status
)
155 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
156 return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
157 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
158 defined(TARGET_S390X) || defined(TARGET_RISCV)
159 return const_float64(LIT64(0x7FF8000000000000));
160 #elif defined(TARGET_HPPA)
161 return const_float64(LIT64(0x7FF4000000000000));
163 if (status
->snan_bit_is_one
) {
164 return const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
166 #if defined(TARGET_MIPS)
167 return const_float64(LIT64(0x7FF8000000000000));
169 return const_float64(LIT64(0xFFF8000000000000));
175 /*----------------------------------------------------------------------------
176 | The pattern for a default generated extended double-precision NaN.
177 *----------------------------------------------------------------------------*/
178 floatx80
floatx80_default_nan(float_status
*status
)
181 #if defined(TARGET_M68K)
182 r
.low
= LIT64(0xFFFFFFFFFFFFFFFF);
185 if (status
->snan_bit_is_one
) {
186 r
.low
= LIT64(0xBFFFFFFFFFFFFFFF);
189 r
.low
= LIT64(0xC000000000000000);
196 /*----------------------------------------------------------------------------
197 | The pattern for a default generated extended double-precision inf.
198 *----------------------------------------------------------------------------*/
200 #define floatx80_infinity_high 0x7FFF
201 #if defined(TARGET_M68K)
202 #define floatx80_infinity_low LIT64(0x0000000000000000)
204 #define floatx80_infinity_low LIT64(0x8000000000000000)
207 const floatx80 floatx80_infinity
208 = make_floatx80_init(floatx80_infinity_high
, floatx80_infinity_low
);
210 /*----------------------------------------------------------------------------
211 | The pattern for a default generated quadruple-precision NaN.
212 *----------------------------------------------------------------------------*/
213 float128
float128_default_nan(float_status
*status
)
217 if (status
->snan_bit_is_one
) {
218 r
.low
= LIT64(0xFFFFFFFFFFFFFFFF);
219 r
.high
= LIT64(0x7FFF7FFFFFFFFFFF);
221 r
.low
= LIT64(0x0000000000000000);
222 #if defined(TARGET_S390X) || defined(TARGET_PPC) || defined(TARGET_RISCV)
223 r
.high
= LIT64(0x7FFF800000000000);
225 r
.high
= LIT64(0xFFFF800000000000);
231 /*----------------------------------------------------------------------------
232 | Raises the exceptions specified by `flags'. Floating-point traps can be
233 | defined here if desired. It is currently not possible for such a trap
234 | to substitute a result value. If traps are not implemented, this routine
235 | should be simply `float_exception_flags |= flags;'.
236 *----------------------------------------------------------------------------*/
238 void float_raise(uint8_t flags
, float_status
*status
)
240 status
->float_exception_flags
|= flags
;
243 /*----------------------------------------------------------------------------
244 | Internal canonical NaN format.
245 *----------------------------------------------------------------------------*/
251 /*----------------------------------------------------------------------------
252 | Returns 1 if the half-precision floating-point value `a' is a quiet
253 | NaN; otherwise returns 0.
254 *----------------------------------------------------------------------------*/
256 int float16_is_quiet_nan(float16 a_
, float_status
*status
)
258 #ifdef NO_SIGNALING_NANS
259 return float16_is_any_nan(a_
);
261 uint16_t a
= float16_val(a_
);
262 if (status
->snan_bit_is_one
) {
263 return (((a
>> 9) & 0x3F) == 0x3E) && (a
& 0x1FF);
265 return ((a
& ~0x8000) >= 0x7C80);
270 /*----------------------------------------------------------------------------
271 | Returns 1 if the half-precision floating-point value `a' is a signaling
272 | NaN; otherwise returns 0.
273 *----------------------------------------------------------------------------*/
275 int float16_is_signaling_nan(float16 a_
, float_status
*status
)
277 #ifdef NO_SIGNALING_NANS
280 uint16_t a
= float16_val(a_
);
281 if (status
->snan_bit_is_one
) {
282 return ((a
& ~0x8000) >= 0x7C80);
284 return (((a
>> 9) & 0x3F) == 0x3E) && (a
& 0x1FF);
289 /*----------------------------------------------------------------------------
290 | Returns a quiet NaN from a signalling NaN for the half-precision
291 | floating point value `a'.
292 *----------------------------------------------------------------------------*/
294 float16
float16_silence_nan(float16 a
, float_status
*status
)
296 #ifdef NO_SIGNALING_NANS
297 g_assert_not_reached();
299 if (status
->snan_bit_is_one
) {
300 return float16_default_nan(status
);
307 /*----------------------------------------------------------------------------
308 | Returns a quiet NaN if the half-precision floating point value `a' is a
309 | signaling NaN; otherwise returns `a'.
310 *----------------------------------------------------------------------------*/
312 float16
float16_maybe_silence_nan(float16 a
, float_status
*status
)
314 if (float16_is_signaling_nan(a
, status
)) {
315 return float16_silence_nan(a
, status
);
320 /*----------------------------------------------------------------------------
321 | Returns the result of converting the half-precision floating-point NaN
322 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
323 | exception is raised.
324 *----------------------------------------------------------------------------*/
326 static commonNaNT
float16ToCommonNaN(float16 a
, float_status
*status
)
330 if (float16_is_signaling_nan(a
, status
)) {
331 float_raise(float_flag_invalid
, status
);
333 z
.sign
= float16_val(a
) >> 15;
335 z
.high
= ((uint64_t) float16_val(a
)) << 54;
339 /*----------------------------------------------------------------------------
340 | Returns the result of converting the canonical NaN `a' to the half-
341 | precision floating-point format.
342 *----------------------------------------------------------------------------*/
344 static float16
commonNaNToFloat16(commonNaNT a
, float_status
*status
)
346 uint16_t mantissa
= a
.high
>> 54;
348 if (status
->default_nan_mode
) {
349 return float16_default_nan(status
);
353 return make_float16(((((uint16_t) a
.sign
) << 15)
354 | (0x1F << 10) | mantissa
));
356 return float16_default_nan(status
);
360 /*----------------------------------------------------------------------------
361 | Returns 1 if the single-precision floating-point value `a' is a quiet
362 | NaN; otherwise returns 0.
363 *----------------------------------------------------------------------------*/
365 int float32_is_quiet_nan(float32 a_
, float_status
*status
)
367 #ifdef NO_SIGNALING_NANS
368 return float32_is_any_nan(a_
);
370 uint32_t a
= float32_val(a_
);
371 if (status
->snan_bit_is_one
) {
372 return (((a
>> 22) & 0x1FF) == 0x1FE) && (a
& 0x003FFFFF);
374 return ((uint32_t)(a
<< 1) >= 0xFF800000);
379 /*----------------------------------------------------------------------------
380 | Returns 1 if the single-precision floating-point value `a' is a signaling
381 | NaN; otherwise returns 0.
382 *----------------------------------------------------------------------------*/
384 int float32_is_signaling_nan(float32 a_
, float_status
*status
)
386 #ifdef NO_SIGNALING_NANS
389 uint32_t a
= float32_val(a_
);
390 if (status
->snan_bit_is_one
) {
391 return ((uint32_t)(a
<< 1) >= 0xFF800000);
393 return (((a
>> 22) & 0x1FF) == 0x1FE) && (a
& 0x003FFFFF);
398 /*----------------------------------------------------------------------------
399 | Returns a quiet NaN from a signalling NaN for the single-precision
400 | floating point value `a'.
401 *----------------------------------------------------------------------------*/
403 float32
float32_silence_nan(float32 a
, float_status
*status
)
405 #ifdef NO_SIGNALING_NANS
406 g_assert_not_reached();
408 if (status
->snan_bit_is_one
) {
414 return float32_default_nan(status
);
417 return a
| (1 << 22);
421 /*----------------------------------------------------------------------------
422 | Returns a quiet NaN if the single-precision floating point value `a' is a
423 | signaling NaN; otherwise returns `a'.
424 *----------------------------------------------------------------------------*/
426 float32
float32_maybe_silence_nan(float32 a
, float_status
*status
)
428 if (float32_is_signaling_nan(a
, status
)) {
429 return float32_silence_nan(a
, status
);
434 /*----------------------------------------------------------------------------
435 | Returns the result of converting the single-precision floating-point NaN
436 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
437 | exception is raised.
438 *----------------------------------------------------------------------------*/
440 static commonNaNT
float32ToCommonNaN(float32 a
, float_status
*status
)
444 if (float32_is_signaling_nan(a
, status
)) {
445 float_raise(float_flag_invalid
, status
);
447 z
.sign
= float32_val(a
) >> 31;
449 z
.high
= ((uint64_t)float32_val(a
)) << 41;
453 /*----------------------------------------------------------------------------
454 | Returns the result of converting the canonical NaN `a' to the single-
455 | precision floating-point format.
456 *----------------------------------------------------------------------------*/
458 static float32
commonNaNToFloat32(commonNaNT a
, float_status
*status
)
460 uint32_t mantissa
= a
.high
>> 41;
462 if (status
->default_nan_mode
) {
463 return float32_default_nan(status
);
468 (((uint32_t)a
.sign
) << 31) | 0x7F800000 | (a
.high
>> 41));
470 return float32_default_nan(status
);
474 /*----------------------------------------------------------------------------
475 | Select which NaN to propagate for a two-input operation.
476 | IEEE754 doesn't specify all the details of this, so the
477 | algorithm is target-specific.
478 | The routine is passed various bits of information about the
479 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
480 | Note that signalling NaNs are always squashed to quiet NaNs
481 | by the caller, by calling floatXX_maybe_silence_nan() before
484 | aIsLargerSignificand is only valid if both a and b are NaNs
485 | of some kind, and is true if a has the larger significand,
486 | or if both a and b have the same significand but a is
487 | positive but b is negative. It is only needed for the x87
489 *----------------------------------------------------------------------------*/
491 #if defined(TARGET_ARM)
492 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
493 flag aIsLargerSignificand
)
495 /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
497 * 1. A if it is signaling
498 * 2. B if it is signaling
501 * A signaling NaN is always quietened before returning it.
505 } else if (bIsSNaN
) {
507 } else if (aIsQNaN
) {
513 #elif defined(TARGET_MIPS) || defined(TARGET_HPPA)
514 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
515 flag aIsLargerSignificand
)
517 /* According to MIPS specifications, if one of the two operands is
518 * a sNaN, a new qNaN has to be generated. This is done in
519 * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
520 * says: "When possible, this QNaN result is one of the operand QNaN
521 * values." In practice it seems that most implementations choose
522 * the first operand if both operands are qNaN. In short this gives
523 * the following rules:
524 * 1. A if it is signaling
525 * 2. B if it is signaling
528 * A signaling NaN is always silenced before returning it.
532 } else if (bIsSNaN
) {
534 } else if (aIsQNaN
) {
540 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
541 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
542 flag aIsLargerSignificand
)
544 /* PowerPC propagation rules:
545 * 1. A if it sNaN or qNaN
546 * 2. B if it sNaN or qNaN
547 * A signaling NaN is always silenced before returning it.
549 if (aIsSNaN
|| aIsQNaN
) {
555 #elif defined(TARGET_M68K)
556 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
557 flag aIsLargerSignificand
)
559 /* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
560 * 3.4 FLOATING-POINT INSTRUCTION DETAILS
561 * If either operand, but not both operands, of an operation is a
562 * nonsignaling NaN, then that NaN is returned as the result. If both
563 * operands are nonsignaling NaNs, then the destination operand
564 * nonsignaling NaN is returned as the result.
565 * If either operand to an operation is a signaling NaN (SNaN), then the
566 * SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
567 * is set in the FPCR ENABLE byte, then the exception is taken and the
568 * destination is not modified. If the SNaN exception enable bit is not
569 * set, setting the SNaN bit in the operand to a one converts the SNaN to
570 * a nonsignaling NaN. The operation then continues as described in the
571 * preceding paragraph for nonsignaling NaNs.
573 if (aIsQNaN
|| aIsSNaN
) { /* a is the destination operand */
574 return 0; /* return the destination operand */
576 return 1; /* return b */
580 static int pickNaN(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
581 flag aIsLargerSignificand
)
583 /* This implements x87 NaN propagation rules:
584 * SNaN + QNaN => return the QNaN
585 * two SNaNs => return the one with the larger significand, silenced
586 * two QNaNs => return the one with the larger significand
587 * SNaN and a non-NaN => return the SNaN, silenced
588 * QNaN and a non-NaN => return the QNaN
590 * If we get down to comparing significands and they are the same,
591 * return the NaN with the positive sign bit (if any).
595 return aIsLargerSignificand
? 0 : 1;
597 return bIsQNaN
? 1 : 0;
598 } else if (aIsQNaN
) {
599 if (bIsSNaN
|| !bIsQNaN
) {
602 return aIsLargerSignificand
? 0 : 1;
610 /*----------------------------------------------------------------------------
611 | Select which NaN to propagate for a three-input operation.
612 | For the moment we assume that no CPU needs the 'larger significand'
614 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
615 *----------------------------------------------------------------------------*/
616 #if defined(TARGET_ARM)
617 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
618 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
619 float_status
*status
)
621 /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
624 if (infzero
&& cIsQNaN
) {
625 float_raise(float_flag_invalid
, status
);
629 /* This looks different from the ARM ARM pseudocode, because the ARM ARM
630 * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
634 } else if (aIsSNaN
) {
636 } else if (bIsSNaN
) {
638 } else if (cIsQNaN
) {
640 } else if (aIsQNaN
) {
646 #elif defined(TARGET_MIPS)
647 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
648 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
649 float_status
*status
)
651 /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
655 float_raise(float_flag_invalid
, status
);
659 if (status
->snan_bit_is_one
) {
660 /* Prefer sNaN over qNaN, in the a, b, c order. */
663 } else if (bIsSNaN
) {
665 } else if (cIsSNaN
) {
667 } else if (aIsQNaN
) {
669 } else if (bIsQNaN
) {
675 /* Prefer sNaN over qNaN, in the c, a, b order. */
678 } else if (aIsSNaN
) {
680 } else if (bIsSNaN
) {
682 } else if (cIsQNaN
) {
684 } else if (aIsQNaN
) {
691 #elif defined(TARGET_PPC)
692 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
693 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
694 float_status
*status
)
696 /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
697 * to return an input NaN if we have one (ie c) rather than generating
701 float_raise(float_flag_invalid
, status
);
705 /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
706 * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
708 if (aIsSNaN
|| aIsQNaN
) {
710 } else if (cIsSNaN
|| cIsQNaN
) {
717 /* A default implementation: prefer a to b to c.
718 * This is unlikely to actually match any real implementation.
720 static int pickNaNMulAdd(flag aIsQNaN
, flag aIsSNaN
, flag bIsQNaN
, flag bIsSNaN
,
721 flag cIsQNaN
, flag cIsSNaN
, flag infzero
,
722 float_status
*status
)
724 if (aIsSNaN
|| aIsQNaN
) {
726 } else if (bIsSNaN
|| bIsQNaN
) {
734 /*----------------------------------------------------------------------------
735 | Takes two single-precision floating-point values `a' and `b', one of which
736 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
737 | signaling NaN, the invalid exception is raised.
738 *----------------------------------------------------------------------------*/
740 static float32
propagateFloat32NaN(float32 a
, float32 b
, float_status
*status
)
742 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
743 flag aIsLargerSignificand
;
746 aIsQuietNaN
= float32_is_quiet_nan(a
, status
);
747 aIsSignalingNaN
= float32_is_signaling_nan(a
, status
);
748 bIsQuietNaN
= float32_is_quiet_nan(b
, status
);
749 bIsSignalingNaN
= float32_is_signaling_nan(b
, status
);
753 if (aIsSignalingNaN
| bIsSignalingNaN
) {
754 float_raise(float_flag_invalid
, status
);
757 if (status
->default_nan_mode
) {
758 return float32_default_nan(status
);
761 if ((uint32_t)(av
<< 1) < (uint32_t)(bv
<< 1)) {
762 aIsLargerSignificand
= 0;
763 } else if ((uint32_t)(bv
<< 1) < (uint32_t)(av
<< 1)) {
764 aIsLargerSignificand
= 1;
766 aIsLargerSignificand
= (av
< bv
) ? 1 : 0;
769 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
770 aIsLargerSignificand
)) {
771 return float32_maybe_silence_nan(b
, status
);
773 return float32_maybe_silence_nan(a
, status
);
777 /*----------------------------------------------------------------------------
778 | Returns 1 if the double-precision floating-point value `a' is a quiet
779 | NaN; otherwise returns 0.
780 *----------------------------------------------------------------------------*/
782 int float64_is_quiet_nan(float64 a_
, float_status
*status
)
784 #ifdef NO_SIGNALING_NANS
785 return float64_is_any_nan(a_
);
787 uint64_t a
= float64_val(a_
);
788 if (status
->snan_bit_is_one
) {
789 return (((a
>> 51) & 0xFFF) == 0xFFE)
790 && (a
& 0x0007FFFFFFFFFFFFULL
);
792 return ((a
<< 1) >= 0xFFF0000000000000ULL
);
797 /*----------------------------------------------------------------------------
798 | Returns 1 if the double-precision floating-point value `a' is a signaling
799 | NaN; otherwise returns 0.
800 *----------------------------------------------------------------------------*/
802 int float64_is_signaling_nan(float64 a_
, float_status
*status
)
804 #ifdef NO_SIGNALING_NANS
807 uint64_t a
= float64_val(a_
);
808 if (status
->snan_bit_is_one
) {
809 return ((a
<< 1) >= 0xFFF0000000000000ULL
);
811 return (((a
>> 51) & 0xFFF) == 0xFFE)
812 && (a
& LIT64(0x0007FFFFFFFFFFFF));
817 /*----------------------------------------------------------------------------
818 | Returns a quiet NaN from a signalling NaN for the double-precision
819 | floating point value `a'.
820 *----------------------------------------------------------------------------*/
822 float64
float64_silence_nan(float64 a
, float_status
*status
)
824 #ifdef NO_SIGNALING_NANS
825 g_assert_not_reached();
827 if (status
->snan_bit_is_one
) {
829 a
&= ~0x0008000000000000ULL
;
830 a
|= 0x0004000000000000ULL
;
833 return float64_default_nan(status
);
836 return a
| LIT64(0x0008000000000000);
841 /*----------------------------------------------------------------------------
842 | Returns a quiet NaN if the double-precision floating point value `a' is a
843 | signaling NaN; otherwise returns `a'.
844 *----------------------------------------------------------------------------*/
846 float64
float64_maybe_silence_nan(float64 a
, float_status
*status
)
848 if (float64_is_signaling_nan(a
, status
)) {
849 return float64_silence_nan(a
, status
);
854 /*----------------------------------------------------------------------------
855 | Returns the result of converting the double-precision floating-point NaN
856 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
857 | exception is raised.
858 *----------------------------------------------------------------------------*/
860 static commonNaNT
float64ToCommonNaN(float64 a
, float_status
*status
)
864 if (float64_is_signaling_nan(a
, status
)) {
865 float_raise(float_flag_invalid
, status
);
867 z
.sign
= float64_val(a
) >> 63;
869 z
.high
= float64_val(a
) << 12;
873 /*----------------------------------------------------------------------------
874 | Returns the result of converting the canonical NaN `a' to the double-
875 | precision floating-point format.
876 *----------------------------------------------------------------------------*/
878 static float64
commonNaNToFloat64(commonNaNT a
, float_status
*status
)
880 uint64_t mantissa
= a
.high
>> 12;
882 if (status
->default_nan_mode
) {
883 return float64_default_nan(status
);
888 (((uint64_t) a
.sign
) << 63)
889 | LIT64(0x7FF0000000000000)
892 return float64_default_nan(status
);
896 /*----------------------------------------------------------------------------
897 | Takes two double-precision floating-point values `a' and `b', one of which
898 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
899 | signaling NaN, the invalid exception is raised.
900 *----------------------------------------------------------------------------*/
902 static float64
propagateFloat64NaN(float64 a
, float64 b
, float_status
*status
)
904 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
905 flag aIsLargerSignificand
;
908 aIsQuietNaN
= float64_is_quiet_nan(a
, status
);
909 aIsSignalingNaN
= float64_is_signaling_nan(a
, status
);
910 bIsQuietNaN
= float64_is_quiet_nan(b
, status
);
911 bIsSignalingNaN
= float64_is_signaling_nan(b
, status
);
915 if (aIsSignalingNaN
| bIsSignalingNaN
) {
916 float_raise(float_flag_invalid
, status
);
919 if (status
->default_nan_mode
) {
920 return float64_default_nan(status
);
923 if ((uint64_t)(av
<< 1) < (uint64_t)(bv
<< 1)) {
924 aIsLargerSignificand
= 0;
925 } else if ((uint64_t)(bv
<< 1) < (uint64_t)(av
<< 1)) {
926 aIsLargerSignificand
= 1;
928 aIsLargerSignificand
= (av
< bv
) ? 1 : 0;
931 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
932 aIsLargerSignificand
)) {
933 return float64_maybe_silence_nan(b
, status
);
935 return float64_maybe_silence_nan(a
, status
);
939 /*----------------------------------------------------------------------------
940 | Returns 1 if the extended double-precision floating-point value `a' is a
941 | quiet NaN; otherwise returns 0. This slightly differs from the same
942 | function for other types as floatx80 has an explicit bit.
943 *----------------------------------------------------------------------------*/
945 int floatx80_is_quiet_nan(floatx80 a
, float_status
*status
)
947 #ifdef NO_SIGNALING_NANS
948 return floatx80_is_any_nan(a
);
950 if (status
->snan_bit_is_one
) {
953 aLow
= a
.low
& ~0x4000000000000000ULL
;
954 return ((a
.high
& 0x7FFF) == 0x7FFF)
958 return ((a
.high
& 0x7FFF) == 0x7FFF)
959 && (LIT64(0x8000000000000000) <= ((uint64_t)(a
.low
<< 1)));
964 /*----------------------------------------------------------------------------
965 | Returns 1 if the extended double-precision floating-point value `a' is a
966 | signaling NaN; otherwise returns 0. This slightly differs from the same
967 | function for other types as floatx80 has an explicit bit.
968 *----------------------------------------------------------------------------*/
970 int floatx80_is_signaling_nan(floatx80 a
, float_status
*status
)
972 #ifdef NO_SIGNALING_NANS
975 if (status
->snan_bit_is_one
) {
976 return ((a
.high
& 0x7FFF) == 0x7FFF)
977 && ((a
.low
<< 1) >= 0x8000000000000000ULL
);
981 aLow
= a
.low
& ~LIT64(0x4000000000000000);
982 return ((a
.high
& 0x7FFF) == 0x7FFF)
983 && (uint64_t)(aLow
<< 1)
989 /*----------------------------------------------------------------------------
990 | Returns a quiet NaN from a signalling NaN for the extended double-precision
991 | floating point value `a'.
992 *----------------------------------------------------------------------------*/
994 floatx80
floatx80_silence_nan(floatx80 a
, float_status
*status
)
996 #ifdef NO_SIGNALING_NANS
997 g_assert_not_reached();
999 if (status
->snan_bit_is_one
) {
1000 return floatx80_default_nan(status
);
1002 a
.low
|= LIT64(0xC000000000000000);
1008 /*----------------------------------------------------------------------------
1009 | Returns a quiet NaN if the extended double-precision floating point value
1010 | `a' is a signaling NaN; otherwise returns `a'.
1011 *----------------------------------------------------------------------------*/
1013 floatx80
floatx80_maybe_silence_nan(floatx80 a
, float_status
*status
)
1015 if (floatx80_is_signaling_nan(a
, status
)) {
1016 return floatx80_silence_nan(a
, status
);
1021 /*----------------------------------------------------------------------------
1022 | Returns the result of converting the extended double-precision floating-
1023 | point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
1024 | invalid exception is raised.
1025 *----------------------------------------------------------------------------*/
1027 static commonNaNT
floatx80ToCommonNaN(floatx80 a
, float_status
*status
)
1032 if (floatx80_is_signaling_nan(a
, status
)) {
1033 float_raise(float_flag_invalid
, status
);
1036 z
.sign
= a
.high
>> 15;
1038 z
.high
= a
.low
<< 1;
1040 dflt
= floatx80_default_nan(status
);
1041 z
.sign
= dflt
.high
>> 15;
1043 z
.high
= dflt
.low
<< 1;
1048 /*----------------------------------------------------------------------------
1049 | Returns the result of converting the canonical NaN `a' to the extended
1050 | double-precision floating-point format.
1051 *----------------------------------------------------------------------------*/
1053 static floatx80
commonNaNToFloatx80(commonNaNT a
, float_status
*status
)
1057 if (status
->default_nan_mode
) {
1058 return floatx80_default_nan(status
);
1062 z
.low
= LIT64(0x8000000000000000) | a
.high
>> 1;
1063 z
.high
= (((uint16_t)a
.sign
) << 15) | 0x7FFF;
1065 z
= floatx80_default_nan(status
);
1070 /*----------------------------------------------------------------------------
1071 | Takes two extended double-precision floating-point values `a' and `b', one
1072 | of which is a NaN, and returns the appropriate NaN result. If either `a' or
1073 | `b' is a signaling NaN, the invalid exception is raised.
1074 *----------------------------------------------------------------------------*/
1076 floatx80
propagateFloatx80NaN(floatx80 a
, floatx80 b
, float_status
*status
)
1078 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
1079 flag aIsLargerSignificand
;
1081 aIsQuietNaN
= floatx80_is_quiet_nan(a
, status
);
1082 aIsSignalingNaN
= floatx80_is_signaling_nan(a
, status
);
1083 bIsQuietNaN
= floatx80_is_quiet_nan(b
, status
);
1084 bIsSignalingNaN
= floatx80_is_signaling_nan(b
, status
);
1086 if (aIsSignalingNaN
| bIsSignalingNaN
) {
1087 float_raise(float_flag_invalid
, status
);
1090 if (status
->default_nan_mode
) {
1091 return floatx80_default_nan(status
);
1094 if (a
.low
< b
.low
) {
1095 aIsLargerSignificand
= 0;
1096 } else if (b
.low
< a
.low
) {
1097 aIsLargerSignificand
= 1;
1099 aIsLargerSignificand
= (a
.high
< b
.high
) ? 1 : 0;
1102 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
1103 aIsLargerSignificand
)) {
1104 return floatx80_maybe_silence_nan(b
, status
);
1106 return floatx80_maybe_silence_nan(a
, status
);
1110 /*----------------------------------------------------------------------------
1111 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1112 | NaN; otherwise returns 0.
1113 *----------------------------------------------------------------------------*/
1115 int float128_is_quiet_nan(float128 a
, float_status
*status
)
1117 #ifdef NO_SIGNALING_NANS
1118 return float128_is_any_nan(a
);
1120 if (status
->snan_bit_is_one
) {
1121 return (((a
.high
>> 47) & 0xFFFF) == 0xFFFE)
1122 && (a
.low
|| (a
.high
& 0x00007FFFFFFFFFFFULL
));
1124 return ((a
.high
<< 1) >= 0xFFFF000000000000ULL
)
1125 && (a
.low
|| (a
.high
& 0x0000FFFFFFFFFFFFULL
));
1130 /*----------------------------------------------------------------------------
1131 | Returns 1 if the quadruple-precision floating-point value `a' is a
1132 | signaling NaN; otherwise returns 0.
1133 *----------------------------------------------------------------------------*/
1135 int float128_is_signaling_nan(float128 a
, float_status
*status
)
1137 #ifdef NO_SIGNALING_NANS
1140 if (status
->snan_bit_is_one
) {
1141 return ((a
.high
<< 1) >= 0xFFFF000000000000ULL
)
1142 && (a
.low
|| (a
.high
& 0x0000FFFFFFFFFFFFULL
));
1144 return (((a
.high
>> 47) & 0xFFFF) == 0xFFFE)
1145 && (a
.low
|| (a
.high
& LIT64(0x00007FFFFFFFFFFF)));
1150 /*----------------------------------------------------------------------------
1151 | Returns a quiet NaN from a signalling NaN for the quadruple-precision
1152 | floating point value `a'.
1153 *----------------------------------------------------------------------------*/
1155 float128
float128_silence_nan(float128 a
, float_status
*status
)
1157 #ifdef NO_SIGNALING_NANS
1158 g_assert_not_reached();
1160 if (status
->snan_bit_is_one
) {
1161 return float128_default_nan(status
);
1163 a
.high
|= LIT64(0x0000800000000000);
1169 /*----------------------------------------------------------------------------
1170 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1171 | a signaling NaN; otherwise returns `a'.
1172 *----------------------------------------------------------------------------*/
1174 float128
float128_maybe_silence_nan(float128 a
, float_status
*status
)
1176 if (float128_is_signaling_nan(a
, status
)) {
1177 return float128_silence_nan(a
, status
);
1182 /*----------------------------------------------------------------------------
1183 | Returns the result of converting the quadruple-precision floating-point NaN
1184 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
1185 | exception is raised.
1186 *----------------------------------------------------------------------------*/
1188 static commonNaNT
float128ToCommonNaN(float128 a
, float_status
*status
)
1192 if (float128_is_signaling_nan(a
, status
)) {
1193 float_raise(float_flag_invalid
, status
);
1195 z
.sign
= a
.high
>> 63;
1196 shortShift128Left(a
.high
, a
.low
, 16, &z
.high
, &z
.low
);
1200 /*----------------------------------------------------------------------------
1201 | Returns the result of converting the canonical NaN `a' to the quadruple-
1202 | precision floating-point format.
1203 *----------------------------------------------------------------------------*/
1205 static float128
commonNaNToFloat128(commonNaNT a
, float_status
*status
)
1209 if (status
->default_nan_mode
) {
1210 return float128_default_nan(status
);
1213 shift128Right(a
.high
, a
.low
, 16, &z
.high
, &z
.low
);
1214 z
.high
|= (((uint64_t)a
.sign
) << 63) | LIT64(0x7FFF000000000000);
1218 /*----------------------------------------------------------------------------
1219 | Takes two quadruple-precision floating-point values `a' and `b', one of
1220 | which is a NaN, and returns the appropriate NaN result. If either `a' or
1221 | `b' is a signaling NaN, the invalid exception is raised.
1222 *----------------------------------------------------------------------------*/
1224 static float128
propagateFloat128NaN(float128 a
, float128 b
,
1225 float_status
*status
)
1227 flag aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
;
1228 flag aIsLargerSignificand
;
1230 aIsQuietNaN
= float128_is_quiet_nan(a
, status
);
1231 aIsSignalingNaN
= float128_is_signaling_nan(a
, status
);
1232 bIsQuietNaN
= float128_is_quiet_nan(b
, status
);
1233 bIsSignalingNaN
= float128_is_signaling_nan(b
, status
);
1235 if (aIsSignalingNaN
| bIsSignalingNaN
) {
1236 float_raise(float_flag_invalid
, status
);
1239 if (status
->default_nan_mode
) {
1240 return float128_default_nan(status
);
1243 if (lt128(a
.high
<< 1, a
.low
, b
.high
<< 1, b
.low
)) {
1244 aIsLargerSignificand
= 0;
1245 } else if (lt128(b
.high
<< 1, b
.low
, a
.high
<< 1, a
.low
)) {
1246 aIsLargerSignificand
= 1;
1248 aIsLargerSignificand
= (a
.high
< b
.high
) ? 1 : 0;
1251 if (pickNaN(aIsQuietNaN
, aIsSignalingNaN
, bIsQuietNaN
, bIsSignalingNaN
,
1252 aIsLargerSignificand
)) {
1253 return float128_maybe_silence_nan(b
, status
);
1255 return float128_maybe_silence_nan(a
, status
);