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PC speaker emulation (Joachim Henke)
[mirror_qemu.git] / gdbstub.c
1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #ifdef CONFIG_USER_ONLY
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <stdarg.h>
24 #include <string.h>
25 #include <errno.h>
26 #include <unistd.h>
27
28 #include "qemu.h"
29 #else
30 #include "vl.h"
31 #endif
32
33 #include <sys/socket.h>
34 #include <netinet/in.h>
35 #include <netinet/tcp.h>
36 #include <signal.h>
37
38 //#define DEBUG_GDB
39
40 enum RSState {
41 RS_IDLE,
42 RS_GETLINE,
43 RS_CHKSUM1,
44 RS_CHKSUM2,
45 };
46 /* XXX: This is not thread safe. Do we care? */
47 static int gdbserver_fd = -1;
48
49 typedef struct GDBState {
50 CPUState *env; /* current CPU */
51 enum RSState state; /* parsing state */
52 int fd;
53 char line_buf[4096];
54 int line_buf_index;
55 int line_csum;
56 #ifdef CONFIG_USER_ONLY
57 int running_state;
58 #endif
59 } GDBState;
60
61 #ifdef CONFIG_USER_ONLY
62 /* XXX: remove this hack. */
63 static GDBState gdbserver_state;
64 #endif
65
66 static int get_char(GDBState *s)
67 {
68 uint8_t ch;
69 int ret;
70
71 for(;;) {
72 ret = read(s->fd, &ch, 1);
73 if (ret < 0) {
74 if (errno != EINTR && errno != EAGAIN)
75 return -1;
76 } else if (ret == 0) {
77 return -1;
78 } else {
79 break;
80 }
81 }
82 return ch;
83 }
84
85 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
86 {
87 int ret;
88
89 while (len > 0) {
90 ret = write(s->fd, buf, len);
91 if (ret < 0) {
92 if (errno != EINTR && errno != EAGAIN)
93 return;
94 } else {
95 buf += ret;
96 len -= ret;
97 }
98 }
99 }
100
101 static inline int fromhex(int v)
102 {
103 if (v >= '0' && v <= '9')
104 return v - '0';
105 else if (v >= 'A' && v <= 'F')
106 return v - 'A' + 10;
107 else if (v >= 'a' && v <= 'f')
108 return v - 'a' + 10;
109 else
110 return 0;
111 }
112
113 static inline int tohex(int v)
114 {
115 if (v < 10)
116 return v + '0';
117 else
118 return v - 10 + 'a';
119 }
120
121 static void memtohex(char *buf, const uint8_t *mem, int len)
122 {
123 int i, c;
124 char *q;
125 q = buf;
126 for(i = 0; i < len; i++) {
127 c = mem[i];
128 *q++ = tohex(c >> 4);
129 *q++ = tohex(c & 0xf);
130 }
131 *q = '\0';
132 }
133
134 static void hextomem(uint8_t *mem, const char *buf, int len)
135 {
136 int i;
137
138 for(i = 0; i < len; i++) {
139 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
140 buf += 2;
141 }
142 }
143
144 /* return -1 if error, 0 if OK */
145 static int put_packet(GDBState *s, char *buf)
146 {
147 char buf1[3];
148 int len, csum, ch, i;
149
150 #ifdef DEBUG_GDB
151 printf("reply='%s'\n", buf);
152 #endif
153
154 for(;;) {
155 buf1[0] = '$';
156 put_buffer(s, buf1, 1);
157 len = strlen(buf);
158 put_buffer(s, buf, len);
159 csum = 0;
160 for(i = 0; i < len; i++) {
161 csum += buf[i];
162 }
163 buf1[0] = '#';
164 buf1[1] = tohex((csum >> 4) & 0xf);
165 buf1[2] = tohex((csum) & 0xf);
166
167 put_buffer(s, buf1, 3);
168
169 ch = get_char(s);
170 if (ch < 0)
171 return -1;
172 if (ch == '+')
173 break;
174 }
175 return 0;
176 }
177
178 #if defined(TARGET_I386)
179
180 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
181 {
182 uint32_t *registers = (uint32_t *)mem_buf;
183 int i, fpus;
184
185 for(i = 0; i < 8; i++) {
186 registers[i] = env->regs[i];
187 }
188 registers[8] = env->eip;
189 registers[9] = env->eflags;
190 registers[10] = env->segs[R_CS].selector;
191 registers[11] = env->segs[R_SS].selector;
192 registers[12] = env->segs[R_DS].selector;
193 registers[13] = env->segs[R_ES].selector;
194 registers[14] = env->segs[R_FS].selector;
195 registers[15] = env->segs[R_GS].selector;
196 /* XXX: convert floats */
197 for(i = 0; i < 8; i++) {
198 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
199 }
200 registers[36] = env->fpuc;
201 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
202 registers[37] = fpus;
203 registers[38] = 0; /* XXX: convert tags */
204 registers[39] = 0; /* fiseg */
205 registers[40] = 0; /* fioff */
206 registers[41] = 0; /* foseg */
207 registers[42] = 0; /* fooff */
208 registers[43] = 0; /* fop */
209
210 for(i = 0; i < 16; i++)
211 tswapls(&registers[i]);
212 for(i = 36; i < 44; i++)
213 tswapls(&registers[i]);
214 return 44 * 4;
215 }
216
217 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
218 {
219 uint32_t *registers = (uint32_t *)mem_buf;
220 int i;
221
222 for(i = 0; i < 8; i++) {
223 env->regs[i] = tswapl(registers[i]);
224 }
225 env->eip = tswapl(registers[8]);
226 env->eflags = tswapl(registers[9]);
227 #if defined(CONFIG_USER_ONLY)
228 #define LOAD_SEG(index, sreg)\
229 if (tswapl(registers[index]) != env->segs[sreg].selector)\
230 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
231 LOAD_SEG(10, R_CS);
232 LOAD_SEG(11, R_SS);
233 LOAD_SEG(12, R_DS);
234 LOAD_SEG(13, R_ES);
235 LOAD_SEG(14, R_FS);
236 LOAD_SEG(15, R_GS);
237 #endif
238 }
239
240 #elif defined (TARGET_PPC)
241 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
242 {
243 uint32_t *registers = (uint32_t *)mem_buf, tmp;
244 int i;
245
246 /* fill in gprs */
247 for(i = 0; i < 32; i++) {
248 registers[i] = tswapl(env->gpr[i]);
249 }
250 /* fill in fprs */
251 for (i = 0; i < 32; i++) {
252 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
253 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
254 }
255 /* nip, msr, ccr, lnk, ctr, xer, mq */
256 registers[96] = tswapl(env->nip);
257 registers[97] = tswapl(do_load_msr(env));
258 tmp = 0;
259 for (i = 0; i < 8; i++)
260 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
261 registers[98] = tswapl(tmp);
262 registers[99] = tswapl(env->lr);
263 registers[100] = tswapl(env->ctr);
264 registers[101] = tswapl(do_load_xer(env));
265 registers[102] = 0;
266
267 return 103 * 4;
268 }
269
270 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
271 {
272 uint32_t *registers = (uint32_t *)mem_buf;
273 int i;
274
275 /* fill in gprs */
276 for (i = 0; i < 32; i++) {
277 env->gpr[i] = tswapl(registers[i]);
278 }
279 /* fill in fprs */
280 for (i = 0; i < 32; i++) {
281 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
282 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
283 }
284 /* nip, msr, ccr, lnk, ctr, xer, mq */
285 env->nip = tswapl(registers[96]);
286 do_store_msr(env, tswapl(registers[97]));
287 registers[98] = tswapl(registers[98]);
288 for (i = 0; i < 8; i++)
289 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
290 env->lr = tswapl(registers[99]);
291 env->ctr = tswapl(registers[100]);
292 do_store_xer(env, tswapl(registers[101]));
293 }
294 #elif defined (TARGET_SPARC)
295 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
296 {
297 target_ulong *registers = (target_ulong *)mem_buf;
298 int i;
299
300 /* fill in g0..g7 */
301 for(i = 0; i < 8; i++) {
302 registers[i] = tswapl(env->gregs[i]);
303 }
304 /* fill in register window */
305 for(i = 0; i < 24; i++) {
306 registers[i + 8] = tswapl(env->regwptr[i]);
307 }
308 /* fill in fprs */
309 for (i = 0; i < 32; i++) {
310 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
311 }
312 #ifndef TARGET_SPARC64
313 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
314 registers[64] = tswapl(env->y);
315 {
316 target_ulong tmp;
317
318 tmp = GET_PSR(env);
319 registers[65] = tswapl(tmp);
320 }
321 registers[66] = tswapl(env->wim);
322 registers[67] = tswapl(env->tbr);
323 registers[68] = tswapl(env->pc);
324 registers[69] = tswapl(env->npc);
325 registers[70] = tswapl(env->fsr);
326 registers[71] = 0; /* csr */
327 registers[72] = 0;
328 return 73 * sizeof(target_ulong);
329 #else
330 for (i = 0; i < 32; i += 2) {
331 registers[i/2 + 64] = tswapl(*((uint64_t *)&env->fpr[i]));
332 }
333 registers[81] = tswapl(env->pc);
334 registers[82] = tswapl(env->npc);
335 registers[83] = tswapl(env->tstate[env->tl]);
336 registers[84] = tswapl(env->fsr);
337 registers[85] = tswapl(env->fprs);
338 registers[86] = tswapl(env->y);
339 return 87 * sizeof(target_ulong);
340 #endif
341 }
342
343 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
344 {
345 target_ulong *registers = (target_ulong *)mem_buf;
346 int i;
347
348 /* fill in g0..g7 */
349 for(i = 0; i < 7; i++) {
350 env->gregs[i] = tswapl(registers[i]);
351 }
352 /* fill in register window */
353 for(i = 0; i < 24; i++) {
354 env->regwptr[i] = tswapl(registers[i + 8]);
355 }
356 /* fill in fprs */
357 for (i = 0; i < 32; i++) {
358 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
359 }
360 #ifndef TARGET_SPARC64
361 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
362 env->y = tswapl(registers[64]);
363 PUT_PSR(env, tswapl(registers[65]));
364 env->wim = tswapl(registers[66]);
365 env->tbr = tswapl(registers[67]);
366 env->pc = tswapl(registers[68]);
367 env->npc = tswapl(registers[69]);
368 env->fsr = tswapl(registers[70]);
369 #else
370 for (i = 0; i < 32; i += 2) {
371 uint64_t tmp;
372 tmp = tswapl(registers[i/2 + 64]) << 32;
373 tmp |= tswapl(registers[i/2 + 64 + 1]);
374 *((uint64_t *)&env->fpr[i]) = tmp;
375 }
376 env->pc = tswapl(registers[81]);
377 env->npc = tswapl(registers[82]);
378 env->tstate[env->tl] = tswapl(registers[83]);
379 env->fsr = tswapl(registers[84]);
380 env->fprs = tswapl(registers[85]);
381 env->y = tswapl(registers[86]);
382 #endif
383 }
384 #elif defined (TARGET_ARM)
385 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
386 {
387 int i;
388 uint8_t *ptr;
389
390 ptr = mem_buf;
391 /* 16 core integer registers (4 bytes each). */
392 for (i = 0; i < 16; i++)
393 {
394 *(uint32_t *)ptr = tswapl(env->regs[i]);
395 ptr += 4;
396 }
397 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
398 Not yet implemented. */
399 memset (ptr, 0, 8 * 12 + 4);
400 ptr += 8 * 12 + 4;
401 /* CPSR (4 bytes). */
402 *(uint32_t *)ptr = tswapl (cpsr_read(env));
403 ptr += 4;
404
405 return ptr - mem_buf;
406 }
407
408 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
409 {
410 int i;
411 uint8_t *ptr;
412
413 ptr = mem_buf;
414 /* Core integer registers. */
415 for (i = 0; i < 16; i++)
416 {
417 env->regs[i] = tswapl(*(uint32_t *)ptr);
418 ptr += 4;
419 }
420 /* Ignore FPA regs and scr. */
421 ptr += 8 * 12 + 4;
422 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
423 }
424 #elif defined (TARGET_MIPS)
425 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
426 {
427 int i;
428 uint8_t *ptr;
429
430 ptr = mem_buf;
431 for (i = 0; i < 32; i++)
432 {
433 *(uint32_t *)ptr = tswapl(env->gpr[i]);
434 ptr += 4;
435 }
436
437 *(uint32_t *)ptr = tswapl(env->CP0_Status);
438 ptr += 4;
439
440 *(uint32_t *)ptr = tswapl(env->LO);
441 ptr += 4;
442
443 *(uint32_t *)ptr = tswapl(env->HI);
444 ptr += 4;
445
446 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
447 ptr += 4;
448
449 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
450 ptr += 4;
451
452 *(uint32_t *)ptr = tswapl(env->PC);
453 ptr += 4;
454
455 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
456
457 return ptr - mem_buf;
458 }
459
460 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
461 {
462 int i;
463 uint8_t *ptr;
464
465 ptr = mem_buf;
466 for (i = 0; i < 32; i++)
467 {
468 env->gpr[i] = tswapl(*(uint32_t *)ptr);
469 ptr += 4;
470 }
471
472 env->CP0_Status = tswapl(*(uint32_t *)ptr);
473 ptr += 4;
474
475 env->LO = tswapl(*(uint32_t *)ptr);
476 ptr += 4;
477
478 env->HI = tswapl(*(uint32_t *)ptr);
479 ptr += 4;
480
481 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
482 ptr += 4;
483
484 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
485 ptr += 4;
486
487 env->PC = tswapl(*(uint32_t *)ptr);
488 ptr += 4;
489 }
490 #else
491 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
492 {
493 return 0;
494 }
495
496 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
497 {
498 }
499
500 #endif
501
502 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
503 {
504 const char *p;
505 int ch, reg_size, type;
506 char buf[4096];
507 uint8_t mem_buf[2000];
508 uint32_t *registers;
509 uint32_t addr, len;
510
511 #ifdef DEBUG_GDB
512 printf("command='%s'\n", line_buf);
513 #endif
514 p = line_buf;
515 ch = *p++;
516 switch(ch) {
517 case '?':
518 /* TODO: Make this return the correct value for user-mode. */
519 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
520 put_packet(s, buf);
521 break;
522 case 'c':
523 if (*p != '\0') {
524 addr = strtoul(p, (char **)&p, 16);
525 #if defined(TARGET_I386)
526 env->eip = addr;
527 #elif defined (TARGET_PPC)
528 env->nip = addr;
529 #elif defined (TARGET_SPARC)
530 env->pc = addr;
531 env->npc = addr + 4;
532 #elif defined (TARGET_ARM)
533 env->regs[15] = addr;
534 #endif
535 }
536 #ifdef CONFIG_USER_ONLY
537 s->running_state = 1;
538 #else
539 vm_start();
540 #endif
541 return RS_IDLE;
542 case 's':
543 if (*p != '\0') {
544 addr = strtoul(p, (char **)&p, 16);
545 #if defined(TARGET_I386)
546 env->eip = addr;
547 #elif defined (TARGET_PPC)
548 env->nip = addr;
549 #elif defined (TARGET_SPARC)
550 env->pc = addr;
551 env->npc = addr + 4;
552 #elif defined (TARGET_ARM)
553 env->regs[15] = addr;
554 #endif
555 }
556 cpu_single_step(env, 1);
557 #ifdef CONFIG_USER_ONLY
558 s->running_state = 1;
559 #else
560 vm_start();
561 #endif
562 return RS_IDLE;
563 case 'g':
564 reg_size = cpu_gdb_read_registers(env, mem_buf);
565 memtohex(buf, mem_buf, reg_size);
566 put_packet(s, buf);
567 break;
568 case 'G':
569 registers = (void *)mem_buf;
570 len = strlen(p) / 2;
571 hextomem((uint8_t *)registers, p, len);
572 cpu_gdb_write_registers(env, mem_buf, len);
573 put_packet(s, "OK");
574 break;
575 case 'm':
576 addr = strtoul(p, (char **)&p, 16);
577 if (*p == ',')
578 p++;
579 len = strtoul(p, NULL, 16);
580 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
581 put_packet (s, "E14");
582 } else {
583 memtohex(buf, mem_buf, len);
584 put_packet(s, buf);
585 }
586 break;
587 case 'M':
588 addr = strtoul(p, (char **)&p, 16);
589 if (*p == ',')
590 p++;
591 len = strtoul(p, (char **)&p, 16);
592 if (*p == ':')
593 p++;
594 hextomem(mem_buf, p, len);
595 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
596 put_packet(s, "E14");
597 else
598 put_packet(s, "OK");
599 break;
600 case 'Z':
601 type = strtoul(p, (char **)&p, 16);
602 if (*p == ',')
603 p++;
604 addr = strtoul(p, (char **)&p, 16);
605 if (*p == ',')
606 p++;
607 len = strtoul(p, (char **)&p, 16);
608 if (type == 0 || type == 1) {
609 if (cpu_breakpoint_insert(env, addr) < 0)
610 goto breakpoint_error;
611 put_packet(s, "OK");
612 } else {
613 breakpoint_error:
614 put_packet(s, "E22");
615 }
616 break;
617 case 'z':
618 type = strtoul(p, (char **)&p, 16);
619 if (*p == ',')
620 p++;
621 addr = strtoul(p, (char **)&p, 16);
622 if (*p == ',')
623 p++;
624 len = strtoul(p, (char **)&p, 16);
625 if (type == 0 || type == 1) {
626 cpu_breakpoint_remove(env, addr);
627 put_packet(s, "OK");
628 } else {
629 goto breakpoint_error;
630 }
631 break;
632 default:
633 // unknown_command:
634 /* put empty packet */
635 buf[0] = '\0';
636 put_packet(s, buf);
637 break;
638 }
639 return RS_IDLE;
640 }
641
642 extern void tb_flush(CPUState *env);
643
644 #ifndef CONFIG_USER_ONLY
645 static void gdb_vm_stopped(void *opaque, int reason)
646 {
647 GDBState *s = opaque;
648 char buf[256];
649 int ret;
650
651 /* disable single step if it was enable */
652 cpu_single_step(s->env, 0);
653
654 if (reason == EXCP_DEBUG) {
655 tb_flush(s->env);
656 ret = SIGTRAP;
657 } else if (reason == EXCP_INTERRUPT) {
658 ret = SIGINT;
659 } else {
660 ret = 0;
661 }
662 snprintf(buf, sizeof(buf), "S%02x", ret);
663 put_packet(s, buf);
664 }
665 #endif
666
667 static void gdb_read_byte(GDBState *s, int ch)
668 {
669 CPUState *env = s->env;
670 int i, csum;
671 char reply[1];
672
673 #ifndef CONFIG_USER_ONLY
674 if (vm_running) {
675 /* when the CPU is running, we cannot do anything except stop
676 it when receiving a char */
677 vm_stop(EXCP_INTERRUPT);
678 } else
679 #endif
680 {
681 switch(s->state) {
682 case RS_IDLE:
683 if (ch == '$') {
684 s->line_buf_index = 0;
685 s->state = RS_GETLINE;
686 }
687 break;
688 case RS_GETLINE:
689 if (ch == '#') {
690 s->state = RS_CHKSUM1;
691 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
692 s->state = RS_IDLE;
693 } else {
694 s->line_buf[s->line_buf_index++] = ch;
695 }
696 break;
697 case RS_CHKSUM1:
698 s->line_buf[s->line_buf_index] = '\0';
699 s->line_csum = fromhex(ch) << 4;
700 s->state = RS_CHKSUM2;
701 break;
702 case RS_CHKSUM2:
703 s->line_csum |= fromhex(ch);
704 csum = 0;
705 for(i = 0; i < s->line_buf_index; i++) {
706 csum += s->line_buf[i];
707 }
708 if (s->line_csum != (csum & 0xff)) {
709 reply[0] = '-';
710 put_buffer(s, reply, 1);
711 s->state = RS_IDLE;
712 } else {
713 reply[0] = '+';
714 put_buffer(s, reply, 1);
715 s->state = gdb_handle_packet(s, env, s->line_buf);
716 }
717 break;
718 }
719 }
720 }
721
722 #ifdef CONFIG_USER_ONLY
723 int
724 gdb_handlesig (CPUState *env, int sig)
725 {
726 GDBState *s;
727 char buf[256];
728 int n;
729
730 if (gdbserver_fd < 0)
731 return sig;
732
733 s = &gdbserver_state;
734
735 /* disable single step if it was enabled */
736 cpu_single_step(env, 0);
737 tb_flush(env);
738
739 if (sig != 0)
740 {
741 snprintf(buf, sizeof(buf), "S%02x", sig);
742 put_packet(s, buf);
743 }
744
745 sig = 0;
746 s->state = RS_IDLE;
747 s->running_state = 0;
748 while (s->running_state == 0) {
749 n = read (s->fd, buf, 256);
750 if (n > 0)
751 {
752 int i;
753
754 for (i = 0; i < n; i++)
755 gdb_read_byte (s, buf[i]);
756 }
757 else if (n == 0 || errno != EAGAIN)
758 {
759 /* XXX: Connection closed. Should probably wait for annother
760 connection before continuing. */
761 return sig;
762 }
763 }
764 return sig;
765 }
766
767 /* Tell the remote gdb that the process has exited. */
768 void gdb_exit(CPUState *env, int code)
769 {
770 GDBState *s;
771 char buf[4];
772
773 if (gdbserver_fd < 0)
774 return;
775
776 s = &gdbserver_state;
777
778 snprintf(buf, sizeof(buf), "W%02x", code);
779 put_packet(s, buf);
780 }
781
782 #else
783 static void gdb_read(void *opaque)
784 {
785 GDBState *s = opaque;
786 int i, size;
787 uint8_t buf[4096];
788
789 size = read(s->fd, buf, sizeof(buf));
790 if (size < 0)
791 return;
792 if (size == 0) {
793 /* end of connection */
794 qemu_del_vm_stop_handler(gdb_vm_stopped, s);
795 qemu_set_fd_handler(s->fd, NULL, NULL, NULL);
796 qemu_free(s);
797 vm_start();
798 } else {
799 for(i = 0; i < size; i++)
800 gdb_read_byte(s, buf[i]);
801 }
802 }
803
804 #endif
805
806 static void gdb_accept(void *opaque)
807 {
808 GDBState *s;
809 struct sockaddr_in sockaddr;
810 socklen_t len;
811 int val, fd;
812
813 for(;;) {
814 len = sizeof(sockaddr);
815 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
816 if (fd < 0 && errno != EINTR) {
817 perror("accept");
818 return;
819 } else if (fd >= 0) {
820 break;
821 }
822 }
823
824 /* set short latency */
825 val = 1;
826 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, &val, sizeof(val));
827
828 #ifdef CONFIG_USER_ONLY
829 s = &gdbserver_state;
830 memset (s, 0, sizeof (GDBState));
831 #else
832 s = qemu_mallocz(sizeof(GDBState));
833 if (!s) {
834 close(fd);
835 return;
836 }
837 #endif
838 s->env = first_cpu; /* XXX: allow to change CPU */
839 s->fd = fd;
840
841 fcntl(fd, F_SETFL, O_NONBLOCK);
842
843 #ifndef CONFIG_USER_ONLY
844 /* stop the VM */
845 vm_stop(EXCP_INTERRUPT);
846
847 /* start handling I/O */
848 qemu_set_fd_handler(s->fd, gdb_read, NULL, s);
849 /* when the VM is stopped, the following callback is called */
850 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
851 #endif
852 }
853
854 static int gdbserver_open(int port)
855 {
856 struct sockaddr_in sockaddr;
857 int fd, val, ret;
858
859 fd = socket(PF_INET, SOCK_STREAM, 0);
860 if (fd < 0) {
861 perror("socket");
862 return -1;
863 }
864
865 /* allow fast reuse */
866 val = 1;
867 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val));
868
869 sockaddr.sin_family = AF_INET;
870 sockaddr.sin_port = htons(port);
871 sockaddr.sin_addr.s_addr = 0;
872 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
873 if (ret < 0) {
874 perror("bind");
875 return -1;
876 }
877 ret = listen(fd, 0);
878 if (ret < 0) {
879 perror("listen");
880 return -1;
881 }
882 #ifndef CONFIG_USER_ONLY
883 fcntl(fd, F_SETFL, O_NONBLOCK);
884 #endif
885 return fd;
886 }
887
888 int gdbserver_start(int port)
889 {
890 gdbserver_fd = gdbserver_open(port);
891 if (gdbserver_fd < 0)
892 return -1;
893 /* accept connections */
894 #ifdef CONFIG_USER_ONLY
895 gdb_accept (NULL);
896 #else
897 qemu_set_fd_handler(gdbserver_fd, gdb_accept, NULL, NULL);
898 #endif
899 return 0;
900 }