gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "config.h"
  20 #include "qemu-common.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "monitor/monitor.h"
  33 #include "sysemu/char.h"
  34 #include "sysemu/sysemu.h"
  35 #include "exec/gdbstub.h"
  36 #endif
  37
  38 #define MAX_PACKET_LENGTH 4096
  39
  40 #include "cpu.h"
  41 #include "qemu/sockets.h"
  42 #include "sysemu/kvm.h"
  43 #include "qemu/bitops.h"
  44
  45 static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr,
  46                                          uint8_t *buf, int len, bool is_write)
  47 {
  48     CPUClass *cc = CPU_GET_CLASS(cpu);
  49
  50     if (cc->memory_rw_debug) {
  51         return cc->memory_rw_debug(cpu, addr, buf, len, is_write);
  52     }
  53     return cpu_memory_rw_debug(cpu, addr, buf, len, is_write);
  54 }
  55
  56 enum {
  57     GDB_SIGNAL_0 = 0,
  58     GDB_SIGNAL_INT = 2,
  59     GDB_SIGNAL_QUIT = 3,
  60     GDB_SIGNAL_TRAP = 5,
  61     GDB_SIGNAL_ABRT = 6,
  62     GDB_SIGNAL_ALRM = 14,
  63     GDB_SIGNAL_IO = 23,
  64     GDB_SIGNAL_XCPU = 24,
  65     GDB_SIGNAL_UNKNOWN = 143
  66 };
  67
  68 #ifdef CONFIG_USER_ONLY
  69
  70 /* Map target signal numbers to GDB protocol signal numbers and vice
  71  * versa.  For user emulation's currently supported systems, we can
  72  * assume most signals are defined.
  73  */
  74
  75 static int gdb_signal_table[] = {
  76     0,
  77     TARGET_SIGHUP,
  78     TARGET_SIGINT,
  79     TARGET_SIGQUIT,
  80     TARGET_SIGILL,
  81     TARGET_SIGTRAP,
  82     TARGET_SIGABRT,
  83     -1, /* SIGEMT */
  84     TARGET_SIGFPE,
  85     TARGET_SIGKILL,
  86     TARGET_SIGBUS,
  87     TARGET_SIGSEGV,
  88     TARGET_SIGSYS,
  89     TARGET_SIGPIPE,
  90     TARGET_SIGALRM,
  91     TARGET_SIGTERM,
  92     TARGET_SIGURG,
  93     TARGET_SIGSTOP,
  94     TARGET_SIGTSTP,
  95     TARGET_SIGCONT,
  96     TARGET_SIGCHLD,
  97     TARGET_SIGTTIN,
  98     TARGET_SIGTTOU,
  99     TARGET_SIGIO,
 100     TARGET_SIGXCPU,
 101     TARGET_SIGXFSZ,
 102     TARGET_SIGVTALRM,
 103     TARGET_SIGPROF,
 104     TARGET_SIGWINCH,
 105     -1, /* SIGLOST */
 106     TARGET_SIGUSR1,
 107     TARGET_SIGUSR2,
 108 #ifdef TARGET_SIGPWR
 109     TARGET_SIGPWR,
 110 #else
 111     -1,
 112 #endif
 113     -1, /* SIGPOLL */
 114     -1,
 115     -1,
 116     -1,
 117     -1,
 118     -1,
 119     -1,
 120     -1,
 121     -1,
 122     -1,
 123     -1,
 124     -1,
 125 #ifdef __SIGRTMIN
 126     __SIGRTMIN + 1,
 127     __SIGRTMIN + 2,
 128     __SIGRTMIN + 3,
 129     __SIGRTMIN + 4,
 130     __SIGRTMIN + 5,
 131     __SIGRTMIN + 6,
 132     __SIGRTMIN + 7,
 133     __SIGRTMIN + 8,
 134     __SIGRTMIN + 9,
 135     __SIGRTMIN + 10,
 136     __SIGRTMIN + 11,
 137     __SIGRTMIN + 12,
 138     __SIGRTMIN + 13,
 139     __SIGRTMIN + 14,
 140     __SIGRTMIN + 15,
 141     __SIGRTMIN + 16,
 142     __SIGRTMIN + 17,
 143     __SIGRTMIN + 18,
 144     __SIGRTMIN + 19,
 145     __SIGRTMIN + 20,
 146     __SIGRTMIN + 21,
 147     __SIGRTMIN + 22,
 148     __SIGRTMIN + 23,
 149     __SIGRTMIN + 24,
 150     __SIGRTMIN + 25,
 151     __SIGRTMIN + 26,
 152     __SIGRTMIN + 27,
 153     __SIGRTMIN + 28,
 154     __SIGRTMIN + 29,
 155     __SIGRTMIN + 30,
 156     __SIGRTMIN + 31,
 157     -1, /* SIGCANCEL */
 158     __SIGRTMIN,
 159     __SIGRTMIN + 32,
 160     __SIGRTMIN + 33,
 161     __SIGRTMIN + 34,
 162     __SIGRTMIN + 35,
 163     __SIGRTMIN + 36,
 164     __SIGRTMIN + 37,
 165     __SIGRTMIN + 38,
 166     __SIGRTMIN + 39,
 167     __SIGRTMIN + 40,
 168     __SIGRTMIN + 41,
 169     __SIGRTMIN + 42,
 170     __SIGRTMIN + 43,
 171     __SIGRTMIN + 44,
 172     __SIGRTMIN + 45,
 173     __SIGRTMIN + 46,
 174     __SIGRTMIN + 47,
 175     __SIGRTMIN + 48,
 176     __SIGRTMIN + 49,
 177     __SIGRTMIN + 50,
 178     __SIGRTMIN + 51,
 179     __SIGRTMIN + 52,
 180     __SIGRTMIN + 53,
 181     __SIGRTMIN + 54,
 182     __SIGRTMIN + 55,
 183     __SIGRTMIN + 56,
 184     __SIGRTMIN + 57,
 185     __SIGRTMIN + 58,
 186     __SIGRTMIN + 59,
 187     __SIGRTMIN + 60,
 188     __SIGRTMIN + 61,
 189     __SIGRTMIN + 62,
 190     __SIGRTMIN + 63,
 191     __SIGRTMIN + 64,
 192     __SIGRTMIN + 65,
 193     __SIGRTMIN + 66,
 194     __SIGRTMIN + 67,
 195     __SIGRTMIN + 68,
 196     __SIGRTMIN + 69,
 197     __SIGRTMIN + 70,
 198     __SIGRTMIN + 71,
 199     __SIGRTMIN + 72,
 200     __SIGRTMIN + 73,
 201     __SIGRTMIN + 74,
 202     __SIGRTMIN + 75,
 203     __SIGRTMIN + 76,
 204     __SIGRTMIN + 77,
 205     __SIGRTMIN + 78,
 206     __SIGRTMIN + 79,
 207     __SIGRTMIN + 80,
 208     __SIGRTMIN + 81,
 209     __SIGRTMIN + 82,
 210     __SIGRTMIN + 83,
 211     __SIGRTMIN + 84,
 212     __SIGRTMIN + 85,
 213     __SIGRTMIN + 86,
 214     __SIGRTMIN + 87,
 215     __SIGRTMIN + 88,
 216     __SIGRTMIN + 89,
 217     __SIGRTMIN + 90,
 218     __SIGRTMIN + 91,
 219     __SIGRTMIN + 92,
 220     __SIGRTMIN + 93,
 221     __SIGRTMIN + 94,
 222     __SIGRTMIN + 95,
 223     -1, /* SIGINFO */
 224     -1, /* UNKNOWN */
 225     -1, /* DEFAULT */
 226     -1,
 227     -1,
 228     -1,
 229     -1,
 230     -1,
 231     -1
 232 #endif
 233 };
 234 #else
 235 /* In system mode we only need SIGINT and SIGTRAP; other signals
 236    are not yet supported.  */
 237
 238 enum {
 239     TARGET_SIGINT = 2,
 240     TARGET_SIGTRAP = 5
 241 };
 242
 243 static int gdb_signal_table[] = {
 244     -1,
 245     -1,
 246     TARGET_SIGINT,
 247     -1,
 248     -1,
 249     TARGET_SIGTRAP
 250 };
 251 #endif
 252
 253 #ifdef CONFIG_USER_ONLY
 254 static int target_signal_to_gdb (int sig)
 255 {
 256     int i;
 257     for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
 258         if (gdb_signal_table[i] == sig)
 259             return i;
 260     return GDB_SIGNAL_UNKNOWN;
 261 }
 262 #endif
 263
 264 static int gdb_signal_to_target (int sig)
 265 {
 266     if (sig < ARRAY_SIZE (gdb_signal_table))
 267         return gdb_signal_table[sig];
 268     else
 269         return -1;
 270 }
 271
 272 //#define DEBUG_GDB
 273
 274 typedef struct GDBRegisterState {
 275     int base_reg;
 276     int num_regs;
 277     gdb_reg_cb get_reg;
 278     gdb_reg_cb set_reg;
 279     const char *xml;
 280     struct GDBRegisterState *next;
 281 } GDBRegisterState;
 282
 283 enum RSState {
 284     RS_INACTIVE,
 285     RS_IDLE,
 286     RS_GETLINE,
 287     RS_CHKSUM1,
 288     RS_CHKSUM2,
 289 };
 290 typedef struct GDBState {
 291     CPUState *c_cpu; /* current CPU for step/continue ops */
 292     CPUState *g_cpu; /* current CPU for other ops */
 293     CPUState *query_cpu; /* for q{f|s}ThreadInfo */
 294     enum RSState state; /* parsing state */
 295     char line_buf[MAX_PACKET_LENGTH];
 296     int line_buf_index;
 297     int line_csum;
 298     uint8_t last_packet[MAX_PACKET_LENGTH + 4];
 299     int last_packet_len;
 300     int signal;
 301 #ifdef CONFIG_USER_ONLY
 302     int fd;
 303     int running_state;
 304 #else
 305     CharDriverState *chr;
 306     CharDriverState *mon_chr;
 307 #endif
 308     char syscall_buf[256];
 309     gdb_syscall_complete_cb current_syscall_cb;
 310 } GDBState;
 311
 312 /* By default use no IRQs and no timers while single stepping so as to
 313  * make single stepping like an ICE HW step.
 314  */
 315 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
 316
 317 static GDBState *gdbserver_state;
 318
 319 /* This is an ugly hack to cope with both new and old gdb.
 320    If gdb sends qXfer:features:read then assume we're talking to a newish
 321    gdb that understands target descriptions.  */
 322 static int gdb_has_xml;
 323
 324 #ifdef CONFIG_USER_ONLY
 325 /* XXX: This is not thread safe.  Do we care?  */
 326 static int gdbserver_fd = -1;
 327
 328 static int get_char(GDBState *s)
 329 {
 330     uint8_t ch;
 331     int ret;
 332
 333     for(;;) {
 334         ret = qemu_recv(s->fd, &ch, 1, 0);
 335         if (ret < 0) {
 336             if (errno == ECONNRESET)
 337                 s->fd = -1;
 338             if (errno != EINTR && errno != EAGAIN)
 339                 return -1;
 340         } else if (ret == 0) {
 341             close(s->fd);
 342             s->fd = -1;
 343             return -1;
 344         } else {
 345             break;
 346         }
 347     }
 348     return ch;
 349 }
 350 #endif
 351
 352 static enum {
 353     GDB_SYS_UNKNOWN,
 354     GDB_SYS_ENABLED,
 355     GDB_SYS_DISABLED,
 356 } gdb_syscall_mode;
 357
 358 /* If gdb is connected when the first semihosting syscall occurs then use
 359    remote gdb syscalls.  Otherwise use native file IO.  */
 360 int use_gdb_syscalls(void)
 361 {
 362     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 363         gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
 364                                             : GDB_SYS_DISABLED);
 365     }
 366     return gdb_syscall_mode == GDB_SYS_ENABLED;
 367 }
 368
 369 /* Resume execution.  */
 370 static inline void gdb_continue(GDBState *s)
 371 {
 372 #ifdef CONFIG_USER_ONLY
 373     s->running_state = 1;
 374 #else
 375     if (runstate_check(RUN_STATE_GUEST_PANICKED)) {
 376         runstate_set(RUN_STATE_DEBUG);
 377     }
 378     if (!runstate_needs_reset()) {
 379         vm_start();
 380     }
 381 #endif
 382 }
 383
 384 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 385 {
 386 #ifdef CONFIG_USER_ONLY
 387     int ret;
 388
 389     while (len > 0) {
 390         ret = send(s->fd, buf, len, 0);
 391         if (ret < 0) {
 392             if (errno != EINTR && errno != EAGAIN)
 393                 return;
 394         } else {
 395             buf += ret;
 396             len -= ret;
 397         }
 398     }
 399 #else
 400     qemu_chr_fe_write(s->chr, buf, len);
 401 #endif
 402 }
 403
 404 static inline int fromhex(int v)
 405 {
 406     if (v >= '0' && v <= '9')
 407         return v - '0';
 408     else if (v >= 'A' && v <= 'F')
 409         return v - 'A' + 10;
 410     else if (v >= 'a' && v <= 'f')
 411         return v - 'a' + 10;
 412     else
 413         return 0;
 414 }
 415
 416 static inline int tohex(int v)
 417 {
 418     if (v < 10)
 419         return v + '0';
 420     else
 421         return v - 10 + 'a';
 422 }
 423
 424 static void memtohex(char *buf, const uint8_t *mem, int len)
 425 {
 426     int i, c;
 427     char *q;
 428     q = buf;
 429     for(i = 0; i < len; i++) {
 430         c = mem[i];
 431         *q++ = tohex(c >> 4);
 432         *q++ = tohex(c & 0xf);
 433     }
 434     *q = '\0';
 435 }
 436
 437 static void hextomem(uint8_t *mem, const char *buf, int len)
 438 {
 439     int i;
 440
 441     for(i = 0; i < len; i++) {
 442         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 443         buf += 2;
 444     }
 445 }
 446
 447 /* return -1 if error, 0 if OK */
 448 static int put_packet_binary(GDBState *s, const char *buf, int len)
 449 {
 450     int csum, i;
 451     uint8_t *p;
 452
 453     for(;;) {
 454         p = s->last_packet;
 455         *(p++) = '$';
 456         memcpy(p, buf, len);
 457         p += len;
 458         csum = 0;
 459         for(i = 0; i < len; i++) {
 460             csum += buf[i];
 461         }
 462         *(p++) = '#';
 463         *(p++) = tohex((csum >> 4) & 0xf);
 464         *(p++) = tohex((csum) & 0xf);
 465
 466         s->last_packet_len = p - s->last_packet;
 467         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 468
 469 #ifdef CONFIG_USER_ONLY
 470         i = get_char(s);
 471         if (i < 0)
 472             return -1;
 473         if (i == '+')
 474             break;
 475 #else
 476         break;
 477 #endif
 478     }
 479     return 0;
 480 }
 481
 482 /* return -1 if error, 0 if OK */
 483 static int put_packet(GDBState *s, const char *buf)
 484 {
 485 #ifdef DEBUG_GDB
 486     printf("reply='%s'\n", buf);
 487 #endif
 488
 489     return put_packet_binary(s, buf, strlen(buf));
 490 }
 491
 492 /* The GDB remote protocol transfers values in target byte order.  This means
 493    we can use the raw memory access routines to access the value buffer.
 494    Conveniently, these also handle the case where the buffer is mis-aligned.
 495  */
 496 #define GET_REG8(val) do { \
 497     stb_p(mem_buf, val); \
 498     return 1; \
 499     } while(0)
 500 #define GET_REG16(val) do { \
 501     stw_p(mem_buf, val); \
 502     return 2; \
 503     } while(0)
 504 #define GET_REG32(val) do { \
 505     stl_p(mem_buf, val); \
 506     return 4; \
 507     } while(0)
 508 #define GET_REG64(val) do { \
 509     stq_p(mem_buf, val); \
 510     return 8; \
 511     } while(0)
 512
 513 #if TARGET_LONG_BITS == 64
 514 #define GET_REGL(val) GET_REG64(val)
 515 #define ldtul_p(addr) ldq_p(addr)
 516 #else
 517 #define GET_REGL(val) GET_REG32(val)
 518 #define ldtul_p(addr) ldl_p(addr)
 519 #endif
 520
 521 #if defined(TARGET_I386)
 522
 523 #include "target-i386/gdbstub.c"
 524
 525 #elif defined (TARGET_PPC)
 526
 527 #if defined (TARGET_PPC64)
 528 #define GDB_CORE_XML "power64-core.xml"
 529 #else
 530 #define GDB_CORE_XML "power-core.xml"
 531 #endif
 532
 533 #include "target-ppc/gdbstub.c"
 534
 535 #elif defined (TARGET_SPARC)
 536
 537 #include "target-sparc/gdbstub.c"
 538
 539 #elif defined (TARGET_ARM)
 540
 541 #define GDB_CORE_XML "arm-core.xml"
 542
 543 #include "target-arm/gdbstub.c"
 544
 545 #elif defined (TARGET_M68K)
 546
 547 #define GDB_CORE_XML "cf-core.xml"
 548
 549 #include "target-m68k/gdbstub.c"
 550
 551 #elif defined (TARGET_MIPS)
 552
 553 #include "target-mips/gdbstub.c"
 554
 555 #elif defined(TARGET_OPENRISC)
 556
 557 #include "target-openrisc/gdbstub.c"
 558
 559 #elif defined (TARGET_SH4)
 560
 561 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 562 /* FIXME: We should use XML for this.  */
 563
 564 static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n)
 565 {
 566     switch (n) {
 567     case 0 ... 7:
 568         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 569             GET_REGL(env->gregs[n + 16]);
 570         } else {
 571             GET_REGL(env->gregs[n]);
 572         }
 573     case 8 ... 15:
 574         GET_REGL(env->gregs[n]);
 575     case 16:
 576         GET_REGL(env->pc);
 577     case 17:
 578         GET_REGL(env->pr);
 579     case 18:
 580         GET_REGL(env->gbr);
 581     case 19:
 582         GET_REGL(env->vbr);
 583     case 20:
 584         GET_REGL(env->mach);
 585     case 21:
 586         GET_REGL(env->macl);
 587     case 22:
 588         GET_REGL(env->sr);
 589     case 23:
 590         GET_REGL(env->fpul);
 591     case 24:
 592         GET_REGL(env->fpscr);
 593     case 25 ... 40:
 594         if (env->fpscr & FPSCR_FR) {
 595             stfl_p(mem_buf, env->fregs[n - 9]);
 596         } else {
 597             stfl_p(mem_buf, env->fregs[n - 25]);
 598         }
 599         return 4;
 600     case 41:
 601         GET_REGL(env->ssr);
 602     case 42:
 603         GET_REGL(env->spc);
 604     case 43 ... 50:
 605         GET_REGL(env->gregs[n - 43]);
 606     case 51 ... 58:
 607         GET_REGL(env->gregs[n - (51 - 16)]);
 608     }
 609
 610     return 0;
 611 }
 612
 613 static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n)
 614 {
 615     switch (n) {
 616     case 0 ... 7:
 617         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 618             env->gregs[n + 16] = ldl_p(mem_buf);
 619         } else {
 620             env->gregs[n] = ldl_p(mem_buf);
 621         }
 622         break;
 623     case 8 ... 15:
 624         env->gregs[n] = ldl_p(mem_buf);
 625         break;
 626     case 16:
 627         env->pc = ldl_p(mem_buf);
 628         break;
 629     case 17:
 630         env->pr = ldl_p(mem_buf);
 631         break;
 632     case 18:
 633         env->gbr = ldl_p(mem_buf);
 634         break;
 635     case 19:
 636         env->vbr = ldl_p(mem_buf);
 637         break;
 638     case 20:
 639         env->mach = ldl_p(mem_buf);
 640         break;
 641     case 21:
 642         env->macl = ldl_p(mem_buf);
 643         break;
 644     case 22:
 645         env->sr = ldl_p(mem_buf);
 646         break;
 647     case 23:
 648         env->fpul = ldl_p(mem_buf);
 649         break;
 650     case 24:
 651         env->fpscr = ldl_p(mem_buf);
 652         break;
 653     case 25 ... 40:
 654         if (env->fpscr & FPSCR_FR) {
 655             env->fregs[n - 9] = ldfl_p(mem_buf);
 656         } else {
 657             env->fregs[n - 25] = ldfl_p(mem_buf);
 658         }
 659         break;
 660     case 41:
 661         env->ssr = ldl_p(mem_buf);
 662         break;
 663     case 42:
 664         env->spc = ldl_p(mem_buf);
 665         break;
 666     case 43 ... 50:
 667         env->gregs[n - 43] = ldl_p(mem_buf);
 668         break;
 669     case 51 ... 58:
 670         env->gregs[n - (51 - 16)] = ldl_p(mem_buf);
 671         break;
 672     default:
 673         return 0;
 674     }
 675
 676     return 4;
 677 }
 678 #elif defined (TARGET_MICROBLAZE)
 679
 680 static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n)
 681 {
 682     if (n < 32) {
 683         GET_REG32(env->regs[n]);
 684     } else {
 685         GET_REG32(env->sregs[n - 32]);
 686     }
 687     return 0;
 688 }
 689
 690 static int cpu_gdb_write_register(CPUMBState *env, uint8_t *mem_buf, int n)
 691 {
 692     MicroBlazeCPU *cpu = mb_env_get_cpu(env);
 693     CPUClass *cc = CPU_GET_CLASS(cpu);
 694     uint32_t tmp;
 695
 696     if (n > cc->gdb_num_core_regs) {
 697         return 0;
 698     }
 699
 700     tmp = ldl_p(mem_buf);
 701
 702     if (n < 32) {
 703         env->regs[n] = tmp;
 704     } else {
 705         env->sregs[n - 32] = tmp;
 706     }
 707     return 4;
 708 }
 709 #elif defined (TARGET_CRIS)
 710
 711 static int
 712 read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n)
 713 {
 714     if (n < 15) {
 715         GET_REG32(env->regs[n]);
 716     }
 717
 718     if (n == 15) {
 719         GET_REG32(env->pc);
 720     }
 721
 722     if (n < 32) {
 723         switch (n) {
 724         case 16:
 725             GET_REG8(env->pregs[n - 16]);
 726         case 17:
 727             GET_REG8(env->pregs[n - 16]);
 728         case 20:
 729         case 21:
 730             GET_REG16(env->pregs[n - 16]);
 731         default:
 732             if (n >= 23) {
 733                 GET_REG32(env->pregs[n - 16]);
 734             }
 735             break;
 736         }
 737     }
 738     return 0;
 739 }
 740
 741 static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n)
 742 {
 743     uint8_t srs;
 744
 745     if (env->pregs[PR_VR] < 32) {
 746         return read_register_crisv10(env, mem_buf, n);
 747     }
 748
 749     srs = env->pregs[PR_SRS];
 750     if (n < 16) {
 751         GET_REG32(env->regs[n]);
 752     }
 753
 754     if (n >= 21 && n < 32) {
 755         GET_REG32(env->pregs[n - 16]);
 756     }
 757     if (n >= 33 && n < 49) {
 758         GET_REG32(env->sregs[srs][n - 33]);
 759     }
 760     switch (n) {
 761     case 16:
 762         GET_REG8(env->pregs[0]);
 763     case 17:
 764         GET_REG8(env->pregs[1]);
 765     case 18:
 766         GET_REG32(env->pregs[2]);
 767     case 19:
 768         GET_REG8(srs);
 769     case 20:
 770         GET_REG16(env->pregs[4]);
 771     case 32:
 772         GET_REG32(env->pc);
 773     }
 774
 775     return 0;
 776 }
 777
 778 static int cpu_gdb_write_register(CPUCRISState *env, uint8_t *mem_buf, int n)
 779 {
 780     uint32_t tmp;
 781
 782     if (n > 49) {
 783         return 0;
 784     }
 785
 786     tmp = ldl_p(mem_buf);
 787
 788     if (n < 16) {
 789         env->regs[n] = tmp;
 790     }
 791
 792     if (n >= 21 && n < 32) {
 793         env->pregs[n - 16] = tmp;
 794     }
 795
 796     /* FIXME: Should support function regs be writable?  */
 797     switch (n) {
 798     case 16:
 799         return 1;
 800     case 17:
 801         return 1;
 802     case 18:
 803         env->pregs[PR_PID] = tmp;
 804         break;
 805     case 19:
 806         return 1;
 807     case 20:
 808         return 2;
 809     case 32:
 810         env->pc = tmp;
 811         break;
 812     }
 813
 814     return 4;
 815 }
 816 #elif defined (TARGET_ALPHA)
 817
 818 static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
 819 {
 820     uint64_t val;
 821     CPU_DoubleU d;
 822
 823     switch (n) {
 824     case 0 ... 30:
 825         val = env->ir[n];
 826         break;
 827     case 32 ... 62:
 828         d.d = env->fir[n - 32];
 829         val = d.ll;
 830         break;
 831     case 63:
 832         val = cpu_alpha_load_fpcr(env);
 833         break;
 834     case 64:
 835         val = env->pc;
 836         break;
 837     case 66:
 838         val = env->unique;
 839         break;
 840     case 31:
 841     case 65:
 842         /* 31 really is the zero register; 65 is unassigned in the
 843            gdb protocol, but is still required to occupy 8 bytes. */
 844         val = 0;
 845         break;
 846     default:
 847         return 0;
 848     }
 849     GET_REGL(val);
 850 }
 851
 852 static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
 853 {
 854     target_ulong tmp = ldtul_p(mem_buf);
 855     CPU_DoubleU d;
 856
 857     switch (n) {
 858     case 0 ... 30:
 859         env->ir[n] = tmp;
 860         break;
 861     case 32 ... 62:
 862         d.ll = tmp;
 863         env->fir[n - 32] = d.d;
 864         break;
 865     case 63:
 866         cpu_alpha_store_fpcr(env, tmp);
 867         break;
 868     case 64:
 869         env->pc = tmp;
 870         break;
 871     case 66:
 872         env->unique = tmp;
 873         break;
 874     case 31:
 875     case 65:
 876         /* 31 really is the zero register; 65 is unassigned in the
 877            gdb protocol, but is still required to occupy 8 bytes. */
 878         break;
 879     default:
 880         return 0;
 881     }
 882     return 8;
 883 }
 884 #elif defined (TARGET_S390X)
 885
 886 static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n)
 887 {
 888     uint64_t val;
 889     int cc_op;
 890
 891     switch (n) {
 892     case S390_PSWM_REGNUM:
 893         cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr);
 894         val = deposit64(env->psw.mask, 44, 2, cc_op);
 895         GET_REGL(val);
 896     case S390_PSWA_REGNUM:
 897         GET_REGL(env->psw.addr);
 898     case S390_R0_REGNUM ... S390_R15_REGNUM:
 899         GET_REGL(env->regs[n-S390_R0_REGNUM]);
 900     case S390_A0_REGNUM ... S390_A15_REGNUM:
 901         GET_REG32(env->aregs[n-S390_A0_REGNUM]);
 902     case S390_FPC_REGNUM:
 903         GET_REG32(env->fpc);
 904     case S390_F0_REGNUM ... S390_F15_REGNUM:
 905         GET_REG64(env->fregs[n-S390_F0_REGNUM].ll);
 906     }
 907
 908     return 0;
 909 }
 910
 911 static int cpu_gdb_write_register(CPUS390XState *env, uint8_t *mem_buf, int n)
 912 {
 913     target_ulong tmpl;
 914     uint32_t tmp32;
 915     int r = 8;
 916     tmpl = ldtul_p(mem_buf);
 917     tmp32 = ldl_p(mem_buf);
 918
 919     switch (n) {
 920     case S390_PSWM_REGNUM:
 921         env->psw.mask = tmpl;
 922         env->cc_op = extract64(tmpl, 44, 2);
 923         break;
 924     case S390_PSWA_REGNUM:
 925         env->psw.addr = tmpl;
 926         break;
 927     case S390_R0_REGNUM ... S390_R15_REGNUM:
 928         env->regs[n-S390_R0_REGNUM] = tmpl;
 929         break;
 930     case S390_A0_REGNUM ... S390_A15_REGNUM:
 931         env->aregs[n-S390_A0_REGNUM] = tmp32;
 932         r = 4;
 933         break;
 934     case S390_FPC_REGNUM:
 935         env->fpc = tmp32;
 936         r = 4;
 937         break;
 938     case S390_F0_REGNUM ... S390_F15_REGNUM:
 939         env->fregs[n-S390_F0_REGNUM].ll = tmpl;
 940         break;
 941     default:
 942         return 0;
 943     }
 944     return r;
 945 }
 946 #elif defined (TARGET_LM32)
 947
 948 #include "hw/lm32/lm32_pic.h"
 949
 950 static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n)
 951 {
 952     if (n < 32) {
 953         GET_REG32(env->regs[n]);
 954     } else {
 955         switch (n) {
 956         case 32:
 957             GET_REG32(env->pc);
 958         /* FIXME: put in right exception ID */
 959         case 33:
 960             GET_REG32(0);
 961         case 34:
 962             GET_REG32(env->eba);
 963         case 35:
 964             GET_REG32(env->deba);
 965         case 36:
 966             GET_REG32(env->ie);
 967         case 37:
 968             GET_REG32(lm32_pic_get_im(env->pic_state));
 969         case 38:
 970             GET_REG32(lm32_pic_get_ip(env->pic_state));
 971         }
 972     }
 973     return 0;
 974 }
 975
 976 static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n)
 977 {
 978     LM32CPU *cpu = lm32_env_get_cpu(env);
 979     CPUClass *cc = CPU_GET_CLASS(cpu);
 980     uint32_t tmp;
 981
 982     if (n > cc->gdb_num_core_regs) {
 983         return 0;
 984     }
 985
 986     tmp = ldl_p(mem_buf);
 987
 988     if (n < 32) {
 989         env->regs[n] = tmp;
 990     } else {
 991         switch (n) {
 992         case 32:
 993             env->pc = tmp;
 994             break;
 995         case 34:
 996             env->eba = tmp;
 997             break;
 998         case 35:
 999             env->deba = tmp;
1000             break;
1001         case 36:
1002             env->ie = tmp;
1003             break;
1004         case 37:
1005             lm32_pic_set_im(env->pic_state, tmp);
1006             break;
1007         case 38:
1008             lm32_pic_set_ip(env->pic_state, tmp);
1009             break;
1010         }
1011     }
1012     return 4;
1013 }
1014 #elif defined(TARGET_XTENSA)
1015
1016 static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
1017 {
1018     const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
1019
1020     if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
1021         return 0;
1022     }
1023
1024     switch (reg->type) {
1025     case 9: /*pc*/
1026         GET_REG32(env->pc);
1027
1028     case 1: /*ar*/
1029         xtensa_sync_phys_from_window(env);
1030         GET_REG32(env->phys_regs[(reg->targno & 0xff) % env->config->nareg]);
1031
1032     case 2: /*SR*/
1033         GET_REG32(env->sregs[reg->targno & 0xff]);
1034
1035     case 3: /*UR*/
1036         GET_REG32(env->uregs[reg->targno & 0xff]);
1037
1038     case 4: /*f*/
1039         GET_REG32(float32_val(env->fregs[reg->targno & 0x0f]));
1040
1041     case 8: /*a*/
1042         GET_REG32(env->regs[reg->targno & 0x0f]);
1043
1044     default:
1045         qemu_log("%s from reg %d of unsupported type %d\n",
1046                  __func__, n, reg->type);
1047         return 0;
1048     }
1049 }
1050
1051 static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
1052 {
1053     uint32_t tmp;
1054     const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
1055
1056     if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
1057         return 0;
1058     }
1059
1060     tmp = ldl_p(mem_buf);
1061
1062     switch (reg->type) {
1063     case 9: /*pc*/
1064         env->pc = tmp;
1065         break;
1066
1067     case 1: /*ar*/
1068         env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp;
1069         xtensa_sync_window_from_phys(env);
1070         break;
1071
1072     case 2: /*SR*/
1073         env->sregs[reg->targno & 0xff] = tmp;
1074         break;
1075
1076     case 3: /*UR*/
1077         env->uregs[reg->targno & 0xff] = tmp;
1078         break;
1079
1080     case 4: /*f*/
1081         env->fregs[reg->targno & 0x0f] = make_float32(tmp);
1082         break;
1083
1084     case 8: /*a*/
1085         env->regs[reg->targno & 0x0f] = tmp;
1086         break;
1087
1088     default:
1089         qemu_log("%s to reg %d of unsupported type %d\n",
1090                  __func__, n, reg->type);
1091         return 0;
1092     }
1093
1094     return 4;
1095 }
1096 #else
1097
1098 static int cpu_gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int n)
1099 {
1100     return 0;
1101 }
1102
1103 static int cpu_gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int n)
1104 {
1105     return 0;
1106 }
1107
1108 #endif
1109
1110 #ifdef GDB_CORE_XML
1111 /* Encode data using the encoding for 'x' packets.  */
1112 static int memtox(char *buf, const char *mem, int len)
1113 {
1114     char *p = buf;
1115     char c;
1116
1117     while (len--) {
1118         c = *(mem++);
1119         switch (c) {
1120         case '#': case '$': case '*': case '}':
1121             *(p++) = '}';
1122             *(p++) = c ^ 0x20;
1123             break;
1124         default:
1125             *(p++) = c;
1126             break;
1127         }
1128     }
1129     return p - buf;
1130 }
1131
1132 static const char *get_feature_xml(const char *p, const char **newp)
1133 {
1134     size_t len;
1135     int i;
1136     const char *name;
1137     static char target_xml[1024];
1138
1139     len = 0;
1140     while (p[len] && p[len] != ':')
1141         len++;
1142     *newp = p + len;
1143
1144     name = NULL;
1145     if (strncmp(p, "target.xml", len) == 0) {
1146         /* Generate the XML description for this CPU.  */
1147         if (!target_xml[0]) {
1148             GDBRegisterState *r;
1149             CPUState *cpu = first_cpu;
1150
1151             snprintf(target_xml, sizeof(target_xml),
1152                      "<?xml version=\"1.0\"?>"
1153                      "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1154                      "<target>"
1155                      "<xi:include href=\"%s\"/>",
1156                      GDB_CORE_XML);
1157
1158             for (r = cpu->gdb_regs; r; r = r->next) {
1159                 pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
1160                 pstrcat(target_xml, sizeof(target_xml), r->xml);
1161                 pstrcat(target_xml, sizeof(target_xml), "\"/>");
1162             }
1163             pstrcat(target_xml, sizeof(target_xml), "</target>");
1164         }
1165         return target_xml;
1166     }
1167     for (i = 0; ; i++) {
1168         name = xml_builtin[i][0];
1169         if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1170             break;
1171     }
1172     return name ? xml_builtin[i][1] : NULL;
1173 }
1174 #endif
1175
1176 static int gdb_read_register(CPUState *cpu, uint8_t *mem_buf, int reg)
1177 {
1178     CPUClass *cc = CPU_GET_CLASS(cpu);
1179     CPUArchState *env = cpu->env_ptr;
1180     GDBRegisterState *r;
1181
1182     if (reg < cc->gdb_num_core_regs) {
1183         return cpu_gdb_read_register(env, mem_buf, reg);
1184     }
1185
1186     for (r = cpu->gdb_regs; r; r = r->next) {
1187         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1188             return r->get_reg(env, mem_buf, reg - r->base_reg);
1189         }
1190     }
1191     return 0;
1192 }
1193
1194 static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg)
1195 {
1196     CPUClass *cc = CPU_GET_CLASS(cpu);
1197     CPUArchState *env = cpu->env_ptr;
1198     GDBRegisterState *r;
1199
1200     if (reg < cc->gdb_num_core_regs) {
1201         return cpu_gdb_write_register(env, mem_buf, reg);
1202     }
1203
1204     for (r = cpu->gdb_regs; r; r = r->next) {
1205         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1206             return r->set_reg(env, mem_buf, reg - r->base_reg);
1207         }
1208     }
1209     return 0;
1210 }
1211
1212 /* Register a supplemental set of CPU registers.  If g_pos is nonzero it
1213    specifies the first register number and these registers are included in
1214    a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
1215    gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1216  */
1217
1218 void gdb_register_coprocessor(CPUState *cpu,
1219                               gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1220                               int num_regs, const char *xml, int g_pos)
1221 {
1222     GDBRegisterState *s;
1223     GDBRegisterState **p;
1224
1225     p = &cpu->gdb_regs;
1226     while (*p) {
1227         /* Check for duplicates.  */
1228         if (strcmp((*p)->xml, xml) == 0)
1229             return;
1230         p = &(*p)->next;
1231     }
1232
1233     s = g_new0(GDBRegisterState, 1);
1234     s->base_reg = cpu->gdb_num_regs;
1235     s->num_regs = num_regs;
1236     s->get_reg = get_reg;
1237     s->set_reg = set_reg;
1238     s->xml = xml;
1239
1240     /* Add to end of list.  */
1241     cpu->gdb_num_regs += num_regs;
1242     *p = s;
1243     if (g_pos) {
1244         if (g_pos != s->base_reg) {
1245             fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1246                     "Expected %d got %d\n", xml, g_pos, s->base_reg);
1247         }
1248     }
1249 }
1250
1251 #ifndef CONFIG_USER_ONLY
1252 static const int xlat_gdb_type[] = {
1253     [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
1254     [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
1255     [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1256 };
1257 #endif
1258
1259 static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1260 {
1261     CPUState *cpu;
1262     CPUArchState *env;
1263     int err = 0;
1264
1265     if (kvm_enabled()) {
1266         return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1267     }
1268
1269     switch (type) {
1270     case GDB_BREAKPOINT_SW:
1271     case GDB_BREAKPOINT_HW:
1272         for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1273             env = cpu->env_ptr;
1274             err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1275             if (err)
1276                 break;
1277         }
1278         return err;
1279 #ifndef CONFIG_USER_ONLY
1280     case GDB_WATCHPOINT_WRITE:
1281     case GDB_WATCHPOINT_READ:
1282     case GDB_WATCHPOINT_ACCESS:
1283         for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1284             env = cpu->env_ptr;
1285             err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1286                                         NULL);
1287             if (err)
1288                 break;
1289         }
1290         return err;
1291 #endif
1292     default:
1293         return -ENOSYS;
1294     }
1295 }
1296
1297 static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1298 {
1299     CPUState *cpu;
1300     CPUArchState *env;
1301     int err = 0;
1302
1303     if (kvm_enabled()) {
1304         return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1305     }
1306
1307     switch (type) {
1308     case GDB_BREAKPOINT_SW:
1309     case GDB_BREAKPOINT_HW:
1310         for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1311             env = cpu->env_ptr;
1312             err = cpu_breakpoint_remove(env, addr, BP_GDB);
1313             if (err)
1314                 break;
1315         }
1316         return err;
1317 #ifndef CONFIG_USER_ONLY
1318     case GDB_WATCHPOINT_WRITE:
1319     case GDB_WATCHPOINT_READ:
1320     case GDB_WATCHPOINT_ACCESS:
1321         for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1322             env = cpu->env_ptr;
1323             err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1324             if (err)
1325                 break;
1326         }
1327         return err;
1328 #endif
1329     default:
1330         return -ENOSYS;
1331     }
1332 }
1333
1334 static void gdb_breakpoint_remove_all(void)
1335 {
1336     CPUState *cpu;
1337     CPUArchState *env;
1338
1339     if (kvm_enabled()) {
1340         kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1341         return;
1342     }
1343
1344     for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1345         env = cpu->env_ptr;
1346         cpu_breakpoint_remove_all(env, BP_GDB);
1347 #ifndef CONFIG_USER_ONLY
1348         cpu_watchpoint_remove_all(env, BP_GDB);
1349 #endif
1350     }
1351 }
1352
1353 static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
1354 {
1355     CPUState *cpu = s->c_cpu;
1356     CPUClass *cc = CPU_GET_CLASS(cpu);
1357
1358     cpu_synchronize_state(cpu);
1359     if (cc->set_pc) {
1360         cc->set_pc(cpu, pc);
1361     }
1362 }
1363
1364 static CPUState *find_cpu(uint32_t thread_id)
1365 {
1366     CPUState *cpu;
1367
1368     for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
1369         if (cpu_index(cpu) == thread_id) {
1370             return cpu;
1371         }
1372     }
1373
1374     return NULL;
1375 }
1376
1377 static int gdb_handle_packet(GDBState *s, const char *line_buf)
1378 {
1379     CPUState *cpu;
1380     const char *p;
1381     uint32_t thread;
1382     int ch, reg_size, type, res;
1383     char buf[MAX_PACKET_LENGTH];
1384     uint8_t mem_buf[MAX_PACKET_LENGTH];
1385     uint8_t *registers;
1386     target_ulong addr, len;
1387
1388 #ifdef DEBUG_GDB
1389     printf("command='%s'\n", line_buf);
1390 #endif
1391     p = line_buf;
1392     ch = *p++;
1393     switch(ch) {
1394     case '?':
1395         /* TODO: Make this return the correct value for user-mode.  */
1396         snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1397                  cpu_index(s->c_cpu));
1398         put_packet(s, buf);
1399         /* Remove all the breakpoints when this query is issued,
1400          * because gdb is doing and initial connect and the state
1401          * should be cleaned up.
1402          */
1403         gdb_breakpoint_remove_all();
1404         break;
1405     case 'c':
1406         if (*p != '\0') {
1407             addr = strtoull(p, (char **)&p, 16);
1408             gdb_set_cpu_pc(s, addr);
1409         }
1410         s->signal = 0;
1411         gdb_continue(s);
1412         return RS_IDLE;
1413     case 'C':
1414         s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1415         if (s->signal == -1)
1416             s->signal = 0;
1417         gdb_continue(s);
1418         return RS_IDLE;
1419     case 'v':
1420         if (strncmp(p, "Cont", 4) == 0) {
1421             int res_signal, res_thread;
1422
1423             p += 4;
1424             if (*p == '?') {
1425                 put_packet(s, "vCont;c;C;s;S");
1426                 break;
1427             }
1428             res = 0;
1429             res_signal = 0;
1430             res_thread = 0;
1431             while (*p) {
1432                 int action, signal;
1433
1434                 if (*p++ != ';') {
1435                     res = 0;
1436                     break;
1437                 }
1438                 action = *p++;
1439                 signal = 0;
1440                 if (action == 'C' || action == 'S') {
1441                     signal = strtoul(p, (char **)&p, 16);
1442                 } else if (action != 'c' && action != 's') {
1443                     res = 0;
1444                     break;
1445                 }
1446                 thread = 0;
1447                 if (*p == ':') {
1448                     thread = strtoull(p+1, (char **)&p, 16);
1449                 }
1450                 action = tolower(action);
1451                 if (res == 0 || (res == 'c' && action == 's')) {
1452                     res = action;
1453                     res_signal = signal;
1454                     res_thread = thread;
1455                 }
1456             }
1457             if (res) {
1458                 if (res_thread != -1 && res_thread != 0) {
1459                     cpu = find_cpu(res_thread);
1460                     if (cpu == NULL) {
1461                         put_packet(s, "E22");
1462                         break;
1463                     }
1464                     s->c_cpu = cpu;
1465                 }
1466                 if (res == 's') {
1467                     cpu_single_step(s->c_cpu, sstep_flags);
1468                 }
1469                 s->signal = res_signal;
1470                 gdb_continue(s);
1471                 return RS_IDLE;
1472             }
1473             break;
1474         } else {
1475             goto unknown_command;
1476         }
1477     case 'k':
1478 #ifdef CONFIG_USER_ONLY
1479         /* Kill the target */
1480         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1481         exit(0);
1482 #endif
1483     case 'D':
1484         /* Detach packet */
1485         gdb_breakpoint_remove_all();
1486         gdb_syscall_mode = GDB_SYS_DISABLED;
1487         gdb_continue(s);
1488         put_packet(s, "OK");
1489         break;
1490     case 's':
1491         if (*p != '\0') {
1492             addr = strtoull(p, (char **)&p, 16);
1493             gdb_set_cpu_pc(s, addr);
1494         }
1495         cpu_single_step(s->c_cpu, sstep_flags);
1496         gdb_continue(s);
1497         return RS_IDLE;
1498     case 'F':
1499         {
1500             target_ulong ret;
1501             target_ulong err;
1502
1503             ret = strtoull(p, (char **)&p, 16);
1504             if (*p == ',') {
1505                 p++;
1506                 err = strtoull(p, (char **)&p, 16);
1507             } else {
1508                 err = 0;
1509             }
1510             if (*p == ',')
1511                 p++;
1512             type = *p;
1513             if (s->current_syscall_cb) {
1514                 s->current_syscall_cb(s->c_cpu, ret, err);
1515                 s->current_syscall_cb = NULL;
1516             }
1517             if (type == 'C') {
1518                 put_packet(s, "T02");
1519             } else {
1520                 gdb_continue(s);
1521             }
1522         }
1523         break;
1524     case 'g':
1525         cpu_synchronize_state(s->g_cpu);
1526         len = 0;
1527         for (addr = 0; addr < s->g_cpu->gdb_num_regs; addr++) {
1528             reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1529             len += reg_size;
1530         }
1531         memtohex(buf, mem_buf, len);
1532         put_packet(s, buf);
1533         break;
1534     case 'G':
1535         cpu_synchronize_state(s->g_cpu);
1536         registers = mem_buf;
1537         len = strlen(p) / 2;
1538         hextomem((uint8_t *)registers, p, len);
1539         for (addr = 0; addr < s->g_cpu->gdb_num_regs && len > 0; addr++) {
1540             reg_size = gdb_write_register(s->g_cpu, registers, addr);
1541             len -= reg_size;
1542             registers += reg_size;
1543         }
1544         put_packet(s, "OK");
1545         break;
1546     case 'm':
1547         addr = strtoull(p, (char **)&p, 16);
1548         if (*p == ',')
1549             p++;
1550         len = strtoull(p, NULL, 16);
1551         if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, false) != 0) {
1552             put_packet (s, "E14");
1553         } else {
1554             memtohex(buf, mem_buf, len);
1555             put_packet(s, buf);
1556         }
1557         break;
1558     case 'M':
1559         addr = strtoull(p, (char **)&p, 16);
1560         if (*p == ',')
1561             p++;
1562         len = strtoull(p, (char **)&p, 16);
1563         if (*p == ':')
1564             p++;
1565         hextomem(mem_buf, p, len);
1566         if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len,
1567                                    true) != 0) {
1568             put_packet(s, "E14");
1569         } else {
1570             put_packet(s, "OK");
1571         }
1572         break;
1573     case 'p':
1574         /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1575            This works, but can be very slow.  Anything new enough to
1576            understand XML also knows how to use this properly.  */
1577         if (!gdb_has_xml)
1578             goto unknown_command;
1579         addr = strtoull(p, (char **)&p, 16);
1580         reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1581         if (reg_size) {
1582             memtohex(buf, mem_buf, reg_size);
1583             put_packet(s, buf);
1584         } else {
1585             put_packet(s, "E14");
1586         }
1587         break;
1588     case 'P':
1589         if (!gdb_has_xml)
1590             goto unknown_command;
1591         addr = strtoull(p, (char **)&p, 16);
1592         if (*p == '=')
1593             p++;
1594         reg_size = strlen(p) / 2;
1595         hextomem(mem_buf, p, reg_size);
1596         gdb_write_register(s->g_cpu, mem_buf, addr);
1597         put_packet(s, "OK");
1598         break;
1599     case 'Z':
1600     case 'z':
1601         type = strtoul(p, (char **)&p, 16);
1602         if (*p == ',')
1603             p++;
1604         addr = strtoull(p, (char **)&p, 16);
1605         if (*p == ',')
1606             p++;
1607         len = strtoull(p, (char **)&p, 16);
1608         if (ch == 'Z')
1609             res = gdb_breakpoint_insert(addr, len, type);
1610         else
1611             res = gdb_breakpoint_remove(addr, len, type);
1612         if (res >= 0)
1613              put_packet(s, "OK");
1614         else if (res == -ENOSYS)
1615             put_packet(s, "");
1616         else
1617             put_packet(s, "E22");
1618         break;
1619     case 'H':
1620         type = *p++;
1621         thread = strtoull(p, (char **)&p, 16);
1622         if (thread == -1 || thread == 0) {
1623             put_packet(s, "OK");
1624             break;
1625         }
1626         cpu = find_cpu(thread);
1627         if (cpu == NULL) {
1628             put_packet(s, "E22");
1629             break;
1630         }
1631         switch (type) {
1632         case 'c':
1633             s->c_cpu = cpu;
1634             put_packet(s, "OK");
1635             break;
1636         case 'g':
1637             s->g_cpu = cpu;
1638             put_packet(s, "OK");
1639             break;
1640         default:
1641              put_packet(s, "E22");
1642              break;
1643         }
1644         break;
1645     case 'T':
1646         thread = strtoull(p, (char **)&p, 16);
1647         cpu = find_cpu(thread);
1648
1649         if (cpu != NULL) {
1650             put_packet(s, "OK");
1651         } else {
1652             put_packet(s, "E22");
1653         }
1654         break;
1655     case 'q':
1656     case 'Q':
1657         /* parse any 'q' packets here */
1658         if (!strcmp(p,"qemu.sstepbits")) {
1659             /* Query Breakpoint bit definitions */
1660             snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1661                      SSTEP_ENABLE,
1662                      SSTEP_NOIRQ,
1663                      SSTEP_NOTIMER);
1664             put_packet(s, buf);
1665             break;
1666         } else if (strncmp(p,"qemu.sstep",10) == 0) {
1667             /* Display or change the sstep_flags */
1668             p += 10;
1669             if (*p != '=') {
1670                 /* Display current setting */
1671                 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1672                 put_packet(s, buf);
1673                 break;
1674             }
1675             p++;
1676             type = strtoul(p, (char **)&p, 16);
1677             sstep_flags = type;
1678             put_packet(s, "OK");
1679             break;
1680         } else if (strcmp(p,"C") == 0) {
1681             /* "Current thread" remains vague in the spec, so always return
1682              *  the first CPU (gdb returns the first thread). */
1683             put_packet(s, "QC1");
1684             break;
1685         } else if (strcmp(p,"fThreadInfo") == 0) {
1686             s->query_cpu = first_cpu;
1687             goto report_cpuinfo;
1688         } else if (strcmp(p,"sThreadInfo") == 0) {
1689         report_cpuinfo:
1690             if (s->query_cpu) {
1691                 snprintf(buf, sizeof(buf), "m%x", cpu_index(s->query_cpu));
1692                 put_packet(s, buf);
1693                 s->query_cpu = s->query_cpu->next_cpu;
1694             } else
1695                 put_packet(s, "l");
1696             break;
1697         } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
1698             thread = strtoull(p+16, (char **)&p, 16);
1699             cpu = find_cpu(thread);
1700             if (cpu != NULL) {
1701                 cpu_synchronize_state(cpu);
1702                 len = snprintf((char *)mem_buf, sizeof(mem_buf),
1703                                "CPU#%d [%s]", cpu->cpu_index,
1704                                cpu->halted ? "halted " : "running");
1705                 memtohex(buf, mem_buf, len);
1706                 put_packet(s, buf);
1707             }
1708             break;
1709         }
1710 #ifdef CONFIG_USER_ONLY
1711         else if (strncmp(p, "Offsets", 7) == 0) {
1712             CPUArchState *env = s->c_cpu->env_ptr;
1713             TaskState *ts = env->opaque;
1714
1715             snprintf(buf, sizeof(buf),
1716                      "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1717                      ";Bss=" TARGET_ABI_FMT_lx,
1718                      ts->info->code_offset,
1719                      ts->info->data_offset,
1720                      ts->info->data_offset);
1721             put_packet(s, buf);
1722             break;
1723         }
1724 #else /* !CONFIG_USER_ONLY */
1725         else if (strncmp(p, "Rcmd,", 5) == 0) {
1726             int len = strlen(p + 5);
1727
1728             if ((len % 2) != 0) {
1729                 put_packet(s, "E01");
1730                 break;
1731             }
1732             hextomem(mem_buf, p + 5, len);
1733             len = len / 2;
1734             mem_buf[len++] = 0;
1735             qemu_chr_be_write(s->mon_chr, mem_buf, len);
1736             put_packet(s, "OK");
1737             break;
1738         }
1739 #endif /* !CONFIG_USER_ONLY */
1740         if (strncmp(p, "Supported", 9) == 0) {
1741             snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
1742 #ifdef GDB_CORE_XML
1743             pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
1744 #endif
1745             put_packet(s, buf);
1746             break;
1747         }
1748 #ifdef GDB_CORE_XML
1749         if (strncmp(p, "Xfer:features:read:", 19) == 0) {
1750             const char *xml;
1751             target_ulong total_len;
1752
1753             gdb_has_xml = 1;
1754             p += 19;
1755             xml = get_feature_xml(p, &p);
1756             if (!xml) {
1757                 snprintf(buf, sizeof(buf), "E00");
1758                 put_packet(s, buf);
1759                 break;
1760             }
1761
1762             if (*p == ':')
1763                 p++;
1764             addr = strtoul(p, (char **)&p, 16);
1765             if (*p == ',')
1766                 p++;
1767             len = strtoul(p, (char **)&p, 16);
1768
1769             total_len = strlen(xml);
1770             if (addr > total_len) {
1771                 snprintf(buf, sizeof(buf), "E00");
1772                 put_packet(s, buf);
1773                 break;
1774             }
1775             if (len > (MAX_PACKET_LENGTH - 5) / 2)
1776                 len = (MAX_PACKET_LENGTH - 5) / 2;
1777             if (len < total_len - addr) {
1778                 buf[0] = 'm';
1779                 len = memtox(buf + 1, xml + addr, len);
1780             } else {
1781                 buf[0] = 'l';
1782                 len = memtox(buf + 1, xml + addr, total_len - addr);
1783             }
1784             put_packet_binary(s, buf, len + 1);
1785             break;
1786         }
1787 #endif
1788         /* Unrecognised 'q' command.  */
1789         goto unknown_command;
1790
1791     default:
1792     unknown_command:
1793         /* put empty packet */
1794         buf[0] = '\0';
1795         put_packet(s, buf);
1796         break;
1797     }
1798     return RS_IDLE;
1799 }
1800
1801 void gdb_set_stop_cpu(CPUState *cpu)
1802 {
1803     gdbserver_state->c_cpu = cpu;
1804     gdbserver_state->g_cpu = cpu;
1805 }
1806
1807 #ifndef CONFIG_USER_ONLY
1808 static void gdb_vm_state_change(void *opaque, int running, RunState state)
1809 {
1810     GDBState *s = gdbserver_state;
1811     CPUArchState *env = s->c_cpu->env_ptr;
1812     CPUState *cpu = s->c_cpu;
1813     char buf[256];
1814     const char *type;
1815     int ret;
1816
1817     if (running || s->state == RS_INACTIVE) {
1818         return;
1819     }
1820     /* Is there a GDB syscall waiting to be sent?  */
1821     if (s->current_syscall_cb) {
1822         put_packet(s, s->syscall_buf);
1823         return;
1824     }
1825     switch (state) {
1826     case RUN_STATE_DEBUG:
1827         if (env->watchpoint_hit) {
1828             switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
1829             case BP_MEM_READ:
1830                 type = "r";
1831                 break;
1832             case BP_MEM_ACCESS:
1833                 type = "a";
1834                 break;
1835             default:
1836                 type = "";
1837                 break;
1838             }
1839             snprintf(buf, sizeof(buf),
1840                      "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
1841                      GDB_SIGNAL_TRAP, cpu_index(cpu), type,
1842                      env->watchpoint_hit->vaddr);
1843             env->watchpoint_hit = NULL;
1844             goto send_packet;
1845         }
1846         tb_flush(env);
1847         ret = GDB_SIGNAL_TRAP;
1848         break;
1849     case RUN_STATE_PAUSED:
1850         ret = GDB_SIGNAL_INT;
1851         break;
1852     case RUN_STATE_SHUTDOWN:
1853         ret = GDB_SIGNAL_QUIT;
1854         break;
1855     case RUN_STATE_IO_ERROR:
1856         ret = GDB_SIGNAL_IO;
1857         break;
1858     case RUN_STATE_WATCHDOG:
1859         ret = GDB_SIGNAL_ALRM;
1860         break;
1861     case RUN_STATE_INTERNAL_ERROR:
1862         ret = GDB_SIGNAL_ABRT;
1863         break;
1864     case RUN_STATE_SAVE_VM:
1865     case RUN_STATE_RESTORE_VM:
1866         return;
1867     case RUN_STATE_FINISH_MIGRATE:
1868         ret = GDB_SIGNAL_XCPU;
1869         break;
1870     default:
1871         ret = GDB_SIGNAL_UNKNOWN;
1872         break;
1873     }
1874     snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, cpu_index(cpu));
1875
1876 send_packet:
1877     put_packet(s, buf);
1878
1879     /* disable single step if it was enabled */
1880     cpu_single_step(cpu, 0);
1881 }
1882 #endif
1883
1884 /* Send a gdb syscall request.
1885    This accepts limited printf-style format specifiers, specifically:
1886     %x  - target_ulong argument printed in hex.
1887     %lx - 64-bit argument printed in hex.
1888     %s  - string pointer (target_ulong) and length (int) pair.  */
1889 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
1890 {
1891     va_list va;
1892     char *p;
1893     char *p_end;
1894     target_ulong addr;
1895     uint64_t i64;
1896     GDBState *s;
1897
1898     s = gdbserver_state;
1899     if (!s)
1900         return;
1901     s->current_syscall_cb = cb;
1902 #ifndef CONFIG_USER_ONLY
1903     vm_stop(RUN_STATE_DEBUG);
1904 #endif
1905     va_start(va, fmt);
1906     p = s->syscall_buf;
1907     p_end = &s->syscall_buf[sizeof(s->syscall_buf)];
1908     *(p++) = 'F';
1909     while (*fmt) {
1910         if (*fmt == '%') {
1911             fmt++;
1912             switch (*fmt++) {
1913             case 'x':
1914                 addr = va_arg(va, target_ulong);
1915                 p += snprintf(p, p_end - p, TARGET_FMT_lx, addr);
1916                 break;
1917             case 'l':
1918                 if (*(fmt++) != 'x')
1919                     goto bad_format;
1920                 i64 = va_arg(va, uint64_t);
1921                 p += snprintf(p, p_end - p, "%" PRIx64, i64);
1922                 break;
1923             case 's':
1924                 addr = va_arg(va, target_ulong);
1925                 p += snprintf(p, p_end - p, TARGET_FMT_lx "/%x",
1926                               addr, va_arg(va, int));
1927                 break;
1928             default:
1929             bad_format:
1930                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1931                         fmt - 1);
1932                 break;
1933             }
1934         } else {
1935             *(p++) = *(fmt++);
1936         }
1937     }
1938     *p = 0;
1939     va_end(va);
1940 #ifdef CONFIG_USER_ONLY
1941     put_packet(s, s->syscall_buf);
1942     gdb_handlesig(s->c_cpu, 0);
1943 #else
1944     /* In this case wait to send the syscall packet until notification that
1945        the CPU has stopped.  This must be done because if the packet is sent
1946        now the reply from the syscall request could be received while the CPU
1947        is still in the running state, which can cause packets to be dropped
1948        and state transition 'T' packets to be sent while the syscall is still
1949        being processed.  */
1950     cpu_exit(s->c_cpu);
1951 #endif
1952 }
1953
1954 static void gdb_read_byte(GDBState *s, int ch)
1955 {
1956     int i, csum;
1957     uint8_t reply;
1958
1959 #ifndef CONFIG_USER_ONLY
1960     if (s->last_packet_len) {
1961         /* Waiting for a response to the last packet.  If we see the start
1962            of a new command then abandon the previous response.  */
1963         if (ch == '-') {
1964 #ifdef DEBUG_GDB
1965             printf("Got NACK, retransmitting\n");
1966 #endif
1967             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1968         }
1969 #ifdef DEBUG_GDB
1970         else if (ch == '+')
1971             printf("Got ACK\n");
1972         else
1973             printf("Got '%c' when expecting ACK/NACK\n", ch);
1974 #endif
1975         if (ch == '+' || ch == '$')
1976             s->last_packet_len = 0;
1977         if (ch != '$')
1978             return;
1979     }
1980     if (runstate_is_running()) {
1981         /* when the CPU is running, we cannot do anything except stop
1982            it when receiving a char */
1983         vm_stop(RUN_STATE_PAUSED);
1984     } else
1985 #endif
1986     {
1987         switch(s->state) {
1988         case RS_IDLE:
1989             if (ch == '$') {
1990                 s->line_buf_index = 0;
1991                 s->state = RS_GETLINE;
1992             }
1993             break;
1994         case RS_GETLINE:
1995             if (ch == '#') {
1996             s->state = RS_CHKSUM1;
1997             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1998                 s->state = RS_IDLE;
1999             } else {
2000             s->line_buf[s->line_buf_index++] = ch;
2001             }
2002             break;
2003         case RS_CHKSUM1:
2004             s->line_buf[s->line_buf_index] = '\0';
2005             s->line_csum = fromhex(ch) << 4;
2006             s->state = RS_CHKSUM2;
2007             break;
2008         case RS_CHKSUM2:
2009             s->line_csum |= fromhex(ch);
2010             csum = 0;
2011             for(i = 0; i < s->line_buf_index; i++) {
2012                 csum += s->line_buf[i];
2013             }
2014             if (s->line_csum != (csum & 0xff)) {
2015                 reply = '-';
2016                 put_buffer(s, &reply, 1);
2017                 s->state = RS_IDLE;
2018             } else {
2019                 reply = '+';
2020                 put_buffer(s, &reply, 1);
2021                 s->state = gdb_handle_packet(s, s->line_buf);
2022             }
2023             break;
2024         default:
2025             abort();
2026         }
2027     }
2028 }
2029
2030 /* Tell the remote gdb that the process has exited.  */
2031 void gdb_exit(CPUArchState *env, int code)
2032 {
2033   GDBState *s;
2034   char buf[4];
2035
2036   s = gdbserver_state;
2037   if (!s) {
2038       return;
2039   }
2040 #ifdef CONFIG_USER_ONLY
2041   if (gdbserver_fd < 0 || s->fd < 0) {
2042       return;
2043   }
2044 #endif
2045
2046   snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
2047   put_packet(s, buf);
2048
2049 #ifndef CONFIG_USER_ONLY
2050   if (s->chr) {
2051       qemu_chr_delete(s->chr);
2052   }
2053 #endif
2054 }
2055
2056 #ifdef CONFIG_USER_ONLY
2057 int
2058 gdb_queuesig (void)
2059 {
2060     GDBState *s;
2061
2062     s = gdbserver_state;
2063
2064     if (gdbserver_fd < 0 || s->fd < 0)
2065         return 0;
2066     else
2067         return 1;
2068 }
2069
2070 int
2071 gdb_handlesig(CPUState *cpu, int sig)
2072 {
2073     CPUArchState *env = cpu->env_ptr;
2074     GDBState *s;
2075     char buf[256];
2076     int n;
2077
2078     s = gdbserver_state;
2079     if (gdbserver_fd < 0 || s->fd < 0) {
2080         return sig;
2081     }
2082
2083     /* disable single step if it was enabled */
2084     cpu_single_step(cpu, 0);
2085     tb_flush(env);
2086
2087     if (sig != 0) {
2088         snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
2089         put_packet(s, buf);
2090     }
2091     /* put_packet() might have detected that the peer terminated the
2092        connection.  */
2093     if (s->fd < 0) {
2094         return sig;
2095     }
2096
2097     sig = 0;
2098     s->state = RS_IDLE;
2099     s->running_state = 0;
2100     while (s->running_state == 0) {
2101         n = read(s->fd, buf, 256);
2102         if (n > 0) {
2103             int i;
2104
2105             for (i = 0; i < n; i++) {
2106                 gdb_read_byte(s, buf[i]);
2107             }
2108         } else if (n == 0 || errno != EAGAIN) {
2109             /* XXX: Connection closed.  Should probably wait for another
2110                connection before continuing.  */
2111             return sig;
2112         }
2113     }
2114     sig = s->signal;
2115     s->signal = 0;
2116     return sig;
2117 }
2118
2119 /* Tell the remote gdb that the process has exited due to SIG.  */
2120 void gdb_signalled(CPUArchState *env, int sig)
2121 {
2122     GDBState *s;
2123     char buf[4];
2124
2125     s = gdbserver_state;
2126     if (gdbserver_fd < 0 || s->fd < 0) {
2127         return;
2128     }
2129
2130     snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb(sig));
2131     put_packet(s, buf);
2132 }
2133
2134 static void gdb_accept(void)
2135 {
2136     GDBState *s;
2137     struct sockaddr_in sockaddr;
2138     socklen_t len;
2139     int fd;
2140
2141     for(;;) {
2142         len = sizeof(sockaddr);
2143         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2144         if (fd < 0 && errno != EINTR) {
2145             perror("accept");
2146             return;
2147         } else if (fd >= 0) {
2148 #ifndef _WIN32
2149             fcntl(fd, F_SETFD, FD_CLOEXEC);
2150 #endif
2151             break;
2152         }
2153     }
2154
2155     /* set short latency */
2156     socket_set_nodelay(fd);
2157
2158     s = g_malloc0(sizeof(GDBState));
2159     s->c_cpu = first_cpu;
2160     s->g_cpu = first_cpu;
2161     s->fd = fd;
2162     gdb_has_xml = 0;
2163
2164     gdbserver_state = s;
2165
2166     fcntl(fd, F_SETFL, O_NONBLOCK);
2167 }
2168
2169 static int gdbserver_open(int port)
2170 {
2171     struct sockaddr_in sockaddr;
2172     int fd, val, ret;
2173
2174     fd = socket(PF_INET, SOCK_STREAM, 0);
2175     if (fd < 0) {
2176         perror("socket");
2177         return -1;
2178     }
2179 #ifndef _WIN32
2180     fcntl(fd, F_SETFD, FD_CLOEXEC);
2181 #endif
2182
2183     /* allow fast reuse */
2184     val = 1;
2185     qemu_setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val));
2186
2187     sockaddr.sin_family = AF_INET;
2188     sockaddr.sin_port = htons(port);
2189     sockaddr.sin_addr.s_addr = 0;
2190     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2191     if (ret < 0) {
2192         perror("bind");
2193         close(fd);
2194         return -1;
2195     }
2196     ret = listen(fd, 0);
2197     if (ret < 0) {
2198         perror("listen");
2199         close(fd);
2200         return -1;
2201     }
2202     return fd;
2203 }
2204
2205 int gdbserver_start(int port)
2206 {
2207     gdbserver_fd = gdbserver_open(port);
2208     if (gdbserver_fd < 0)
2209         return -1;
2210     /* accept connections */
2211     gdb_accept();
2212     return 0;
2213 }
2214
2215 /* Disable gdb stub for child processes.  */
2216 void gdbserver_fork(CPUArchState *env)
2217 {
2218     GDBState *s = gdbserver_state;
2219     if (gdbserver_fd < 0 || s->fd < 0)
2220       return;
2221     close(s->fd);
2222     s->fd = -1;
2223     cpu_breakpoint_remove_all(env, BP_GDB);
2224     cpu_watchpoint_remove_all(env, BP_GDB);
2225 }
2226 #else
2227 static int gdb_chr_can_receive(void *opaque)
2228 {
2229   /* We can handle an arbitrarily large amount of data.
2230    Pick the maximum packet size, which is as good as anything.  */
2231   return MAX_PACKET_LENGTH;
2232 }
2233
2234 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
2235 {
2236     int i;
2237
2238     for (i = 0; i < size; i++) {
2239         gdb_read_byte(gdbserver_state, buf[i]);
2240     }
2241 }
2242
2243 static void gdb_chr_event(void *opaque, int event)
2244 {
2245     switch (event) {
2246     case CHR_EVENT_OPENED:
2247         vm_stop(RUN_STATE_PAUSED);
2248         gdb_has_xml = 0;
2249         break;
2250     default:
2251         break;
2252     }
2253 }
2254
2255 static void gdb_monitor_output(GDBState *s, const char *msg, int len)
2256 {
2257     char buf[MAX_PACKET_LENGTH];
2258
2259     buf[0] = 'O';
2260     if (len > (MAX_PACKET_LENGTH/2) - 1)
2261         len = (MAX_PACKET_LENGTH/2) - 1;
2262     memtohex(buf + 1, (uint8_t *)msg, len);
2263     put_packet(s, buf);
2264 }
2265
2266 static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len)
2267 {
2268     const char *p = (const char *)buf;
2269     int max_sz;
2270
2271     max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
2272     for (;;) {
2273         if (len <= max_sz) {
2274             gdb_monitor_output(gdbserver_state, p, len);
2275             break;
2276         }
2277         gdb_monitor_output(gdbserver_state, p, max_sz);
2278         p += max_sz;
2279         len -= max_sz;
2280     }
2281     return len;
2282 }
2283
2284 #ifndef _WIN32
2285 static void gdb_sigterm_handler(int signal)
2286 {
2287     if (runstate_is_running()) {
2288         vm_stop(RUN_STATE_PAUSED);
2289     }
2290 }
2291 #endif
2292
2293 int gdbserver_start(const char *device)
2294 {
2295     GDBState *s;
2296     char gdbstub_device_name[128];
2297     CharDriverState *chr = NULL;
2298     CharDriverState *mon_chr;
2299
2300     if (!device)
2301         return -1;
2302     if (strcmp(device, "none") != 0) {
2303         if (strstart(device, "tcp:", NULL)) {
2304             /* enforce required TCP attributes */
2305             snprintf(gdbstub_device_name, sizeof(gdbstub_device_name),
2306                      "%s,nowait,nodelay,server", device);
2307             device = gdbstub_device_name;
2308         }
2309 #ifndef _WIN32
2310         else if (strcmp(device, "stdio") == 0) {
2311             struct sigaction act;
2312
2313             memset(&act, 0, sizeof(act));
2314             act.sa_handler = gdb_sigterm_handler;
2315             sigaction(SIGINT, &act, NULL);
2316         }
2317 #endif
2318         chr = qemu_chr_new("gdb", device, NULL);
2319         if (!chr)
2320             return -1;
2321
2322         qemu_chr_fe_claim_no_fail(chr);
2323         qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2324                               gdb_chr_event, NULL);
2325     }
2326
2327     s = gdbserver_state;
2328     if (!s) {
2329         s = g_malloc0(sizeof(GDBState));
2330         gdbserver_state = s;
2331
2332         qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
2333
2334         /* Initialize a monitor terminal for gdb */
2335         mon_chr = g_malloc0(sizeof(*mon_chr));
2336         mon_chr->chr_write = gdb_monitor_write;
2337         monitor_init(mon_chr, 0);
2338     } else {
2339         if (s->chr)
2340             qemu_chr_delete(s->chr);
2341         mon_chr = s->mon_chr;
2342         memset(s, 0, sizeof(GDBState));
2343     }
2344     s->c_cpu = first_cpu;
2345     s->g_cpu = first_cpu;
2346     s->chr = chr;
2347     s->state = chr ? RS_IDLE : RS_INACTIVE;
2348     s->mon_chr = mon_chr;
2349     s->current_syscall_cb = NULL;
2350
2351     return 0;
2352 }
2353 #endif