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Fix format specified for watchpoint address.
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1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #endif
34
35 #include "qemu_socket.h"
36 #ifdef _WIN32
37 /* XXX: these constants may be independent of the host ones even for Unix */
38 #ifndef SIGTRAP
39 #define SIGTRAP 5
40 #endif
41 #ifndef SIGINT
42 #define SIGINT 2
43 #endif
44 #else
45 #include <signal.h>
46 #endif
47
48 //#define DEBUG_GDB
49
50 enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
55 RS_SYSCALL,
56 };
57 typedef struct GDBState {
58 CPUState *env; /* current CPU */
59 enum RSState state; /* parsing state */
60 char line_buf[4096];
61 int line_buf_index;
62 int line_csum;
63 char last_packet[4100];
64 int last_packet_len;
65 #ifdef CONFIG_USER_ONLY
66 int fd;
67 int running_state;
68 #else
69 CharDriverState *chr;
70 #endif
71 } GDBState;
72
73 #ifdef CONFIG_USER_ONLY
74 /* XXX: This is not thread safe. Do we care? */
75 static int gdbserver_fd = -1;
76
77 /* XXX: remove this hack. */
78 static GDBState gdbserver_state;
79
80 static int get_char(GDBState *s)
81 {
82 uint8_t ch;
83 int ret;
84
85 for(;;) {
86 ret = recv(s->fd, &ch, 1, 0);
87 if (ret < 0) {
88 if (errno != EINTR && errno != EAGAIN)
89 return -1;
90 } else if (ret == 0) {
91 return -1;
92 } else {
93 break;
94 }
95 }
96 return ch;
97 }
98 #endif
99
100 /* GDB stub state for use by semihosting syscalls. */
101 static GDBState *gdb_syscall_state;
102 static gdb_syscall_complete_cb gdb_current_syscall_cb;
103
104 enum {
105 GDB_SYS_UNKNOWN,
106 GDB_SYS_ENABLED,
107 GDB_SYS_DISABLED,
108 } gdb_syscall_mode;
109
110 /* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112 int use_gdb_syscalls(void)
113 {
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116 : GDB_SYS_DISABLED);
117 }
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
119 }
120
121 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
122 {
123 #ifdef CONFIG_USER_ONLY
124 int ret;
125
126 while (len > 0) {
127 ret = send(s->fd, buf, len, 0);
128 if (ret < 0) {
129 if (errno != EINTR && errno != EAGAIN)
130 return;
131 } else {
132 buf += ret;
133 len -= ret;
134 }
135 }
136 #else
137 qemu_chr_write(s->chr, buf, len);
138 #endif
139 }
140
141 static inline int fromhex(int v)
142 {
143 if (v >= '0' && v <= '9')
144 return v - '0';
145 else if (v >= 'A' && v <= 'F')
146 return v - 'A' + 10;
147 else if (v >= 'a' && v <= 'f')
148 return v - 'a' + 10;
149 else
150 return 0;
151 }
152
153 static inline int tohex(int v)
154 {
155 if (v < 10)
156 return v + '0';
157 else
158 return v - 10 + 'a';
159 }
160
161 static void memtohex(char *buf, const uint8_t *mem, int len)
162 {
163 int i, c;
164 char *q;
165 q = buf;
166 for(i = 0; i < len; i++) {
167 c = mem[i];
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
170 }
171 *q = '\0';
172 }
173
174 static void hextomem(uint8_t *mem, const char *buf, int len)
175 {
176 int i;
177
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180 buf += 2;
181 }
182 }
183
184 /* return -1 if error, 0 if OK */
185 static int put_packet(GDBState *s, char *buf)
186 {
187 int len, csum, i;
188 char *p;
189
190 #ifdef DEBUG_GDB
191 printf("reply='%s'\n", buf);
192 #endif
193
194 for(;;) {
195 p = s->last_packet;
196 *(p++) = '$';
197 len = strlen(buf);
198 memcpy(p, buf, len);
199 p += len;
200 csum = 0;
201 for(i = 0; i < len; i++) {
202 csum += buf[i];
203 }
204 *(p++) = '#';
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
207
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
210
211 #ifdef CONFIG_USER_ONLY
212 i = get_char(s);
213 if (i < 0)
214 return -1;
215 if (i == '+')
216 break;
217 #else
218 break;
219 #endif
220 }
221 return 0;
222 }
223
224 #if defined(TARGET_I386)
225
226 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
227 {
228 uint32_t *registers = (uint32_t *)mem_buf;
229 int i, fpus;
230
231 for(i = 0; i < 8; i++) {
232 registers[i] = env->regs[i];
233 }
234 registers[8] = env->eip;
235 registers[9] = env->eflags;
236 registers[10] = env->segs[R_CS].selector;
237 registers[11] = env->segs[R_SS].selector;
238 registers[12] = env->segs[R_DS].selector;
239 registers[13] = env->segs[R_ES].selector;
240 registers[14] = env->segs[R_FS].selector;
241 registers[15] = env->segs[R_GS].selector;
242 /* XXX: convert floats */
243 for(i = 0; i < 8; i++) {
244 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
245 }
246 registers[36] = env->fpuc;
247 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
248 registers[37] = fpus;
249 registers[38] = 0; /* XXX: convert tags */
250 registers[39] = 0; /* fiseg */
251 registers[40] = 0; /* fioff */
252 registers[41] = 0; /* foseg */
253 registers[42] = 0; /* fooff */
254 registers[43] = 0; /* fop */
255
256 for(i = 0; i < 16; i++)
257 tswapls(&registers[i]);
258 for(i = 36; i < 44; i++)
259 tswapls(&registers[i]);
260 return 44 * 4;
261 }
262
263 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
264 {
265 uint32_t *registers = (uint32_t *)mem_buf;
266 int i;
267
268 for(i = 0; i < 8; i++) {
269 env->regs[i] = tswapl(registers[i]);
270 }
271 env->eip = tswapl(registers[8]);
272 env->eflags = tswapl(registers[9]);
273 #if defined(CONFIG_USER_ONLY)
274 #define LOAD_SEG(index, sreg)\
275 if (tswapl(registers[index]) != env->segs[sreg].selector)\
276 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
277 LOAD_SEG(10, R_CS);
278 LOAD_SEG(11, R_SS);
279 LOAD_SEG(12, R_DS);
280 LOAD_SEG(13, R_ES);
281 LOAD_SEG(14, R_FS);
282 LOAD_SEG(15, R_GS);
283 #endif
284 }
285
286 #elif defined (TARGET_PPC)
287 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
288 {
289 uint32_t *registers = (uint32_t *)mem_buf, tmp;
290 int i;
291
292 /* fill in gprs */
293 for(i = 0; i < 32; i++) {
294 registers[i] = tswapl(env->gpr[i]);
295 }
296 /* fill in fprs */
297 for (i = 0; i < 32; i++) {
298 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
299 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
300 }
301 /* nip, msr, ccr, lnk, ctr, xer, mq */
302 registers[96] = tswapl(env->nip);
303 registers[97] = tswapl(do_load_msr(env));
304 tmp = 0;
305 for (i = 0; i < 8; i++)
306 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
307 registers[98] = tswapl(tmp);
308 registers[99] = tswapl(env->lr);
309 registers[100] = tswapl(env->ctr);
310 registers[101] = tswapl(ppc_load_xer(env));
311 registers[102] = 0;
312
313 return 103 * 4;
314 }
315
316 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
317 {
318 uint32_t *registers = (uint32_t *)mem_buf;
319 int i;
320
321 /* fill in gprs */
322 for (i = 0; i < 32; i++) {
323 env->gpr[i] = tswapl(registers[i]);
324 }
325 /* fill in fprs */
326 for (i = 0; i < 32; i++) {
327 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
328 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
329 }
330 /* nip, msr, ccr, lnk, ctr, xer, mq */
331 env->nip = tswapl(registers[96]);
332 do_store_msr(env, tswapl(registers[97]));
333 registers[98] = tswapl(registers[98]);
334 for (i = 0; i < 8; i++)
335 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
336 env->lr = tswapl(registers[99]);
337 env->ctr = tswapl(registers[100]);
338 ppc_store_xer(env, tswapl(registers[101]));
339 }
340 #elif defined (TARGET_SPARC)
341 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
342 {
343 target_ulong *registers = (target_ulong *)mem_buf;
344 int i;
345
346 /* fill in g0..g7 */
347 for(i = 0; i < 8; i++) {
348 registers[i] = tswapl(env->gregs[i]);
349 }
350 /* fill in register window */
351 for(i = 0; i < 24; i++) {
352 registers[i + 8] = tswapl(env->regwptr[i]);
353 }
354 #ifndef TARGET_SPARC64
355 /* fill in fprs */
356 for (i = 0; i < 32; i++) {
357 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
358 }
359 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
360 registers[64] = tswapl(env->y);
361 {
362 target_ulong tmp;
363
364 tmp = GET_PSR(env);
365 registers[65] = tswapl(tmp);
366 }
367 registers[66] = tswapl(env->wim);
368 registers[67] = tswapl(env->tbr);
369 registers[68] = tswapl(env->pc);
370 registers[69] = tswapl(env->npc);
371 registers[70] = tswapl(env->fsr);
372 registers[71] = 0; /* csr */
373 registers[72] = 0;
374 return 73 * sizeof(target_ulong);
375 #else
376 /* fill in fprs */
377 for (i = 0; i < 64; i += 2) {
378 uint64_t tmp;
379
380 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
381 tmp |= *(uint32_t *)&env->fpr[i + 1];
382 registers[i / 2 + 32] = tswap64(tmp);
383 }
384 registers[64] = tswapl(env->pc);
385 registers[65] = tswapl(env->npc);
386 registers[66] = tswapl(env->tstate[env->tl]);
387 registers[67] = tswapl(env->fsr);
388 registers[68] = tswapl(env->fprs);
389 registers[69] = tswapl(env->y);
390 return 70 * sizeof(target_ulong);
391 #endif
392 }
393
394 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
395 {
396 target_ulong *registers = (target_ulong *)mem_buf;
397 int i;
398
399 /* fill in g0..g7 */
400 for(i = 0; i < 7; i++) {
401 env->gregs[i] = tswapl(registers[i]);
402 }
403 /* fill in register window */
404 for(i = 0; i < 24; i++) {
405 env->regwptr[i] = tswapl(registers[i + 8]);
406 }
407 #ifndef TARGET_SPARC64
408 /* fill in fprs */
409 for (i = 0; i < 32; i++) {
410 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
411 }
412 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
413 env->y = tswapl(registers[64]);
414 PUT_PSR(env, tswapl(registers[65]));
415 env->wim = tswapl(registers[66]);
416 env->tbr = tswapl(registers[67]);
417 env->pc = tswapl(registers[68]);
418 env->npc = tswapl(registers[69]);
419 env->fsr = tswapl(registers[70]);
420 #else
421 for (i = 0; i < 64; i += 2) {
422 uint64_t tmp;
423
424 tmp = tswap64(registers[i / 2 + 32]);
425 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
426 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
427 }
428 env->pc = tswapl(registers[64]);
429 env->npc = tswapl(registers[65]);
430 env->tstate[env->tl] = tswapl(registers[66]);
431 env->fsr = tswapl(registers[67]);
432 env->fprs = tswapl(registers[68]);
433 env->y = tswapl(registers[69]);
434 #endif
435 }
436 #elif defined (TARGET_ARM)
437 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
438 {
439 int i;
440 uint8_t *ptr;
441
442 ptr = mem_buf;
443 /* 16 core integer registers (4 bytes each). */
444 for (i = 0; i < 16; i++)
445 {
446 *(uint32_t *)ptr = tswapl(env->regs[i]);
447 ptr += 4;
448 }
449 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
450 Not yet implemented. */
451 memset (ptr, 0, 8 * 12 + 4);
452 ptr += 8 * 12 + 4;
453 /* CPSR (4 bytes). */
454 *(uint32_t *)ptr = tswapl (cpsr_read(env));
455 ptr += 4;
456
457 return ptr - mem_buf;
458 }
459
460 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
461 {
462 int i;
463 uint8_t *ptr;
464
465 ptr = mem_buf;
466 /* Core integer registers. */
467 for (i = 0; i < 16; i++)
468 {
469 env->regs[i] = tswapl(*(uint32_t *)ptr);
470 ptr += 4;
471 }
472 /* Ignore FPA regs and scr. */
473 ptr += 8 * 12 + 4;
474 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
475 }
476 #elif defined (TARGET_M68K)
477 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
478 {
479 int i;
480 uint8_t *ptr;
481 CPU_DoubleU u;
482
483 ptr = mem_buf;
484 /* D0-D7 */
485 for (i = 0; i < 8; i++) {
486 *(uint32_t *)ptr = tswapl(env->dregs[i]);
487 ptr += 4;
488 }
489 /* A0-A7 */
490 for (i = 0; i < 8; i++) {
491 *(uint32_t *)ptr = tswapl(env->aregs[i]);
492 ptr += 4;
493 }
494 *(uint32_t *)ptr = tswapl(env->sr);
495 ptr += 4;
496 *(uint32_t *)ptr = tswapl(env->pc);
497 ptr += 4;
498 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
499 ColdFire has 8-bit double precision registers. */
500 for (i = 0; i < 8; i++) {
501 u.d = env->fregs[i];
502 *(uint32_t *)ptr = tswap32(u.l.upper);
503 *(uint32_t *)ptr = tswap32(u.l.lower);
504 }
505 /* FP control regs (not implemented). */
506 memset (ptr, 0, 3 * 4);
507 ptr += 3 * 4;
508
509 return ptr - mem_buf;
510 }
511
512 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
513 {
514 int i;
515 uint8_t *ptr;
516 CPU_DoubleU u;
517
518 ptr = mem_buf;
519 /* D0-D7 */
520 for (i = 0; i < 8; i++) {
521 env->dregs[i] = tswapl(*(uint32_t *)ptr);
522 ptr += 4;
523 }
524 /* A0-A7 */
525 for (i = 0; i < 8; i++) {
526 env->aregs[i] = tswapl(*(uint32_t *)ptr);
527 ptr += 4;
528 }
529 env->sr = tswapl(*(uint32_t *)ptr);
530 ptr += 4;
531 env->pc = tswapl(*(uint32_t *)ptr);
532 ptr += 4;
533 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
534 ColdFire has 8-bit double precision registers. */
535 for (i = 0; i < 8; i++) {
536 u.l.upper = tswap32(*(uint32_t *)ptr);
537 u.l.lower = tswap32(*(uint32_t *)ptr);
538 env->fregs[i] = u.d;
539 }
540 /* FP control regs (not implemented). */
541 ptr += 3 * 4;
542 }
543 #elif defined (TARGET_MIPS)
544 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
545 {
546 int i;
547 uint8_t *ptr;
548
549 ptr = mem_buf;
550 for (i = 0; i < 32; i++)
551 {
552 *(uint32_t *)ptr = tswapl(env->gpr[i]);
553 ptr += 4;
554 }
555
556 *(uint32_t *)ptr = tswapl(env->CP0_Status);
557 ptr += 4;
558
559 *(uint32_t *)ptr = tswapl(env->LO);
560 ptr += 4;
561
562 *(uint32_t *)ptr = tswapl(env->HI);
563 ptr += 4;
564
565 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
566 ptr += 4;
567
568 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
569 ptr += 4;
570
571 *(uint32_t *)ptr = tswapl(env->PC);
572 ptr += 4;
573
574 if (env->CP0_Config1 & (1 << CP0C1_FP))
575 {
576 for (i = 0; i < 32; i++)
577 {
578 *(uint32_t *)ptr = tswapl(FPR_W (env, i));
579 ptr += 4;
580 }
581
582 *(uint32_t *)ptr = tswapl(env->fcr31);
583 ptr += 4;
584
585 *(uint32_t *)ptr = tswapl(env->fcr0);
586 ptr += 4;
587 }
588
589 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
590 /* what's 'fp' mean here? */
591
592 return ptr - mem_buf;
593 }
594
595 /* convert MIPS rounding mode in FCR31 to IEEE library */
596 static unsigned int ieee_rm[] =
597 {
598 float_round_nearest_even,
599 float_round_to_zero,
600 float_round_up,
601 float_round_down
602 };
603 #define RESTORE_ROUNDING_MODE \
604 set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
605
606 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
607 {
608 int i;
609 uint8_t *ptr;
610
611 ptr = mem_buf;
612 for (i = 0; i < 32; i++)
613 {
614 env->gpr[i] = tswapl(*(uint32_t *)ptr);
615 ptr += 4;
616 }
617
618 env->CP0_Status = tswapl(*(uint32_t *)ptr);
619 ptr += 4;
620
621 env->LO = tswapl(*(uint32_t *)ptr);
622 ptr += 4;
623
624 env->HI = tswapl(*(uint32_t *)ptr);
625 ptr += 4;
626
627 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
628 ptr += 4;
629
630 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
631 ptr += 4;
632
633 env->PC = tswapl(*(uint32_t *)ptr);
634 ptr += 4;
635
636 if (env->CP0_Config1 & (1 << CP0C1_FP))
637 {
638 for (i = 0; i < 32; i++)
639 {
640 FPR_W (env, i) = tswapl(*(uint32_t *)ptr);
641 ptr += 4;
642 }
643
644 env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF;
645 ptr += 4;
646
647 env->fcr0 = tswapl(*(uint32_t *)ptr);
648 ptr += 4;
649
650 /* set rounding mode */
651 RESTORE_ROUNDING_MODE;
652
653 #ifndef CONFIG_SOFTFLOAT
654 /* no floating point exception for native float */
655 SET_FP_ENABLE(env->fcr31, 0);
656 #endif
657 }
658 }
659 #elif defined (TARGET_SH4)
660 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
661 {
662 uint32_t *ptr = (uint32_t *)mem_buf;
663 int i;
664
665 #define SAVE(x) *ptr++=tswapl(x)
666 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
667 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
668 } else {
669 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
670 }
671 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
672 SAVE (env->pc);
673 SAVE (env->pr);
674 SAVE (env->gbr);
675 SAVE (env->vbr);
676 SAVE (env->mach);
677 SAVE (env->macl);
678 SAVE (env->sr);
679 SAVE (0); /* TICKS */
680 SAVE (0); /* STALLS */
681 SAVE (0); /* CYCLES */
682 SAVE (0); /* INSTS */
683 SAVE (0); /* PLR */
684
685 return ((uint8_t *)ptr - mem_buf);
686 }
687
688 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
689 {
690 uint32_t *ptr = (uint32_t *)mem_buf;
691 int i;
692
693 #define LOAD(x) (x)=*ptr++;
694 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
695 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
696 } else {
697 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
698 }
699 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
700 LOAD (env->pc);
701 LOAD (env->pr);
702 LOAD (env->gbr);
703 LOAD (env->vbr);
704 LOAD (env->mach);
705 LOAD (env->macl);
706 LOAD (env->sr);
707 }
708 #else
709 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
710 {
711 return 0;
712 }
713
714 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
715 {
716 }
717
718 #endif
719
720 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
721 {
722 const char *p;
723 int ch, reg_size, type;
724 char buf[4096];
725 uint8_t mem_buf[2000];
726 uint32_t *registers;
727 target_ulong addr, len;
728
729 #ifdef DEBUG_GDB
730 printf("command='%s'\n", line_buf);
731 #endif
732 p = line_buf;
733 ch = *p++;
734 switch(ch) {
735 case '?':
736 /* TODO: Make this return the correct value for user-mode. */
737 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
738 put_packet(s, buf);
739 break;
740 case 'c':
741 if (*p != '\0') {
742 addr = strtoull(p, (char **)&p, 16);
743 #if defined(TARGET_I386)
744 env->eip = addr;
745 #elif defined (TARGET_PPC)
746 env->nip = addr;
747 #elif defined (TARGET_SPARC)
748 env->pc = addr;
749 env->npc = addr + 4;
750 #elif defined (TARGET_ARM)
751 env->regs[15] = addr;
752 #elif defined (TARGET_SH4)
753 env->pc = addr;
754 #endif
755 }
756 #ifdef CONFIG_USER_ONLY
757 s->running_state = 1;
758 #else
759 vm_start();
760 #endif
761 return RS_IDLE;
762 case 's':
763 if (*p != '\0') {
764 addr = strtoul(p, (char **)&p, 16);
765 #if defined(TARGET_I386)
766 env->eip = addr;
767 #elif defined (TARGET_PPC)
768 env->nip = addr;
769 #elif defined (TARGET_SPARC)
770 env->pc = addr;
771 env->npc = addr + 4;
772 #elif defined (TARGET_ARM)
773 env->regs[15] = addr;
774 #elif defined (TARGET_SH4)
775 env->pc = addr;
776 #endif
777 }
778 cpu_single_step(env, 1);
779 #ifdef CONFIG_USER_ONLY
780 s->running_state = 1;
781 #else
782 vm_start();
783 #endif
784 return RS_IDLE;
785 case 'F':
786 {
787 target_ulong ret;
788 target_ulong err;
789
790 ret = strtoull(p, (char **)&p, 16);
791 if (*p == ',') {
792 p++;
793 err = strtoull(p, (char **)&p, 16);
794 } else {
795 err = 0;
796 }
797 if (*p == ',')
798 p++;
799 type = *p;
800 if (gdb_current_syscall_cb)
801 gdb_current_syscall_cb(s->env, ret, err);
802 if (type == 'C') {
803 put_packet(s, "T02");
804 } else {
805 #ifdef CONFIG_USER_ONLY
806 s->running_state = 1;
807 #else
808 vm_start();
809 #endif
810 }
811 }
812 break;
813 case 'g':
814 reg_size = cpu_gdb_read_registers(env, mem_buf);
815 memtohex(buf, mem_buf, reg_size);
816 put_packet(s, buf);
817 break;
818 case 'G':
819 registers = (void *)mem_buf;
820 len = strlen(p) / 2;
821 hextomem((uint8_t *)registers, p, len);
822 cpu_gdb_write_registers(env, mem_buf, len);
823 put_packet(s, "OK");
824 break;
825 case 'm':
826 addr = strtoull(p, (char **)&p, 16);
827 if (*p == ',')
828 p++;
829 len = strtoull(p, NULL, 16);
830 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
831 put_packet (s, "E14");
832 } else {
833 memtohex(buf, mem_buf, len);
834 put_packet(s, buf);
835 }
836 break;
837 case 'M':
838 addr = strtoull(p, (char **)&p, 16);
839 if (*p == ',')
840 p++;
841 len = strtoull(p, (char **)&p, 16);
842 if (*p == ':')
843 p++;
844 hextomem(mem_buf, p, len);
845 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
846 put_packet(s, "E14");
847 else
848 put_packet(s, "OK");
849 break;
850 case 'Z':
851 type = strtoul(p, (char **)&p, 16);
852 if (*p == ',')
853 p++;
854 addr = strtoull(p, (char **)&p, 16);
855 if (*p == ',')
856 p++;
857 len = strtoull(p, (char **)&p, 16);
858 if (type == 0 || type == 1) {
859 if (cpu_breakpoint_insert(env, addr) < 0)
860 goto breakpoint_error;
861 put_packet(s, "OK");
862 #ifndef CONFIG_USER_ONLY
863 } else if (type == 2) {
864 if (cpu_watchpoint_insert(env, addr) < 0)
865 goto breakpoint_error;
866 put_packet(s, "OK");
867 #endif
868 } else {
869 breakpoint_error:
870 put_packet(s, "E22");
871 }
872 break;
873 case 'z':
874 type = strtoul(p, (char **)&p, 16);
875 if (*p == ',')
876 p++;
877 addr = strtoull(p, (char **)&p, 16);
878 if (*p == ',')
879 p++;
880 len = strtoull(p, (char **)&p, 16);
881 if (type == 0 || type == 1) {
882 cpu_breakpoint_remove(env, addr);
883 put_packet(s, "OK");
884 #ifndef CONFIG_USER_ONLY
885 } else if (type == 2) {
886 cpu_watchpoint_remove(env, addr);
887 put_packet(s, "OK");
888 #endif
889 } else {
890 goto breakpoint_error;
891 }
892 break;
893 #ifdef CONFIG_LINUX_USER
894 case 'q':
895 if (strncmp(p, "Offsets", 7) == 0) {
896 TaskState *ts = env->opaque;
897
898 sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
899 ts->info->data_offset, ts->info->data_offset);
900 put_packet(s, buf);
901 break;
902 }
903 /* Fall through. */
904 #endif
905 default:
906 // unknown_command:
907 /* put empty packet */
908 buf[0] = '\0';
909 put_packet(s, buf);
910 break;
911 }
912 return RS_IDLE;
913 }
914
915 extern void tb_flush(CPUState *env);
916
917 #ifndef CONFIG_USER_ONLY
918 static void gdb_vm_stopped(void *opaque, int reason)
919 {
920 GDBState *s = opaque;
921 char buf[256];
922 int ret;
923
924 if (s->state == RS_SYSCALL)
925 return;
926
927 /* disable single step if it was enable */
928 cpu_single_step(s->env, 0);
929
930 if (reason == EXCP_DEBUG) {
931 if (s->env->watchpoint_hit) {
932 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
933 SIGTRAP,
934 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
935 put_packet(s, buf);
936 s->env->watchpoint_hit = 0;
937 return;
938 }
939 tb_flush(s->env);
940 ret = SIGTRAP;
941 } else if (reason == EXCP_INTERRUPT) {
942 ret = SIGINT;
943 } else {
944 ret = 0;
945 }
946 snprintf(buf, sizeof(buf), "S%02x", ret);
947 put_packet(s, buf);
948 }
949 #endif
950
951 /* Send a gdb syscall request.
952 This accepts limited printf-style format specifiers, specifically:
953 %x - target_ulong argument printed in hex.
954 %s - string pointer (target_ulong) and length (int) pair. */
955 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
956 {
957 va_list va;
958 char buf[256];
959 char *p;
960 target_ulong addr;
961 GDBState *s;
962
963 s = gdb_syscall_state;
964 if (!s)
965 return;
966 gdb_current_syscall_cb = cb;
967 s->state = RS_SYSCALL;
968 #ifndef CONFIG_USER_ONLY
969 vm_stop(EXCP_DEBUG);
970 #endif
971 s->state = RS_IDLE;
972 va_start(va, fmt);
973 p = buf;
974 *(p++) = 'F';
975 while (*fmt) {
976 if (*fmt == '%') {
977 fmt++;
978 switch (*fmt++) {
979 case 'x':
980 addr = va_arg(va, target_ulong);
981 p += sprintf(p, TARGET_FMT_lx, addr);
982 break;
983 case 's':
984 addr = va_arg(va, target_ulong);
985 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
986 break;
987 default:
988 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
989 fmt - 1);
990 break;
991 }
992 } else {
993 *(p++) = *(fmt++);
994 }
995 }
996 va_end(va);
997 put_packet(s, buf);
998 #ifdef CONFIG_USER_ONLY
999 gdb_handlesig(s->env, 0);
1000 #else
1001 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1002 #endif
1003 }
1004
1005 static void gdb_read_byte(GDBState *s, int ch)
1006 {
1007 CPUState *env = s->env;
1008 int i, csum;
1009 char reply[1];
1010
1011 #ifndef CONFIG_USER_ONLY
1012 if (s->last_packet_len) {
1013 /* Waiting for a response to the last packet. If we see the start
1014 of a new command then abandon the previous response. */
1015 if (ch == '-') {
1016 #ifdef DEBUG_GDB
1017 printf("Got NACK, retransmitting\n");
1018 #endif
1019 put_buffer(s, s->last_packet, s->last_packet_len);
1020 }
1021 #ifdef DEBUG_GDB
1022 else if (ch == '+')
1023 printf("Got ACK\n");
1024 else
1025 printf("Got '%c' when expecting ACK/NACK\n", ch);
1026 #endif
1027 if (ch == '+' || ch == '$')
1028 s->last_packet_len = 0;
1029 if (ch != '$')
1030 return;
1031 }
1032 if (vm_running) {
1033 /* when the CPU is running, we cannot do anything except stop
1034 it when receiving a char */
1035 vm_stop(EXCP_INTERRUPT);
1036 } else
1037 #endif
1038 {
1039 switch(s->state) {
1040 case RS_IDLE:
1041 if (ch == '$') {
1042 s->line_buf_index = 0;
1043 s->state = RS_GETLINE;
1044 }
1045 break;
1046 case RS_GETLINE:
1047 if (ch == '#') {
1048 s->state = RS_CHKSUM1;
1049 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1050 s->state = RS_IDLE;
1051 } else {
1052 s->line_buf[s->line_buf_index++] = ch;
1053 }
1054 break;
1055 case RS_CHKSUM1:
1056 s->line_buf[s->line_buf_index] = '\0';
1057 s->line_csum = fromhex(ch) << 4;
1058 s->state = RS_CHKSUM2;
1059 break;
1060 case RS_CHKSUM2:
1061 s->line_csum |= fromhex(ch);
1062 csum = 0;
1063 for(i = 0; i < s->line_buf_index; i++) {
1064 csum += s->line_buf[i];
1065 }
1066 if (s->line_csum != (csum & 0xff)) {
1067 reply[0] = '-';
1068 put_buffer(s, reply, 1);
1069 s->state = RS_IDLE;
1070 } else {
1071 reply[0] = '+';
1072 put_buffer(s, reply, 1);
1073 s->state = gdb_handle_packet(s, env, s->line_buf);
1074 }
1075 break;
1076 default:
1077 abort();
1078 }
1079 }
1080 }
1081
1082 #ifdef CONFIG_USER_ONLY
1083 int
1084 gdb_handlesig (CPUState *env, int sig)
1085 {
1086 GDBState *s;
1087 char buf[256];
1088 int n;
1089
1090 if (gdbserver_fd < 0)
1091 return sig;
1092
1093 s = &gdbserver_state;
1094
1095 /* disable single step if it was enabled */
1096 cpu_single_step(env, 0);
1097 tb_flush(env);
1098
1099 if (sig != 0)
1100 {
1101 snprintf(buf, sizeof(buf), "S%02x", sig);
1102 put_packet(s, buf);
1103 }
1104
1105 sig = 0;
1106 s->state = RS_IDLE;
1107 s->running_state = 0;
1108 while (s->running_state == 0) {
1109 n = read (s->fd, buf, 256);
1110 if (n > 0)
1111 {
1112 int i;
1113
1114 for (i = 0; i < n; i++)
1115 gdb_read_byte (s, buf[i]);
1116 }
1117 else if (n == 0 || errno != EAGAIN)
1118 {
1119 /* XXX: Connection closed. Should probably wait for annother
1120 connection before continuing. */
1121 return sig;
1122 }
1123 }
1124 return sig;
1125 }
1126
1127 /* Tell the remote gdb that the process has exited. */
1128 void gdb_exit(CPUState *env, int code)
1129 {
1130 GDBState *s;
1131 char buf[4];
1132
1133 if (gdbserver_fd < 0)
1134 return;
1135
1136 s = &gdbserver_state;
1137
1138 snprintf(buf, sizeof(buf), "W%02x", code);
1139 put_packet(s, buf);
1140 }
1141
1142
1143 static void gdb_accept(void *opaque)
1144 {
1145 GDBState *s;
1146 struct sockaddr_in sockaddr;
1147 socklen_t len;
1148 int val, fd;
1149
1150 for(;;) {
1151 len = sizeof(sockaddr);
1152 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1153 if (fd < 0 && errno != EINTR) {
1154 perror("accept");
1155 return;
1156 } else if (fd >= 0) {
1157 break;
1158 }
1159 }
1160
1161 /* set short latency */
1162 val = 1;
1163 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1164
1165 s = &gdbserver_state;
1166 memset (s, 0, sizeof (GDBState));
1167 s->env = first_cpu; /* XXX: allow to change CPU */
1168 s->fd = fd;
1169
1170 gdb_syscall_state = s;
1171
1172 fcntl(fd, F_SETFL, O_NONBLOCK);
1173 }
1174
1175 static int gdbserver_open(int port)
1176 {
1177 struct sockaddr_in sockaddr;
1178 int fd, val, ret;
1179
1180 fd = socket(PF_INET, SOCK_STREAM, 0);
1181 if (fd < 0) {
1182 perror("socket");
1183 return -1;
1184 }
1185
1186 /* allow fast reuse */
1187 val = 1;
1188 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1189
1190 sockaddr.sin_family = AF_INET;
1191 sockaddr.sin_port = htons(port);
1192 sockaddr.sin_addr.s_addr = 0;
1193 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1194 if (ret < 0) {
1195 perror("bind");
1196 return -1;
1197 }
1198 ret = listen(fd, 0);
1199 if (ret < 0) {
1200 perror("listen");
1201 return -1;
1202 }
1203 return fd;
1204 }
1205
1206 int gdbserver_start(int port)
1207 {
1208 gdbserver_fd = gdbserver_open(port);
1209 if (gdbserver_fd < 0)
1210 return -1;
1211 /* accept connections */
1212 gdb_accept (NULL);
1213 return 0;
1214 }
1215 #else
1216 static int gdb_chr_can_recieve(void *opaque)
1217 {
1218 return 1;
1219 }
1220
1221 static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
1222 {
1223 GDBState *s = opaque;
1224 int i;
1225
1226 for (i = 0; i < size; i++) {
1227 gdb_read_byte(s, buf[i]);
1228 }
1229 }
1230
1231 static void gdb_chr_event(void *opaque, int event)
1232 {
1233 switch (event) {
1234 case CHR_EVENT_RESET:
1235 vm_stop(EXCP_INTERRUPT);
1236 gdb_syscall_state = opaque;
1237 break;
1238 default:
1239 break;
1240 }
1241 }
1242
1243 int gdbserver_start(const char *port)
1244 {
1245 GDBState *s;
1246 char gdbstub_port_name[128];
1247 int port_num;
1248 char *p;
1249 CharDriverState *chr;
1250
1251 if (!port || !*port)
1252 return -1;
1253
1254 port_num = strtol(port, &p, 10);
1255 if (*p == 0) {
1256 /* A numeric value is interpreted as a port number. */
1257 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1258 "tcp::%d,nowait,nodelay,server", port_num);
1259 port = gdbstub_port_name;
1260 }
1261
1262 chr = qemu_chr_open(port);
1263 if (!chr)
1264 return -1;
1265
1266 s = qemu_mallocz(sizeof(GDBState));
1267 if (!s) {
1268 return -1;
1269 }
1270 s->env = first_cpu; /* XXX: allow to change CPU */
1271 s->chr = chr;
1272 qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
1273 gdb_chr_event, s);
1274 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1275 return 0;
1276 }
1277 #endif