gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "vl.h"
  33 #endif
  34
  35 #include "qemu_socket.h"
  36 #ifdef _WIN32
  37 /* XXX: these constants may be independent of the host ones even for Unix */
  38 #ifndef SIGTRAP
  39 #define SIGTRAP 5
  40 #endif
  41 #ifndef SIGINT
  42 #define SIGINT 2
  43 #endif
  44 #else
  45 #include <signal.h>
  46 #endif
  47
  48 //#define DEBUG_GDB
  49
  50 enum RSState {
  51     RS_IDLE,
  52     RS_GETLINE,
  53     RS_CHKSUM1,
  54     RS_CHKSUM2,
  55 };
  56 /* XXX: This is not thread safe.  Do we care?  */
  57 static int gdbserver_fd = -1;
  58
  59 typedef struct GDBState {
  60     CPUState *env; /* current CPU */
  61     enum RSState state; /* parsing state */
  62     int fd;
  63     char line_buf[4096];
  64     int line_buf_index;
  65     int line_csum;
  66 #ifdef CONFIG_USER_ONLY
  67     int running_state;
  68 #endif
  69 } GDBState;
  70
  71 #ifdef CONFIG_USER_ONLY
  72 /* XXX: remove this hack.  */
  73 static GDBState gdbserver_state;
  74 #endif
  75
  76 static int get_char(GDBState *s)
  77 {
  78     uint8_t ch;
  79     int ret;
  80
  81     for(;;) {
  82         ret = recv(s->fd, &ch, 1, 0);
  83         if (ret < 0) {
  84             if (errno != EINTR && errno != EAGAIN)
  85                 return -1;
  86         } else if (ret == 0) {
  87             return -1;
  88         } else {
  89             break;
  90         }
  91     }
  92     return ch;
  93 }
  94
  95 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
  96 {
  97     int ret;
  98
  99     while (len > 0) {
 100         ret = send(s->fd, buf, len, 0);
 101         if (ret < 0) {
 102             if (errno != EINTR && errno != EAGAIN)
 103                 return;
 104         } else {
 105             buf += ret;
 106             len -= ret;
 107         }
 108     }
 109 }
 110
 111 static inline int fromhex(int v)
 112 {
 113     if (v >= '0' && v <= '9')
 114         return v - '0';
 115     else if (v >= 'A' && v <= 'F')
 116         return v - 'A' + 10;
 117     else if (v >= 'a' && v <= 'f')
 118         return v - 'a' + 10;
 119     else
 120         return 0;
 121 }
 122
 123 static inline int tohex(int v)
 124 {
 125     if (v < 10)
 126         return v + '0';
 127     else
 128         return v - 10 + 'a';
 129 }
 130
 131 static void memtohex(char *buf, const uint8_t *mem, int len)
 132 {
 133     int i, c;
 134     char *q;
 135     q = buf;
 136     for(i = 0; i < len; i++) {
 137         c = mem[i];
 138         *q++ = tohex(c >> 4);
 139         *q++ = tohex(c & 0xf);
 140     }
 141     *q = '\0';
 142 }
 143
 144 static void hextomem(uint8_t *mem, const char *buf, int len)
 145 {
 146     int i;
 147
 148     for(i = 0; i < len; i++) {
 149         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 150         buf += 2;
 151     }
 152 }
 153
 154 /* return -1 if error, 0 if OK */
 155 static int put_packet(GDBState *s, char *buf)
 156 {
 157     char buf1[3];
 158     int len, csum, ch, i;
 159
 160 #ifdef DEBUG_GDB
 161     printf("reply='%s'\n", buf);
 162 #endif
 163
 164     for(;;) {
 165         buf1[0] = '$';
 166         put_buffer(s, buf1, 1);
 167         len = strlen(buf);
 168         put_buffer(s, buf, len);
 169         csum = 0;
 170         for(i = 0; i < len; i++) {
 171             csum += buf[i];
 172         }
 173         buf1[0] = '#';
 174         buf1[1] = tohex((csum >> 4) & 0xf);
 175         buf1[2] = tohex((csum) & 0xf);
 176
 177         put_buffer(s, buf1, 3);
 178
 179         ch = get_char(s);
 180         if (ch < 0)
 181             return -1;
 182         if (ch == '+')
 183             break;
 184     }
 185     return 0;
 186 }
 187
 188 #if defined(TARGET_I386)
 189
 190 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 191 {
 192     uint32_t *registers = (uint32_t *)mem_buf;
 193     int i, fpus;
 194
 195     for(i = 0; i < 8; i++) {
 196         registers[i] = env->regs[i];
 197     }
 198     registers[8] = env->eip;
 199     registers[9] = env->eflags;
 200     registers[10] = env->segs[R_CS].selector;
 201     registers[11] = env->segs[R_SS].selector;
 202     registers[12] = env->segs[R_DS].selector;
 203     registers[13] = env->segs[R_ES].selector;
 204     registers[14] = env->segs[R_FS].selector;
 205     registers[15] = env->segs[R_GS].selector;
 206     /* XXX: convert floats */
 207     for(i = 0; i < 8; i++) {
 208         memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
 209     }
 210     registers[36] = env->fpuc;
 211     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 212     registers[37] = fpus;
 213     registers[38] = 0; /* XXX: convert tags */
 214     registers[39] = 0; /* fiseg */
 215     registers[40] = 0; /* fioff */
 216     registers[41] = 0; /* foseg */
 217     registers[42] = 0; /* fooff */
 218     registers[43] = 0; /* fop */
 219
 220     for(i = 0; i < 16; i++)
 221         tswapls(&registers[i]);
 222     for(i = 36; i < 44; i++)
 223         tswapls(&registers[i]);
 224     return 44 * 4;
 225 }
 226
 227 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 228 {
 229     uint32_t *registers = (uint32_t *)mem_buf;
 230     int i;
 231
 232     for(i = 0; i < 8; i++) {
 233         env->regs[i] = tswapl(registers[i]);
 234     }
 235     env->eip = tswapl(registers[8]);
 236     env->eflags = tswapl(registers[9]);
 237 #if defined(CONFIG_USER_ONLY)
 238 #define LOAD_SEG(index, sreg)\
 239             if (tswapl(registers[index]) != env->segs[sreg].selector)\
 240                 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
 241             LOAD_SEG(10, R_CS);
 242             LOAD_SEG(11, R_SS);
 243             LOAD_SEG(12, R_DS);
 244             LOAD_SEG(13, R_ES);
 245             LOAD_SEG(14, R_FS);
 246             LOAD_SEG(15, R_GS);
 247 #endif
 248 }
 249
 250 #elif defined (TARGET_PPC)
 251 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 252 {
 253     uint32_t *registers = (uint32_t *)mem_buf, tmp;
 254     int i;
 255
 256     /* fill in gprs */
 257     for(i = 0; i < 32; i++) {
 258         registers[i] = tswapl(env->gpr[i]);
 259     }
 260     /* fill in fprs */
 261     for (i = 0; i < 32; i++) {
 262         registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 263         registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
 264     }
 265     /* nip, msr, ccr, lnk, ctr, xer, mq */
 266     registers[96] = tswapl(env->nip);
 267     registers[97] = tswapl(do_load_msr(env));
 268     tmp = 0;
 269     for (i = 0; i < 8; i++)
 270         tmp |= env->crf[i] << (32 - ((i + 1) * 4));
 271     registers[98] = tswapl(tmp);
 272     registers[99] = tswapl(env->lr);
 273     registers[100] = tswapl(env->ctr);
 274     registers[101] = tswapl(do_load_xer(env));
 275     registers[102] = 0;
 276
 277     return 103 * 4;
 278 }
 279
 280 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 281 {
 282     uint32_t *registers = (uint32_t *)mem_buf;
 283     int i;
 284
 285     /* fill in gprs */
 286     for (i = 0; i < 32; i++) {
 287         env->gpr[i] = tswapl(registers[i]);
 288     }
 289     /* fill in fprs */
 290     for (i = 0; i < 32; i++) {
 291         *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
 292         *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
 293     }
 294     /* nip, msr, ccr, lnk, ctr, xer, mq */
 295     env->nip = tswapl(registers[96]);
 296     do_store_msr(env, tswapl(registers[97]));
 297     registers[98] = tswapl(registers[98]);
 298     for (i = 0; i < 8; i++)
 299         env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
 300     env->lr = tswapl(registers[99]);
 301     env->ctr = tswapl(registers[100]);
 302     do_store_xer(env, tswapl(registers[101]));
 303 }
 304 #elif defined (TARGET_SPARC)
 305 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 306 {
 307     target_ulong *registers = (target_ulong *)mem_buf;
 308     int i;
 309
 310     /* fill in g0..g7 */
 311     for(i = 0; i < 8; i++) {
 312         registers[i] = tswapl(env->gregs[i]);
 313     }
 314     /* fill in register window */
 315     for(i = 0; i < 24; i++) {
 316         registers[i + 8] = tswapl(env->regwptr[i]);
 317     }
 318 #ifndef TARGET_SPARC64
 319     /* fill in fprs */
 320     for (i = 0; i < 32; i++) {
 321         registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 322     }
 323     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 324     registers[64] = tswapl(env->y);
 325     {
 326         target_ulong tmp;
 327
 328         tmp = GET_PSR(env);
 329         registers[65] = tswapl(tmp);
 330     }
 331     registers[66] = tswapl(env->wim);
 332     registers[67] = tswapl(env->tbr);
 333     registers[68] = tswapl(env->pc);
 334     registers[69] = tswapl(env->npc);
 335     registers[70] = tswapl(env->fsr);
 336     registers[71] = 0; /* csr */
 337     registers[72] = 0;
 338     return 73 * sizeof(target_ulong);
 339 #else
 340     /* fill in fprs */
 341     for (i = 0; i < 64; i += 2) {
 342         uint64_t tmp;
 343
 344         tmp = (uint64_t)tswap32(*((uint32_t *)&env->fpr[i])) << 32;
 345         tmp |= tswap32(*((uint32_t *)&env->fpr[i + 1]));
 346         registers[i/2 + 32] = tmp;
 347     }
 348     registers[64] = tswapl(env->pc);
 349     registers[65] = tswapl(env->npc);
 350     registers[66] = tswapl(env->tstate[env->tl]);
 351     registers[67] = tswapl(env->fsr);
 352     registers[68] = tswapl(env->fprs);
 353     registers[69] = tswapl(env->y);
 354     return 70 * sizeof(target_ulong);
 355 #endif
 356 }
 357
 358 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 359 {
 360     target_ulong *registers = (target_ulong *)mem_buf;
 361     int i;
 362
 363     /* fill in g0..g7 */
 364     for(i = 0; i < 7; i++) {
 365         env->gregs[i] = tswapl(registers[i]);
 366     }
 367     /* fill in register window */
 368     for(i = 0; i < 24; i++) {
 369         env->regwptr[i] = tswapl(registers[i + 8]);
 370     }
 371 #ifndef TARGET_SPARC64
 372     /* fill in fprs */
 373     for (i = 0; i < 32; i++) {
 374         *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
 375     }
 376     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 377     env->y = tswapl(registers[64]);
 378     PUT_PSR(env, tswapl(registers[65]));
 379     env->wim = tswapl(registers[66]);
 380     env->tbr = tswapl(registers[67]);
 381     env->pc = tswapl(registers[68]);
 382     env->npc = tswapl(registers[69]);
 383     env->fsr = tswapl(registers[70]);
 384 #else
 385     for (i = 0; i < 64; i += 2) {
 386         *((uint32_t *)&env->fpr[i]) = tswap32(registers[i/2 + 32] >> 32);
 387         *((uint32_t *)&env->fpr[i + 1]) = tswap32(registers[i/2 + 32] & 0xffffffff);
 388     }
 389     env->pc = tswapl(registers[64]);
 390     env->npc = tswapl(registers[65]);
 391     env->tstate[env->tl] = tswapl(registers[66]);
 392     env->fsr = tswapl(registers[67]);
 393     env->fprs = tswapl(registers[68]);
 394     env->y = tswapl(registers[69]);
 395 #endif
 396 }
 397 #elif defined (TARGET_ARM)
 398 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 399 {
 400     int i;
 401     uint8_t *ptr;
 402
 403     ptr = mem_buf;
 404     /* 16 core integer registers (4 bytes each).  */
 405     for (i = 0; i < 16; i++)
 406       {
 407         *(uint32_t *)ptr = tswapl(env->regs[i]);
 408         ptr += 4;
 409       }
 410     /* 8 FPA registers (12 bytes each), FPS (4 bytes).
 411        Not yet implemented.  */
 412     memset (ptr, 0, 8 * 12 + 4);
 413     ptr += 8 * 12 + 4;
 414     /* CPSR (4 bytes).  */
 415     *(uint32_t *)ptr = tswapl (cpsr_read(env));
 416     ptr += 4;
 417
 418     return ptr - mem_buf;
 419 }
 420
 421 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 422 {
 423     int i;
 424     uint8_t *ptr;
 425
 426     ptr = mem_buf;
 427     /* Core integer registers.  */
 428     for (i = 0; i < 16; i++)
 429       {
 430         env->regs[i] = tswapl(*(uint32_t *)ptr);
 431         ptr += 4;
 432       }
 433     /* Ignore FPA regs and scr.  */
 434     ptr += 8 * 12 + 4;
 435     cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
 436 }
 437 #elif defined (TARGET_M68K)
 438 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 439 {
 440     int i;
 441     uint8_t *ptr;
 442     CPU_DoubleU u;
 443
 444     ptr = mem_buf;
 445     /* D0-D7 */
 446     for (i = 0; i < 8; i++) {
 447         *(uint32_t *)ptr = tswapl(env->dregs[i]);
 448         ptr += 4;
 449     }
 450     /* A0-A7 */
 451     for (i = 0; i < 8; i++) {
 452         *(uint32_t *)ptr = tswapl(env->aregs[i]);
 453         ptr += 4;
 454     }
 455     *(uint32_t *)ptr = tswapl(env->sr);
 456     ptr += 4;
 457     *(uint32_t *)ptr = tswapl(env->pc);
 458     ptr += 4;
 459     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 460        ColdFire has 8-bit double precision registers.  */
 461     for (i = 0; i < 8; i++) {
 462         u.d = env->fregs[i];
 463         *(uint32_t *)ptr = tswap32(u.l.upper);
 464         *(uint32_t *)ptr = tswap32(u.l.lower);
 465     }
 466     /* FP control regs (not implemented).  */
 467     memset (ptr, 0, 3 * 4);
 468     ptr += 3 * 4;
 469
 470     return ptr - mem_buf;
 471 }
 472
 473 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 474 {
 475     int i;
 476     uint8_t *ptr;
 477     CPU_DoubleU u;
 478
 479     ptr = mem_buf;
 480     /* D0-D7 */
 481     for (i = 0; i < 8; i++) {
 482         env->dregs[i] = tswapl(*(uint32_t *)ptr);
 483         ptr += 4;
 484     }
 485     /* A0-A7 */
 486     for (i = 0; i < 8; i++) {
 487         env->aregs[i] = tswapl(*(uint32_t *)ptr);
 488         ptr += 4;
 489     }
 490     env->sr = tswapl(*(uint32_t *)ptr);
 491     ptr += 4;
 492     env->pc = tswapl(*(uint32_t *)ptr);
 493     ptr += 4;
 494     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 495        ColdFire has 8-bit double precision registers.  */
 496     for (i = 0; i < 8; i++) {
 497         u.l.upper = tswap32(*(uint32_t *)ptr);
 498         u.l.lower = tswap32(*(uint32_t *)ptr);
 499         env->fregs[i] = u.d;
 500     }
 501     /* FP control regs (not implemented).  */
 502     ptr += 3 * 4;
 503 }
 504 #elif defined (TARGET_MIPS)
 505 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 506 {
 507     int i;
 508     uint8_t *ptr;
 509
 510     ptr = mem_buf;
 511     for (i = 0; i < 32; i++)
 512       {
 513         *(uint32_t *)ptr = tswapl(env->gpr[i]);
 514         ptr += 4;
 515       }
 516
 517     *(uint32_t *)ptr = tswapl(env->CP0_Status);
 518     ptr += 4;
 519
 520     *(uint32_t *)ptr = tswapl(env->LO);
 521     ptr += 4;
 522
 523     *(uint32_t *)ptr = tswapl(env->HI);
 524     ptr += 4;
 525
 526     *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
 527     ptr += 4;
 528
 529     *(uint32_t *)ptr = tswapl(env->CP0_Cause);
 530     ptr += 4;
 531
 532     *(uint32_t *)ptr = tswapl(env->PC);
 533     ptr += 4;
 534
 535     /* 32 FP registers, fsr, fir, fp.  Not yet implemented.  */
 536
 537     return ptr - mem_buf;
 538 }
 539
 540 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 541 {
 542     int i;
 543     uint8_t *ptr;
 544
 545     ptr = mem_buf;
 546     for (i = 0; i < 32; i++)
 547       {
 548         env->gpr[i] = tswapl(*(uint32_t *)ptr);
 549         ptr += 4;
 550       }
 551
 552     env->CP0_Status = tswapl(*(uint32_t *)ptr);
 553     ptr += 4;
 554
 555     env->LO = tswapl(*(uint32_t *)ptr);
 556     ptr += 4;
 557
 558     env->HI = tswapl(*(uint32_t *)ptr);
 559     ptr += 4;
 560
 561     env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
 562     ptr += 4;
 563
 564     env->CP0_Cause = tswapl(*(uint32_t *)ptr);
 565     ptr += 4;
 566
 567     env->PC = tswapl(*(uint32_t *)ptr);
 568     ptr += 4;
 569 }
 570 #elif defined (TARGET_SH4)
 571 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 572 {
 573   uint32_t *ptr = (uint32_t *)mem_buf;
 574   int i;
 575
 576 #define SAVE(x) *ptr++=tswapl(x)
 577   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 578       for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 579   } else {
 580       for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 581   }
 582   for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
 583   SAVE (env->pc);
 584   SAVE (env->pr);
 585   SAVE (env->gbr);
 586   SAVE (env->vbr);
 587   SAVE (env->mach);
 588   SAVE (env->macl);
 589   SAVE (env->sr);
 590   SAVE (0); /* TICKS */
 591   SAVE (0); /* STALLS */
 592   SAVE (0); /* CYCLES */
 593   SAVE (0); /* INSTS */
 594   SAVE (0); /* PLR */
 595
 596   return ((uint8_t *)ptr - mem_buf);
 597 }
 598
 599 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 600 {
 601   uint32_t *ptr = (uint32_t *)mem_buf;
 602   int i;
 603
 604 #define LOAD(x) (x)=*ptr++;
 605   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 606       for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 607   } else {
 608       for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 609   }
 610   for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
 611   LOAD (env->pc);
 612   LOAD (env->pr);
 613   LOAD (env->gbr);
 614   LOAD (env->vbr);
 615   LOAD (env->mach);
 616   LOAD (env->macl);
 617   LOAD (env->sr);
 618 }
 619 #else
 620 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 621 {
 622     return 0;
 623 }
 624
 625 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 626 {
 627 }
 628
 629 #endif
 630
 631 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
 632 {
 633     const char *p;
 634     int ch, reg_size, type;
 635     char buf[4096];
 636     uint8_t mem_buf[2000];
 637     uint32_t *registers;
 638     target_ulong addr, len;
 639
 640 #ifdef DEBUG_GDB
 641     printf("command='%s'\n", line_buf);
 642 #endif
 643     p = line_buf;
 644     ch = *p++;
 645     switch(ch) {
 646     case '?':
 647         /* TODO: Make this return the correct value for user-mode.  */
 648         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
 649         put_packet(s, buf);
 650         break;
 651     case 'c':
 652         if (*p != '\0') {
 653             addr = strtoull(p, (char **)&p, 16);
 654 #if defined(TARGET_I386)
 655             env->eip = addr;
 656 #elif defined (TARGET_PPC)
 657             env->nip = addr;
 658 #elif defined (TARGET_SPARC)
 659             env->pc = addr;
 660             env->npc = addr + 4;
 661 #elif defined (TARGET_ARM)
 662             env->regs[15] = addr;
 663 #elif defined (TARGET_SH4)
 664             env->pc = addr;
 665 #endif
 666         }
 667 #ifdef CONFIG_USER_ONLY
 668         s->running_state = 1;
 669 #else
 670         vm_start();
 671 #endif
 672         return RS_IDLE;
 673     case 's':
 674         if (*p != '\0') {
 675             addr = strtoul(p, (char **)&p, 16);
 676 #if defined(TARGET_I386)
 677             env->eip = addr;
 678 #elif defined (TARGET_PPC)
 679             env->nip = addr;
 680 #elif defined (TARGET_SPARC)
 681             env->pc = addr;
 682             env->npc = addr + 4;
 683 #elif defined (TARGET_ARM)
 684             env->regs[15] = addr;
 685 #elif defined (TARGET_SH4)
 686             env->pc = addr;
 687 #endif
 688         }
 689         cpu_single_step(env, 1);
 690 #ifdef CONFIG_USER_ONLY
 691         s->running_state = 1;
 692 #else
 693         vm_start();
 694 #endif
 695         return RS_IDLE;
 696     case 'g':
 697         reg_size = cpu_gdb_read_registers(env, mem_buf);
 698         memtohex(buf, mem_buf, reg_size);
 699         put_packet(s, buf);
 700         break;
 701     case 'G':
 702         registers = (void *)mem_buf;
 703         len = strlen(p) / 2;
 704         hextomem((uint8_t *)registers, p, len);
 705         cpu_gdb_write_registers(env, mem_buf, len);
 706         put_packet(s, "OK");
 707         break;
 708     case 'm':
 709         addr = strtoull(p, (char **)&p, 16);
 710         if (*p == ',')
 711             p++;
 712         len = strtoull(p, NULL, 16);
 713         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
 714             put_packet (s, "E14");
 715         } else {
 716             memtohex(buf, mem_buf, len);
 717             put_packet(s, buf);
 718         }
 719         break;
 720     case 'M':
 721         addr = strtoull(p, (char **)&p, 16);
 722         if (*p == ',')
 723             p++;
 724         len = strtoull(p, (char **)&p, 16);
 725         if (*p == ':')
 726             p++;
 727         hextomem(mem_buf, p, len);
 728         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
 729             put_packet(s, "E14");
 730         else
 731             put_packet(s, "OK");
 732         break;
 733     case 'Z':
 734         type = strtoul(p, (char **)&p, 16);
 735         if (*p == ',')
 736             p++;
 737         addr = strtoull(p, (char **)&p, 16);
 738         if (*p == ',')
 739             p++;
 740         len = strtoull(p, (char **)&p, 16);
 741         if (type == 0 || type == 1) {
 742             if (cpu_breakpoint_insert(env, addr) < 0)
 743                 goto breakpoint_error;
 744             put_packet(s, "OK");
 745         } else {
 746         breakpoint_error:
 747             put_packet(s, "E22");
 748         }
 749         break;
 750     case 'z':
 751         type = strtoul(p, (char **)&p, 16);
 752         if (*p == ',')
 753             p++;
 754         addr = strtoull(p, (char **)&p, 16);
 755         if (*p == ',')
 756             p++;
 757         len = strtoull(p, (char **)&p, 16);
 758         if (type == 0 || type == 1) {
 759             cpu_breakpoint_remove(env, addr);
 760             put_packet(s, "OK");
 761         } else {
 762             goto breakpoint_error;
 763         }
 764         break;
 765 #ifdef CONFIG_USER_ONLY
 766     case 'q':
 767         if (strncmp(p, "Offsets", 7) == 0) {
 768             TaskState *ts = env->opaque;
 769
 770             sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
 771                 ts->info->data_offset, ts->info->data_offset);
 772             put_packet(s, buf);
 773             break;
 774         }
 775         /* Fall through.  */
 776 #endif
 777     default:
 778         //        unknown_command:
 779         /* put empty packet */
 780         buf[0] = '\0';
 781         put_packet(s, buf);
 782         break;
 783     }
 784     return RS_IDLE;
 785 }
 786
 787 extern void tb_flush(CPUState *env);
 788
 789 #ifndef CONFIG_USER_ONLY
 790 static void gdb_vm_stopped(void *opaque, int reason)
 791 {
 792     GDBState *s = opaque;
 793     char buf[256];
 794     int ret;
 795
 796     /* disable single step if it was enable */
 797     cpu_single_step(s->env, 0);
 798
 799     if (reason == EXCP_DEBUG) {
 800         tb_flush(s->env);
 801         ret = SIGTRAP;
 802     } else if (reason == EXCP_INTERRUPT) {
 803         ret = SIGINT;
 804     } else {
 805         ret = 0;
 806     }
 807     snprintf(buf, sizeof(buf), "S%02x", ret);
 808     put_packet(s, buf);
 809 }
 810 #endif
 811
 812 static void gdb_read_byte(GDBState *s, int ch)
 813 {
 814     CPUState *env = s->env;
 815     int i, csum;
 816     char reply[1];
 817
 818 #ifndef CONFIG_USER_ONLY
 819     if (vm_running) {
 820         /* when the CPU is running, we cannot do anything except stop
 821            it when receiving a char */
 822         vm_stop(EXCP_INTERRUPT);
 823     } else
 824 #endif
 825     {
 826         switch(s->state) {
 827         case RS_IDLE:
 828             if (ch == '$') {
 829                 s->line_buf_index = 0;
 830                 s->state = RS_GETLINE;
 831             }
 832             break;
 833         case RS_GETLINE:
 834             if (ch == '#') {
 835             s->state = RS_CHKSUM1;
 836             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
 837                 s->state = RS_IDLE;
 838             } else {
 839             s->line_buf[s->line_buf_index++] = ch;
 840             }
 841             break;
 842         case RS_CHKSUM1:
 843             s->line_buf[s->line_buf_index] = '\0';
 844             s->line_csum = fromhex(ch) << 4;
 845             s->state = RS_CHKSUM2;
 846             break;
 847         case RS_CHKSUM2:
 848             s->line_csum |= fromhex(ch);
 849             csum = 0;
 850             for(i = 0; i < s->line_buf_index; i++) {
 851                 csum += s->line_buf[i];
 852             }
 853             if (s->line_csum != (csum & 0xff)) {
 854                 reply[0] = '-';
 855                 put_buffer(s, reply, 1);
 856                 s->state = RS_IDLE;
 857             } else {
 858                 reply[0] = '+';
 859                 put_buffer(s, reply, 1);
 860                 s->state = gdb_handle_packet(s, env, s->line_buf);
 861             }
 862             break;
 863         }
 864     }
 865 }
 866
 867 #ifdef CONFIG_USER_ONLY
 868 int
 869 gdb_handlesig (CPUState *env, int sig)
 870 {
 871   GDBState *s;
 872   char buf[256];
 873   int n;
 874
 875   if (gdbserver_fd < 0)
 876     return sig;
 877
 878   s = &gdbserver_state;
 879
 880   /* disable single step if it was enabled */
 881   cpu_single_step(env, 0);
 882   tb_flush(env);
 883
 884   if (sig != 0)
 885     {
 886       snprintf(buf, sizeof(buf), "S%02x", sig);
 887       put_packet(s, buf);
 888     }
 889
 890   sig = 0;
 891   s->state = RS_IDLE;
 892   s->running_state = 0;
 893   while (s->running_state == 0) {
 894       n = read (s->fd, buf, 256);
 895       if (n > 0)
 896         {
 897           int i;
 898
 899           for (i = 0; i < n; i++)
 900             gdb_read_byte (s, buf[i]);
 901         }
 902       else if (n == 0 || errno != EAGAIN)
 903         {
 904           /* XXX: Connection closed.  Should probably wait for annother
 905              connection before continuing.  */
 906           return sig;
 907         }
 908   }
 909   return sig;
 910 }
 911
 912 /* Tell the remote gdb that the process has exited.  */
 913 void gdb_exit(CPUState *env, int code)
 914 {
 915   GDBState *s;
 916   char buf[4];
 917
 918   if (gdbserver_fd < 0)
 919     return;
 920
 921   s = &gdbserver_state;
 922
 923   snprintf(buf, sizeof(buf), "W%02x", code);
 924   put_packet(s, buf);
 925 }
 926
 927 #else
 928 static void gdb_read(void *opaque)
 929 {
 930     GDBState *s = opaque;
 931     int i, size;
 932     uint8_t buf[4096];
 933
 934     size = recv(s->fd, buf, sizeof(buf), 0);
 935     if (size < 0)
 936         return;
 937     if (size == 0) {
 938         /* end of connection */
 939         qemu_del_vm_stop_handler(gdb_vm_stopped, s);
 940         qemu_set_fd_handler(s->fd, NULL, NULL, NULL);
 941         qemu_free(s);
 942         vm_start();
 943     } else {
 944         for(i = 0; i < size; i++)
 945             gdb_read_byte(s, buf[i]);
 946     }
 947 }
 948
 949 #endif
 950
 951 static void gdb_accept(void *opaque)
 952 {
 953     GDBState *s;
 954     struct sockaddr_in sockaddr;
 955     socklen_t len;
 956     int val, fd;
 957
 958     for(;;) {
 959         len = sizeof(sockaddr);
 960         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
 961         if (fd < 0 && errno != EINTR) {
 962             perror("accept");
 963             return;
 964         } else if (fd >= 0) {
 965             break;
 966         }
 967     }
 968
 969     /* set short latency */
 970     val = 1;
 971     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
 972
 973 #ifdef CONFIG_USER_ONLY
 974     s = &gdbserver_state;
 975     memset (s, 0, sizeof (GDBState));
 976 #else
 977     s = qemu_mallocz(sizeof(GDBState));
 978     if (!s) {
 979         close(fd);
 980         return;
 981     }
 982 #endif
 983     s->env = first_cpu; /* XXX: allow to change CPU */
 984     s->fd = fd;
 985
 986 #ifdef CONFIG_USER_ONLY
 987     fcntl(fd, F_SETFL, O_NONBLOCK);
 988 #else
 989     socket_set_nonblock(fd);
 990
 991     /* stop the VM */
 992     vm_stop(EXCP_INTERRUPT);
 993
 994     /* start handling I/O */
 995     qemu_set_fd_handler(s->fd, gdb_read, NULL, s);
 996     /* when the VM is stopped, the following callback is called */
 997     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
 998 #endif
 999 }
1000
1001 static int gdbserver_open(int port)
1002 {
1003     struct sockaddr_in sockaddr;
1004     int fd, val, ret;
1005
1006     fd = socket(PF_INET, SOCK_STREAM, 0);
1007     if (fd < 0) {
1008         perror("socket");
1009         return -1;
1010     }
1011
1012     /* allow fast reuse */
1013     val = 1;
1014     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1015
1016     sockaddr.sin_family = AF_INET;
1017     sockaddr.sin_port = htons(port);
1018     sockaddr.sin_addr.s_addr = 0;
1019     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1020     if (ret < 0) {
1021         perror("bind");
1022         return -1;
1023     }
1024     ret = listen(fd, 0);
1025     if (ret < 0) {
1026         perror("listen");
1027         return -1;
1028     }
1029 #ifndef CONFIG_USER_ONLY
1030     socket_set_nonblock(fd);
1031 #endif
1032     return fd;
1033 }
1034
1035 int gdbserver_start(int port)
1036 {
1037     gdbserver_fd = gdbserver_open(port);
1038     if (gdbserver_fd < 0)
1039         return -1;
1040     /* accept connections */
1041 #ifdef CONFIG_USER_ONLY
1042     gdb_accept (NULL);
1043 #else
1044     qemu_set_fd_handler(gdbserver_fd, gdb_accept, NULL, NULL);
1045 #endif
1046     return 0;
1047 }