4 * Copyright (c) 2006 Fabrice Bellard
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
9 * This is based on acpi.c.
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
26 #include "qemu/osdep.h"
28 #include "qapi/visitor.h"
29 #include "hw/i386/pc.h"
30 #include "hw/pci/pci.h"
31 #include "qemu/timer.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/acpi/acpi.h"
34 #include "hw/acpi/tco.h"
35 #include "sysemu/kvm.h"
36 #include "exec/address-spaces.h"
38 #include "hw/i386/ich9.h"
39 #include "hw/mem/pc-dimm.h"
44 #define ICH9_DEBUG(fmt, ...) \
45 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
47 #define ICH9_DEBUG(fmt, ...) do { } while (0)
50 static void ich9_pm_update_sci_fn(ACPIREGS
*regs
)
52 ICH9LPCPMRegs
*pm
= container_of(regs
, ICH9LPCPMRegs
, acpi_regs
);
53 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
56 static uint64_t ich9_gpe_readb(void *opaque
, hwaddr addr
, unsigned width
)
58 ICH9LPCPMRegs
*pm
= opaque
;
59 return acpi_gpe_ioport_readb(&pm
->acpi_regs
, addr
);
62 static void ich9_gpe_writeb(void *opaque
, hwaddr addr
, uint64_t val
,
65 ICH9LPCPMRegs
*pm
= opaque
;
66 acpi_gpe_ioport_writeb(&pm
->acpi_regs
, addr
, val
);
67 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
70 static const MemoryRegionOps ich9_gpe_ops
= {
71 .read
= ich9_gpe_readb
,
72 .write
= ich9_gpe_writeb
,
73 .valid
.min_access_size
= 1,
74 .valid
.max_access_size
= 4,
75 .impl
.min_access_size
= 1,
76 .impl
.max_access_size
= 1,
77 .endianness
= DEVICE_LITTLE_ENDIAN
,
80 static uint64_t ich9_smi_readl(void *opaque
, hwaddr addr
, unsigned width
)
82 ICH9LPCPMRegs
*pm
= opaque
;
93 static void ich9_smi_writel(void *opaque
, hwaddr addr
, uint64_t val
,
96 ICH9LPCPMRegs
*pm
= opaque
;
97 TCOIORegs
*tr
= &pm
->tco_regs
;
102 tco_en
= pm
->smi_en
& ICH9_PMIO_SMI_EN_TCO_EN
;
103 /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
104 if (tr
->tco
.cnt1
& TCO_LOCK
) {
105 val
= (val
& ~ICH9_PMIO_SMI_EN_TCO_EN
) | tco_en
;
107 pm
->smi_en
&= ~pm
->smi_en_wmask
;
108 pm
->smi_en
|= (val
& pm
->smi_en_wmask
);
113 static const MemoryRegionOps ich9_smi_ops
= {
114 .read
= ich9_smi_readl
,
115 .write
= ich9_smi_writel
,
116 .valid
.min_access_size
= 4,
117 .valid
.max_access_size
= 4,
118 .endianness
= DEVICE_LITTLE_ENDIAN
,
121 void ich9_pm_iospace_update(ICH9LPCPMRegs
*pm
, uint32_t pm_io_base
)
123 ICH9_DEBUG("to 0x%x\n", pm_io_base
);
125 assert((pm_io_base
& ICH9_PMIO_MASK
) == 0);
127 pm
->pm_io_base
= pm_io_base
;
128 memory_region_transaction_begin();
129 memory_region_set_enabled(&pm
->io
, pm
->pm_io_base
!= 0);
130 memory_region_set_address(&pm
->io
, pm
->pm_io_base
);
131 memory_region_transaction_commit();
134 static int ich9_pm_post_load(void *opaque
, int version_id
)
136 ICH9LPCPMRegs
*pm
= opaque
;
137 uint32_t pm_io_base
= pm
->pm_io_base
;
139 ich9_pm_iospace_update(pm
, pm_io_base
);
143 #define VMSTATE_GPE_ARRAY(_field, _state) \
145 .name = (stringify(_field)), \
147 .num = ICH9_PMIO_GPE0_LEN, \
148 .info = &vmstate_info_uint8, \
149 .size = sizeof(uint8_t), \
150 .flags = VMS_ARRAY | VMS_POINTER, \
151 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
154 static bool vmstate_test_use_memhp(void *opaque
)
156 ICH9LPCPMRegs
*s
= opaque
;
157 return s
->acpi_memory_hotplug
.is_enabled
;
160 static const VMStateDescription vmstate_memhp_state
= {
161 .name
= "ich9_pm/memhp",
163 .minimum_version_id
= 1,
164 .minimum_version_id_old
= 1,
165 .needed
= vmstate_test_use_memhp
,
166 .fields
= (VMStateField
[]) {
167 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug
, ICH9LPCPMRegs
),
168 VMSTATE_END_OF_LIST()
172 static bool vmstate_test_use_tco(void *opaque
)
174 ICH9LPCPMRegs
*s
= opaque
;
175 return s
->enable_tco
;
178 static const VMStateDescription vmstate_tco_io_state
= {
179 .name
= "ich9_pm/tco",
181 .minimum_version_id
= 1,
182 .minimum_version_id_old
= 1,
183 .needed
= vmstate_test_use_tco
,
184 .fields
= (VMStateField
[]) {
185 VMSTATE_STRUCT(tco_regs
, ICH9LPCPMRegs
, 1, vmstate_tco_io_sts
,
187 VMSTATE_END_OF_LIST()
191 const VMStateDescription vmstate_ich9_pm
= {
194 .minimum_version_id
= 1,
195 .post_load
= ich9_pm_post_load
,
196 .fields
= (VMStateField
[]) {
197 VMSTATE_UINT16(acpi_regs
.pm1
.evt
.sts
, ICH9LPCPMRegs
),
198 VMSTATE_UINT16(acpi_regs
.pm1
.evt
.en
, ICH9LPCPMRegs
),
199 VMSTATE_UINT16(acpi_regs
.pm1
.cnt
.cnt
, ICH9LPCPMRegs
),
200 VMSTATE_TIMER_PTR(acpi_regs
.tmr
.timer
, ICH9LPCPMRegs
),
201 VMSTATE_INT64(acpi_regs
.tmr
.overflow_time
, ICH9LPCPMRegs
),
202 VMSTATE_GPE_ARRAY(acpi_regs
.gpe
.sts
, ICH9LPCPMRegs
),
203 VMSTATE_GPE_ARRAY(acpi_regs
.gpe
.en
, ICH9LPCPMRegs
),
204 VMSTATE_UINT32(smi_en
, ICH9LPCPMRegs
),
205 VMSTATE_UINT32(smi_sts
, ICH9LPCPMRegs
),
206 VMSTATE_END_OF_LIST()
208 .subsections
= (const VMStateDescription
*[]) {
209 &vmstate_memhp_state
,
210 &vmstate_tco_io_state
,
215 static void pm_reset(void *opaque
)
217 ICH9LPCPMRegs
*pm
= opaque
;
218 ich9_pm_iospace_update(pm
, 0);
220 acpi_pm1_evt_reset(&pm
->acpi_regs
);
221 acpi_pm1_cnt_reset(&pm
->acpi_regs
);
222 acpi_pm_tmr_reset(&pm
->acpi_regs
);
223 acpi_gpe_reset(&pm
->acpi_regs
);
226 if (!pm
->smm_enabled
) {
227 /* Mark SMM as already inited to prevent SMM from running. */
228 pm
->smi_en
|= ICH9_PMIO_SMI_EN_APMC_EN
;
230 pm
->smi_en_wmask
= ~0;
232 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
235 static void pm_powerdown_req(Notifier
*n
, void *opaque
)
237 ICH9LPCPMRegs
*pm
= container_of(n
, ICH9LPCPMRegs
, powerdown_notifier
);
239 acpi_pm1_evt_power_down(&pm
->acpi_regs
);
242 void ich9_pm_init(PCIDevice
*lpc_pci
, ICH9LPCPMRegs
*pm
,
243 bool smm_enabled
, bool enable_tco
,
246 memory_region_init(&pm
->io
, OBJECT(lpc_pci
), "ich9-pm", ICH9_PMIO_SIZE
);
247 memory_region_set_enabled(&pm
->io
, false);
248 memory_region_add_subregion(pci_address_space_io(lpc_pci
),
251 acpi_pm_tmr_init(&pm
->acpi_regs
, ich9_pm_update_sci_fn
, &pm
->io
);
252 acpi_pm1_evt_init(&pm
->acpi_regs
, ich9_pm_update_sci_fn
, &pm
->io
);
253 acpi_pm1_cnt_init(&pm
->acpi_regs
, &pm
->io
, pm
->disable_s3
, pm
->disable_s4
,
256 acpi_gpe_init(&pm
->acpi_regs
, ICH9_PMIO_GPE0_LEN
);
257 memory_region_init_io(&pm
->io_gpe
, OBJECT(lpc_pci
), &ich9_gpe_ops
, pm
,
258 "acpi-gpe0", ICH9_PMIO_GPE0_LEN
);
259 memory_region_add_subregion(&pm
->io
, ICH9_PMIO_GPE0_STS
, &pm
->io_gpe
);
261 memory_region_init_io(&pm
->io_smi
, OBJECT(lpc_pci
), &ich9_smi_ops
, pm
,
263 memory_region_add_subregion(&pm
->io
, ICH9_PMIO_SMI_EN
, &pm
->io_smi
);
265 pm
->smm_enabled
= smm_enabled
;
267 pm
->enable_tco
= enable_tco
;
268 if (pm
->enable_tco
) {
269 acpi_pm_tco_init(&pm
->tco_regs
, &pm
->io
);
273 qemu_register_reset(pm_reset
, pm
);
274 pm
->powerdown_notifier
.notify
= pm_powerdown_req
;
275 qemu_register_powerdown_notifier(&pm
->powerdown_notifier
);
277 acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci
), OBJECT(lpc_pci
),
278 &pm
->gpe_cpu
, ICH9_CPU_HOTPLUG_IO_BASE
);
280 if (pm
->acpi_memory_hotplug
.is_enabled
) {
281 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci
), OBJECT(lpc_pci
),
282 &pm
->acpi_memory_hotplug
);
286 static void ich9_pm_get_gpe0_blk(Object
*obj
, Visitor
*v
,
287 void *opaque
, const char *name
,
290 ICH9LPCPMRegs
*pm
= opaque
;
291 uint32_t value
= pm
->pm_io_base
+ ICH9_PMIO_GPE0_STS
;
293 visit_type_uint32(v
, &value
, name
, errp
);
296 static bool ich9_pm_get_memory_hotplug_support(Object
*obj
, Error
**errp
)
298 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
300 return s
->pm
.acpi_memory_hotplug
.is_enabled
;
303 static void ich9_pm_set_memory_hotplug_support(Object
*obj
, bool value
,
306 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
308 s
->pm
.acpi_memory_hotplug
.is_enabled
= value
;
311 static void ich9_pm_get_disable_s3(Object
*obj
, Visitor
*v
,
312 void *opaque
, const char *name
,
315 ICH9LPCPMRegs
*pm
= opaque
;
316 uint8_t value
= pm
->disable_s3
;
318 visit_type_uint8(v
, &value
, name
, errp
);
321 static void ich9_pm_set_disable_s3(Object
*obj
, Visitor
*v
,
322 void *opaque
, const char *name
,
325 ICH9LPCPMRegs
*pm
= opaque
;
326 Error
*local_err
= NULL
;
329 visit_type_uint8(v
, &value
, name
, &local_err
);
333 pm
->disable_s3
= value
;
335 error_propagate(errp
, local_err
);
338 static void ich9_pm_get_disable_s4(Object
*obj
, Visitor
*v
,
339 void *opaque
, const char *name
,
342 ICH9LPCPMRegs
*pm
= opaque
;
343 uint8_t value
= pm
->disable_s4
;
345 visit_type_uint8(v
, &value
, name
, errp
);
348 static void ich9_pm_set_disable_s4(Object
*obj
, Visitor
*v
,
349 void *opaque
, const char *name
,
352 ICH9LPCPMRegs
*pm
= opaque
;
353 Error
*local_err
= NULL
;
356 visit_type_uint8(v
, &value
, name
, &local_err
);
360 pm
->disable_s4
= value
;
362 error_propagate(errp
, local_err
);
365 static void ich9_pm_get_s4_val(Object
*obj
, Visitor
*v
,
366 void *opaque
, const char *name
,
369 ICH9LPCPMRegs
*pm
= opaque
;
370 uint8_t value
= pm
->s4_val
;
372 visit_type_uint8(v
, &value
, name
, errp
);
375 static void ich9_pm_set_s4_val(Object
*obj
, Visitor
*v
,
376 void *opaque
, const char *name
,
379 ICH9LPCPMRegs
*pm
= opaque
;
380 Error
*local_err
= NULL
;
383 visit_type_uint8(v
, &value
, name
, &local_err
);
389 error_propagate(errp
, local_err
);
392 static bool ich9_pm_get_enable_tco(Object
*obj
, Error
**errp
)
394 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
395 return s
->pm
.enable_tco
;
398 static void ich9_pm_set_enable_tco(Object
*obj
, bool value
, Error
**errp
)
400 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
401 s
->pm
.enable_tco
= value
;
404 void ich9_pm_add_properties(Object
*obj
, ICH9LPCPMRegs
*pm
, Error
**errp
)
406 static const uint32_t gpe0_len
= ICH9_PMIO_GPE0_LEN
;
407 pm
->acpi_memory_hotplug
.is_enabled
= true;
412 object_property_add_uint32_ptr(obj
, ACPI_PM_PROP_PM_IO_BASE
,
413 &pm
->pm_io_base
, errp
);
414 object_property_add(obj
, ACPI_PM_PROP_GPE0_BLK
, "uint32",
415 ich9_pm_get_gpe0_blk
,
416 NULL
, NULL
, pm
, NULL
);
417 object_property_add_uint32_ptr(obj
, ACPI_PM_PROP_GPE0_BLK_LEN
,
419 object_property_add_bool(obj
, "memory-hotplug-support",
420 ich9_pm_get_memory_hotplug_support
,
421 ich9_pm_set_memory_hotplug_support
,
423 object_property_add(obj
, ACPI_PM_PROP_S3_DISABLED
, "uint8",
424 ich9_pm_get_disable_s3
,
425 ich9_pm_set_disable_s3
,
427 object_property_add(obj
, ACPI_PM_PROP_S4_DISABLED
, "uint8",
428 ich9_pm_get_disable_s4
,
429 ich9_pm_set_disable_s4
,
431 object_property_add(obj
, ACPI_PM_PROP_S4_VAL
, "uint8",
435 object_property_add_bool(obj
, ACPI_PM_PROP_TCO_ENABLED
,
436 ich9_pm_get_enable_tco
,
437 ich9_pm_set_enable_tco
,
441 void ich9_pm_device_plug_cb(ICH9LPCPMRegs
*pm
, DeviceState
*dev
, Error
**errp
)
443 if (pm
->acpi_memory_hotplug
.is_enabled
&&
444 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
445 acpi_memory_plug_cb(&pm
->acpi_regs
, pm
->irq
, &pm
->acpi_memory_hotplug
,
447 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
448 acpi_cpu_plug_cb(&pm
->acpi_regs
, pm
->irq
, &pm
->gpe_cpu
, dev
, errp
);
450 error_setg(errp
, "acpi: device plug request for not supported device"
451 " type: %s", object_get_typename(OBJECT(dev
)));
455 void ich9_pm_device_unplug_request_cb(ICH9LPCPMRegs
*pm
, DeviceState
*dev
,
458 if (pm
->acpi_memory_hotplug
.is_enabled
&&
459 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
460 acpi_memory_unplug_request_cb(&pm
->acpi_regs
, pm
->irq
,
461 &pm
->acpi_memory_hotplug
, dev
, errp
);
463 error_setg(errp
, "acpi: device unplug request for not supported device"
464 " type: %s", object_get_typename(OBJECT(dev
)));
468 void ich9_pm_device_unplug_cb(ICH9LPCPMRegs
*pm
, DeviceState
*dev
,
471 if (pm
->acpi_memory_hotplug
.is_enabled
&&
472 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
473 acpi_memory_unplug_cb(&pm
->acpi_memory_hotplug
, dev
, errp
);
475 error_setg(errp
, "acpi: device unplug for not supported device"
476 " type: %s", object_get_typename(OBJECT(dev
)));
480 void ich9_pm_ospm_status(AcpiDeviceIf
*adev
, ACPIOSTInfoList
***list
)
482 ICH9LPCState
*s
= ICH9_LPC_DEVICE(adev
);
484 acpi_memory_ospm_status(&s
->pm
.acpi_memory_hotplug
, list
);