hw/acpi/pcihp.c

   1 /*
   2  * QEMU<->ACPI BIOS PCI hotplug interface
   3  *
   4  * QEMU supports PCI hotplug via ACPI. This module
   5  * implements the interface between QEMU and the ACPI BIOS.
   6  * Interface specification - see docs/specs/acpi_pci_hotplug.txt
   7  *
   8  * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
   9  * Copyright (c) 2006 Fabrice Bellard
  10  *
  11  * This library is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU Lesser General Public
  13  * License version 2 as published by the Free Software Foundation.
  14  *
  15  * This library is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * Lesser General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU Lesser General Public
  21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22  *
  23  * Contributions after 2012-01-13 are licensed under the terms of the
  24  * GNU GPL, version 2 or (at your option) any later version.
  25  */
  26
  27 #include "qemu/osdep.h"
  28 #include "hw/acpi/pcihp.h"
  29
  30 #include "hw/hw.h"
  31 #include "hw/i386/pc.h"
  32 #include "hw/pci/pci.h"
  33 #include "hw/pci/pci_bridge.h"
  34 #include "hw/acpi/acpi.h"
  35 #include "sysemu/sysemu.h"
  36 #include "exec/address-spaces.h"
  37 #include "hw/pci/pci_bus.h"
  38 #include "qapi/error.h"
  39 #include "qom/qom-qobject.h"
  40 #include "trace.h"
  41
  42 #define ACPI_PCIHP_ADDR 0xae00
  43 #define ACPI_PCIHP_SIZE 0x0014
  44 #define PCI_UP_BASE 0x0000
  45 #define PCI_DOWN_BASE 0x0004
  46 #define PCI_EJ_BASE 0x0008
  47 #define PCI_RMV_BASE 0x000c
  48 #define PCI_SEL_BASE 0x0010
  49
  50 typedef struct AcpiPciHpFind {
  51     int bsel;
  52     PCIBus *bus;
  53 } AcpiPciHpFind;
  54
  55 static int acpi_pcihp_get_bsel(PCIBus *bus)
  56 {
  57     Error *local_err = NULL;
  58     uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
  59                                              &local_err);
  60
  61     if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
  62         if (local_err) {
  63             error_free(local_err);
  64         }
  65         return -1;
  66     } else {
  67         return bsel;
  68     }
  69 }
  70
  71 /* Assign BSEL property to all buses.  In the future, this can be changed
  72  * to only assign to buses that support hotplug.
  73  */
  74 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
  75 {
  76     unsigned *bsel_alloc = opaque;
  77     unsigned *bus_bsel;
  78
  79     if (qbus_is_hotpluggable(BUS(bus))) {
  80         bus_bsel = g_malloc(sizeof *bus_bsel);
  81
  82         *bus_bsel = (*bsel_alloc)++;
  83         object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
  84                                        bus_bsel, &error_abort);
  85     }
  86
  87     return bsel_alloc;
  88 }
  89
  90 static void acpi_set_pci_info(void)
  91 {
  92     static bool bsel_is_set;
  93     PCIBus *bus;
  94     unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT;
  95
  96     if (bsel_is_set) {
  97         return;
  98     }
  99     bsel_is_set = true;
 100
 101     bus = find_i440fx(); /* TODO: Q35 support */
 102     if (bus) {
 103         /* Scan all PCI buses. Set property to enable acpi based hotplug. */
 104         pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
 105     }
 106 }
 107
 108 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
 109 {
 110     AcpiPciHpFind *find = opaque;
 111     if (find->bsel == acpi_pcihp_get_bsel(bus)) {
 112         find->bus = bus;
 113     }
 114 }
 115
 116 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
 117 {
 118     AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
 119
 120     if (bsel < 0) {
 121         return NULL;
 122     }
 123
 124     pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
 125
 126     /* Make bsel 0 eject root bus if bsel property is not set,
 127      * for compatibility with non acpi setups.
 128      * TODO: really needed?
 129      */
 130     if (!bsel && !find.bus) {
 131         find.bus = s->root;
 132     }
 133     return find.bus;
 134 }
 135
 136 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
 137 {
 138     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
 139     DeviceClass *dc = DEVICE_GET_CLASS(dev);
 140     /*
 141      * ACPI doesn't allow hotplug of bridge devices.  Don't allow
 142      * hot-unplug of bridge devices unless they were added by hotplug
 143      * (and so, not described by acpi).
 144      */
 145     return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
 146 }
 147
 148 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
 149 {
 150     HotplugHandler *hotplug_ctrl;
 151     BusChild *kid, *next;
 152     int slot = ctz32(slots);
 153     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
 154
 155     trace_acpi_pci_eject_slot(bsel, slot);
 156
 157     if (!bus) {
 158         return;
 159     }
 160
 161     /* Mark request as complete */
 162     s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
 163     s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
 164
 165     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
 166         DeviceState *qdev = kid->child;
 167         PCIDevice *dev = PCI_DEVICE(qdev);
 168         if (PCI_SLOT(dev->devfn) == slot) {
 169             if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
 170                 hotplug_ctrl = qdev_get_hotplug_handler(qdev);
 171                 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort);
 172                 object_unparent(OBJECT(qdev));
 173             }
 174         }
 175     }
 176 }
 177
 178 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
 179 {
 180     BusChild *kid, *next;
 181     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
 182
 183     /* Execute any pending removes during reset */
 184     while (s->acpi_pcihp_pci_status[bsel].down) {
 185         acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
 186     }
 187
 188     s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
 189
 190     if (!bus) {
 191         return;
 192     }
 193     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
 194         DeviceState *qdev = kid->child;
 195         PCIDevice *pdev = PCI_DEVICE(qdev);
 196         int slot = PCI_SLOT(pdev->devfn);
 197
 198         if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
 199             s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
 200         }
 201     }
 202 }
 203
 204 static void acpi_pcihp_update(AcpiPciHpState *s)
 205 {
 206     int i;
 207
 208     for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
 209         acpi_pcihp_update_hotplug_bus(s, i);
 210     }
 211 }
 212
 213 void acpi_pcihp_reset(AcpiPciHpState *s)
 214 {
 215     acpi_set_pci_info();
 216     acpi_pcihp_update(s);
 217 }
 218
 219 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
 220                                    DeviceState *dev, Error **errp)
 221 {
 222     /* Only hotplugged devices need the hotplug capability. */
 223     if (dev->hotplugged &&
 224         acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) {
 225         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
 226                    ACPI_PCIHP_PROP_BSEL "' set");
 227         return;
 228     }
 229 }
 230
 231 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
 232                                DeviceState *dev, Error **errp)
 233 {
 234     PCIDevice *pdev = PCI_DEVICE(dev);
 235     int slot = PCI_SLOT(pdev->devfn);
 236     int bsel;
 237
 238     /* Don't send event when device is enabled during qemu machine creation:
 239      * it is present on boot, no hotplug event is necessary. We do send an
 240      * event when the device is disabled later. */
 241     if (!dev->hotplugged) {
 242         /*
 243          * Overwrite the default hotplug handler with the ACPI PCI one
 244          * for cold plugged bridges only.
 245          */
 246         if (!s->legacy_piix &&
 247             object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
 248             PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
 249
 250             qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev),
 251                                      &error_abort);
 252             /* We don't have to overwrite any other hotplug handler yet */
 253             assert(QLIST_EMPTY(&sec->child));
 254         }
 255
 256         return;
 257     }
 258
 259     bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
 260     g_assert(bsel >= 0);
 261     s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
 262     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
 263 }
 264
 265 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
 266                                  DeviceState *dev, Error **errp)
 267 {
 268     trace_acpi_pci_unplug(PCI_SLOT(PCI_DEVICE(dev)->devfn),
 269                           acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))));
 270     object_property_set_bool(OBJECT(dev), false, "realized", NULL);
 271 }
 272
 273 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 274                                          AcpiPciHpState *s, DeviceState *dev,
 275                                          Error **errp)
 276 {
 277     PCIDevice *pdev = PCI_DEVICE(dev);
 278     int slot = PCI_SLOT(pdev->devfn);
 279     int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
 280
 281     trace_acpi_pci_unplug_request(bsel, slot);
 282
 283     if (bsel < 0) {
 284         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
 285                    ACPI_PCIHP_PROP_BSEL "' set");
 286         return;
 287     }
 288
 289     s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
 290     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
 291 }
 292
 293 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
 294 {
 295     AcpiPciHpState *s = opaque;
 296     uint32_t val = 0;
 297     int bsel = s->hotplug_select;
 298
 299     if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
 300         return 0;
 301     }
 302
 303     switch (addr) {
 304     case PCI_UP_BASE:
 305         val = s->acpi_pcihp_pci_status[bsel].up;
 306         if (!s->legacy_piix) {
 307             s->acpi_pcihp_pci_status[bsel].up = 0;
 308         }
 309         trace_acpi_pci_up_read(val);
 310         break;
 311     case PCI_DOWN_BASE:
 312         val = s->acpi_pcihp_pci_status[bsel].down;
 313         trace_acpi_pci_down_read(val);
 314         break;
 315     case PCI_EJ_BASE:
 316         /* No feature defined yet */
 317         trace_acpi_pci_features_read(val);
 318         break;
 319     case PCI_RMV_BASE:
 320         val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
 321         trace_acpi_pci_rmv_read(val);
 322         break;
 323     case PCI_SEL_BASE:
 324         val = s->hotplug_select;
 325         trace_acpi_pci_sel_read(val);
 326     default:
 327         break;
 328     }
 329
 330     return val;
 331 }
 332
 333 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
 334                       unsigned int size)
 335 {
 336     AcpiPciHpState *s = opaque;
 337     switch (addr) {
 338     case PCI_EJ_BASE:
 339         if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
 340             break;
 341         }
 342         acpi_pcihp_eject_slot(s, s->hotplug_select, data);
 343         trace_acpi_pci_ej_write(addr, data);
 344         break;
 345     case PCI_SEL_BASE:
 346         s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
 347         trace_acpi_pci_sel_write(addr, data);
 348     default:
 349         break;
 350     }
 351 }
 352
 353 static const MemoryRegionOps acpi_pcihp_io_ops = {
 354     .read = pci_read,
 355     .write = pci_write,
 356     .endianness = DEVICE_LITTLE_ENDIAN,
 357     .valid = {
 358         .min_access_size = 4,
 359         .max_access_size = 4,
 360     },
 361 };
 362
 363 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
 364                      MemoryRegion *address_space_io, bool bridges_enabled)
 365 {
 366     s->io_len = ACPI_PCIHP_SIZE;
 367     s->io_base = ACPI_PCIHP_ADDR;
 368
 369     s->root= root_bus;
 370     s->legacy_piix = !bridges_enabled;
 371
 372     memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
 373                           "acpi-pci-hotplug", s->io_len);
 374     memory_region_add_subregion(address_space_io, s->io_base, &s->io);
 375
 376     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
 377                                    &error_abort);
 378     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
 379                                    &error_abort);
 380 }
 381
 382 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
 383     .name = "acpi_pcihp_pci_status",
 384     .version_id = 1,
 385     .minimum_version_id = 1,
 386     .fields = (VMStateField[]) {
 387         VMSTATE_UINT32(up, AcpiPciHpPciStatus),
 388         VMSTATE_UINT32(down, AcpiPciHpPciStatus),
 389         VMSTATE_END_OF_LIST()
 390     }
 391 };