hw/acpi/piix4.c

   1 /*
   2  * ACPI implementation
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License version 2.1 as published by the Free Software Foundation.
   9  *
  10  * This library is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * Lesser General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU Lesser General Public
  16  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  17  *
  18  * Contributions after 2012-01-13 are licensed under the terms of the
  19  * GNU GPL, version 2 or (at your option) any later version.
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "hw/i386/pc.h"
  24 #include "hw/irq.h"
  25 #include "hw/isa/apm.h"
  26 #include "hw/i2c/pm_smbus.h"
  27 #include "hw/pci/pci.h"
  28 #include "hw/qdev-properties.h"
  29 #include "hw/acpi/acpi.h"
  30 #include "hw/acpi/pcihp.h"
  31 #include "hw/acpi/piix4.h"
  32 #include "sysemu/runstate.h"
  33 #include "sysemu/sysemu.h"
  34 #include "sysemu/xen.h"
  35 #include "qapi/error.h"
  36 #include "qemu/range.h"
  37 #include "hw/acpi/pcihp.h"
  38 #include "hw/acpi/cpu_hotplug.h"
  39 #include "hw/acpi/cpu.h"
  40 #include "hw/hotplug.h"
  41 #include "hw/mem/pc-dimm.h"
  42 #include "hw/mem/nvdimm.h"
  43 #include "hw/acpi/memory_hotplug.h"
  44 #include "hw/acpi/acpi_dev_interface.h"
  45 #include "migration/vmstate.h"
  46 #include "hw/core/cpu.h"
  47 #include "trace.h"
  48 #include "qom/object.h"
  49
  50 #define GPE_BASE 0xafe0
  51 #define GPE_LEN 4
  52
  53 #define ACPI_PCIHP_ADDR_PIIX4 0xae00
  54
  55 struct pci_status {
  56     uint32_t up; /* deprecated, maintained for migration compatibility */
  57     uint32_t down;
  58 };
  59
  60 static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
  61                                            PCIBus *bus, PIIX4PMState *s);
  62
  63 #define ACPI_ENABLE 0xf1
  64 #define ACPI_DISABLE 0xf0
  65
  66 static void pm_tmr_timer(ACPIREGS *ar)
  67 {
  68     PIIX4PMState *s = container_of(ar, PIIX4PMState, ar);
  69     acpi_update_sci(&s->ar, s->irq);
  70 }
  71
  72 static void apm_ctrl_changed(uint32_t val, void *arg)
  73 {
  74     PIIX4PMState *s = arg;
  75     PCIDevice *d = PCI_DEVICE(s);
  76
  77     /* ACPI specs 3.0, 4.7.2.5 */
  78     acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE);
  79     if (val == ACPI_ENABLE || val == ACPI_DISABLE) {
  80         return;
  81     }
  82
  83     if (d->config[0x5b] & (1 << 1)) {
  84         if (s->smi_irq) {
  85             qemu_irq_raise(s->smi_irq);
  86         }
  87     }
  88 }
  89
  90 static void pm_io_space_update(PIIX4PMState *s)
  91 {
  92     PCIDevice *d = PCI_DEVICE(s);
  93
  94     s->io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40));
  95     s->io_base &= 0xffc0;
  96
  97     memory_region_transaction_begin();
  98     memory_region_set_enabled(&s->io, d->config[0x80] & 1);
  99     memory_region_set_address(&s->io, s->io_base);
 100     memory_region_transaction_commit();
 101 }
 102
 103 static void smbus_io_space_update(PIIX4PMState *s)
 104 {
 105     PCIDevice *d = PCI_DEVICE(s);
 106
 107     s->smb_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x90));
 108     s->smb_io_base &= 0xffc0;
 109
 110     memory_region_transaction_begin();
 111     memory_region_set_enabled(&s->smb.io, d->config[0xd2] & 1);
 112     memory_region_set_address(&s->smb.io, s->smb_io_base);
 113     memory_region_transaction_commit();
 114 }
 115
 116 static void pm_write_config(PCIDevice *d,
 117                             uint32_t address, uint32_t val, int len)
 118 {
 119     pci_default_write_config(d, address, val, len);
 120     if (range_covers_byte(address, len, 0x80) ||
 121         ranges_overlap(address, len, 0x40, 4)) {
 122         pm_io_space_update((PIIX4PMState *)d);
 123     }
 124     if (range_covers_byte(address, len, 0xd2) ||
 125         ranges_overlap(address, len, 0x90, 4)) {
 126         smbus_io_space_update((PIIX4PMState *)d);
 127     }
 128 }
 129
 130 static int vmstate_acpi_post_load(void *opaque, int version_id)
 131 {
 132     PIIX4PMState *s = opaque;
 133
 134     pm_io_space_update(s);
 135     smbus_io_space_update(s);
 136     return 0;
 137 }
 138
 139 #define VMSTATE_GPE_ARRAY(_field, _state)                            \
 140  {                                                                   \
 141      .name       = (stringify(_field)),                              \
 142      .version_id = 0,                                                \
 143      .info       = &vmstate_info_uint16,                             \
 144      .size       = sizeof(uint16_t),                                 \
 145      .flags      = VMS_SINGLE | VMS_POINTER,                         \
 146      .offset     = vmstate_offset_pointer(_state, _field, uint8_t),  \
 147  }
 148
 149 static const VMStateDescription vmstate_gpe = {
 150     .name = "gpe",
 151     .version_id = 1,
 152     .minimum_version_id = 1,
 153     .fields = (VMStateField[]) {
 154         VMSTATE_GPE_ARRAY(sts, ACPIGPE),
 155         VMSTATE_GPE_ARRAY(en, ACPIGPE),
 156         VMSTATE_END_OF_LIST()
 157     }
 158 };
 159
 160 static const VMStateDescription vmstate_pci_status = {
 161     .name = "pci_status",
 162     .version_id = 1,
 163     .minimum_version_id = 1,
 164     .fields = (VMStateField[]) {
 165         VMSTATE_UINT32(up, struct AcpiPciHpPciStatus),
 166         VMSTATE_UINT32(down, struct AcpiPciHpPciStatus),
 167         VMSTATE_END_OF_LIST()
 168     }
 169 };
 170
 171 static bool vmstate_test_use_acpi_hotplug_bridge(void *opaque, int version_id)
 172 {
 173     PIIX4PMState *s = opaque;
 174     return s->use_acpi_hotplug_bridge;
 175 }
 176
 177 static bool vmstate_test_no_use_acpi_hotplug_bridge(void *opaque,
 178                                                     int version_id)
 179 {
 180     PIIX4PMState *s = opaque;
 181     return !s->use_acpi_hotplug_bridge;
 182 }
 183
 184 static bool vmstate_test_use_memhp(void *opaque)
 185 {
 186     PIIX4PMState *s = opaque;
 187     return s->acpi_memory_hotplug.is_enabled;
 188 }
 189
 190 static const VMStateDescription vmstate_memhp_state = {
 191     .name = "piix4_pm/memhp",
 192     .version_id = 1,
 193     .minimum_version_id = 1,
 194     .needed = vmstate_test_use_memhp,
 195     .fields      = (VMStateField[]) {
 196         VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, PIIX4PMState),
 197         VMSTATE_END_OF_LIST()
 198     }
 199 };
 200
 201 static bool vmstate_test_use_cpuhp(void *opaque)
 202 {
 203     PIIX4PMState *s = opaque;
 204     return !s->cpu_hotplug_legacy;
 205 }
 206
 207 static int vmstate_cpuhp_pre_load(void *opaque)
 208 {
 209     Object *obj = OBJECT(opaque);
 210     object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
 211     return 0;
 212 }
 213
 214 static const VMStateDescription vmstate_cpuhp_state = {
 215     .name = "piix4_pm/cpuhp",
 216     .version_id = 1,
 217     .minimum_version_id = 1,
 218     .needed = vmstate_test_use_cpuhp,
 219     .pre_load = vmstate_cpuhp_pre_load,
 220     .fields      = (VMStateField[]) {
 221         VMSTATE_CPU_HOTPLUG(cpuhp_state, PIIX4PMState),
 222         VMSTATE_END_OF_LIST()
 223     }
 224 };
 225
 226 static bool piix4_vmstate_need_smbus(void *opaque, int version_id)
 227 {
 228     return pm_smbus_vmstate_needed();
 229 }
 230
 231 /*
 232  * This is a fudge to turn off the acpi_index field,
 233  * whose test was always broken on piix4 with 6.2 and older machine types.
 234  */
 235 static bool vmstate_test_migrate_acpi_index(void *opaque, int version_id)
 236 {
 237     PIIX4PMState *s = PIIX4_PM(opaque);
 238     return s->use_acpi_hotplug_bridge && !s->not_migrate_acpi_index;
 239 }
 240
 241 /* qemu-kvm 1.2 uses version 3 but advertised as 2
 242  * To support incoming qemu-kvm 1.2 migration, change version_id
 243  * and minimum_version_id to 2 below (which breaks migration from
 244  * qemu 1.2).
 245  *
 246  */
 247 static const VMStateDescription vmstate_acpi = {
 248     .name = "piix4_pm",
 249     .version_id = 3,
 250     .minimum_version_id = 3,
 251     .post_load = vmstate_acpi_post_load,
 252     .fields = (VMStateField[]) {
 253         VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState),
 254         VMSTATE_UINT16(ar.pm1.evt.sts, PIIX4PMState),
 255         VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState),
 256         VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState),
 257         VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState),
 258         VMSTATE_STRUCT_TEST(smb, PIIX4PMState, piix4_vmstate_need_smbus, 3,
 259                             pmsmb_vmstate, PMSMBus),
 260         VMSTATE_TIMER_PTR(ar.tmr.timer, PIIX4PMState),
 261         VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState),
 262         VMSTATE_STRUCT(ar.gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE),
 263         VMSTATE_STRUCT_TEST(
 264             acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT],
 265             PIIX4PMState,
 266             vmstate_test_no_use_acpi_hotplug_bridge,
 267             2, vmstate_pci_status,
 268             struct AcpiPciHpPciStatus),
 269         VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug, PIIX4PMState,
 270                             vmstate_test_use_acpi_hotplug_bridge,
 271                             vmstate_test_migrate_acpi_index),
 272         VMSTATE_END_OF_LIST()
 273     },
 274     .subsections = (const VMStateDescription*[]) {
 275          &vmstate_memhp_state,
 276          &vmstate_cpuhp_state,
 277          NULL
 278     }
 279 };
 280
 281 static void piix4_pm_reset(DeviceState *dev)
 282 {
 283     PIIX4PMState *s = PIIX4_PM(dev);
 284     PCIDevice *d = PCI_DEVICE(s);
 285     uint8_t *pci_conf = d->config;
 286
 287     pci_conf[0x58] = 0;
 288     pci_conf[0x59] = 0;
 289     pci_conf[0x5a] = 0;
 290     pci_conf[0x5b] = 0;
 291
 292     pci_conf[0x40] = 0x01; /* PM io base read only bit */
 293     pci_conf[0x80] = 0;
 294
 295     if (!s->smm_enabled) {
 296         /* Mark SMM as already inited (until KVM supports SMM). */
 297         pci_conf[0x5B] = 0x02;
 298     }
 299
 300     acpi_pm1_evt_reset(&s->ar);
 301     acpi_pm1_cnt_reset(&s->ar);
 302     acpi_pm_tmr_reset(&s->ar);
 303     acpi_gpe_reset(&s->ar);
 304     acpi_update_sci(&s->ar, s->irq);
 305
 306     pm_io_space_update(s);
 307     if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
 308         acpi_pcihp_reset(&s->acpi_pci_hotplug, !s->use_acpi_root_pci_hotplug);
 309     }
 310 }
 311
 312 static void piix4_pm_powerdown_req(Notifier *n, void *opaque)
 313 {
 314     PIIX4PMState *s = container_of(n, PIIX4PMState, powerdown_notifier);
 315
 316     assert(s != NULL);
 317     acpi_pm1_evt_power_down(&s->ar);
 318 }
 319
 320 static void piix4_device_pre_plug_cb(HotplugHandler *hotplug_dev,
 321                                     DeviceState *dev, Error **errp)
 322 {
 323     PIIX4PMState *s = PIIX4_PM(hotplug_dev);
 324
 325     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 326         acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
 327     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 328         if (!s->acpi_memory_hotplug.is_enabled) {
 329             error_setg(errp,
 330                 "memory hotplug is not enabled: %s.memory-hotplug-support "
 331                 "is not set", object_get_typename(OBJECT(s)));
 332         }
 333     } else if (
 334                !object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 335         error_setg(errp, "acpi: device pre plug request for not supported"
 336                    " device type: %s", object_get_typename(OBJECT(dev)));
 337     }
 338 }
 339
 340 static void piix4_device_plug_cb(HotplugHandler *hotplug_dev,
 341                                  DeviceState *dev, Error **errp)
 342 {
 343     PIIX4PMState *s = PIIX4_PM(hotplug_dev);
 344
 345     if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 346         if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
 347             nvdimm_acpi_plug_cb(hotplug_dev, dev);
 348         } else {
 349             acpi_memory_plug_cb(hotplug_dev, &s->acpi_memory_hotplug,
 350                                 dev, errp);
 351         }
 352     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 353         acpi_pcihp_device_plug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, errp);
 354     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 355         if (s->cpu_hotplug_legacy) {
 356             legacy_acpi_cpu_plug_cb(hotplug_dev, &s->gpe_cpu, dev, errp);
 357         } else {
 358             acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
 359         }
 360     } else {
 361         g_assert_not_reached();
 362     }
 363 }
 364
 365 static void piix4_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 366                                            DeviceState *dev, Error **errp)
 367 {
 368     PIIX4PMState *s = PIIX4_PM(hotplug_dev);
 369
 370     if (s->acpi_memory_hotplug.is_enabled &&
 371         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 372         acpi_memory_unplug_request_cb(hotplug_dev, &s->acpi_memory_hotplug,
 373                                       dev, errp);
 374     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 375         acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->acpi_pci_hotplug,
 376                                             dev, errp);
 377     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 378                !s->cpu_hotplug_legacy) {
 379         acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
 380     } else {
 381         error_setg(errp, "acpi: device unplug request for not supported device"
 382                    " type: %s", object_get_typename(OBJECT(dev)));
 383     }
 384 }
 385
 386 static void piix4_device_unplug_cb(HotplugHandler *hotplug_dev,
 387                                    DeviceState *dev, Error **errp)
 388 {
 389     PIIX4PMState *s = PIIX4_PM(hotplug_dev);
 390
 391     if (s->acpi_memory_hotplug.is_enabled &&
 392         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 393         acpi_memory_unplug_cb(&s->acpi_memory_hotplug, dev, errp);
 394     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 395         acpi_pcihp_device_unplug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev,
 396                                     errp);
 397     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 398                !s->cpu_hotplug_legacy) {
 399         acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp);
 400     } else {
 401         error_setg(errp, "acpi: device unplug for not supported device"
 402                    " type: %s", object_get_typename(OBJECT(dev)));
 403     }
 404 }
 405
 406 static void piix4_pm_machine_ready(Notifier *n, void *opaque)
 407 {
 408     PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready);
 409     PCIDevice *d = PCI_DEVICE(s);
 410     MemoryRegion *io_as = pci_address_space_io(d);
 411     uint8_t *pci_conf;
 412
 413     pci_conf = d->config;
 414     pci_conf[0x5f] = 0x10 |
 415         (memory_region_present(io_as, 0x378) ? 0x80 : 0);
 416     pci_conf[0x63] = 0x60;
 417     pci_conf[0x67] = (memory_region_present(io_as, 0x3f8) ? 0x08 : 0) |
 418         (memory_region_present(io_as, 0x2f8) ? 0x90 : 0);
 419 }
 420
 421 static void piix4_pm_add_properties(PIIX4PMState *s)
 422 {
 423     static const uint8_t acpi_enable_cmd = ACPI_ENABLE;
 424     static const uint8_t acpi_disable_cmd = ACPI_DISABLE;
 425     static const uint32_t gpe0_blk = GPE_BASE;
 426     static const uint32_t gpe0_blk_len = GPE_LEN;
 427     static const uint16_t sci_int = 9;
 428
 429     object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_ENABLE_CMD,
 430                                   &acpi_enable_cmd, OBJ_PROP_FLAG_READ);
 431     object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_DISABLE_CMD,
 432                                   &acpi_disable_cmd, OBJ_PROP_FLAG_READ);
 433     object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK,
 434                                   &gpe0_blk, OBJ_PROP_FLAG_READ);
 435     object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK_LEN,
 436                                   &gpe0_blk_len, OBJ_PROP_FLAG_READ);
 437     object_property_add_uint16_ptr(OBJECT(s), ACPI_PM_PROP_SCI_INT,
 438                                   &sci_int, OBJ_PROP_FLAG_READ);
 439     object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE,
 440                                   &s->io_base, OBJ_PROP_FLAG_READ);
 441 }
 442
 443 static void piix4_pm_realize(PCIDevice *dev, Error **errp)
 444 {
 445     PIIX4PMState *s = PIIX4_PM(dev);
 446     uint8_t *pci_conf;
 447
 448     pci_conf = dev->config;
 449     pci_conf[0x06] = 0x80;
 450     pci_conf[0x07] = 0x02;
 451     pci_conf[0x09] = 0x00;
 452     pci_conf[0x3d] = 0x01; // interrupt pin 1
 453
 454     /* APM */
 455     apm_init(dev, &s->apm, apm_ctrl_changed, s);
 456
 457     if (!s->smm_enabled) {
 458         /* Mark SMM as already inited to prevent SMM from running.  KVM does not
 459          * support SMM mode. */
 460         pci_conf[0x5B] = 0x02;
 461     }
 462
 463     /* XXX: which specification is used ? The i82731AB has different
 464        mappings */
 465     pci_conf[0x90] = s->smb_io_base | 1;
 466     pci_conf[0x91] = s->smb_io_base >> 8;
 467     pci_conf[0xd2] = 0x09;
 468     pm_smbus_init(DEVICE(dev), &s->smb, true);
 469     memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1);
 470     memory_region_add_subregion(pci_address_space_io(dev),
 471                                 s->smb_io_base, &s->smb.io);
 472
 473     memory_region_init(&s->io, OBJECT(s), "piix4-pm", 64);
 474     memory_region_set_enabled(&s->io, false);
 475     memory_region_add_subregion(pci_address_space_io(dev),
 476                                 0, &s->io);
 477
 478     acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io);
 479     acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io);
 480     acpi_pm1_cnt_init(&s->ar, &s->io, s->disable_s3, s->disable_s4, s->s4_val,
 481                       !s->smm_compat && !s->smm_enabled);
 482     acpi_gpe_init(&s->ar, GPE_LEN);
 483
 484     s->powerdown_notifier.notify = piix4_pm_powerdown_req;
 485     qemu_register_powerdown_notifier(&s->powerdown_notifier);
 486
 487     s->machine_ready.notify = piix4_pm_machine_ready;
 488     qemu_add_machine_init_done_notifier(&s->machine_ready);
 489
 490     if (xen_enabled()) {
 491         s->use_acpi_hotplug_bridge = false;
 492     }
 493
 494     piix4_acpi_system_hot_add_init(pci_address_space_io(dev),
 495                                    pci_get_bus(dev), s);
 496     qbus_set_hotplug_handler(BUS(pci_get_bus(dev)), OBJECT(s));
 497
 498     piix4_pm_add_properties(s);
 499 }
 500
 501 static void piix4_pm_init(Object *obj)
 502 {
 503     PIIX4PMState *s = PIIX4_PM(obj);
 504
 505     qdev_init_gpio_out(DEVICE(obj), &s->irq, 1);
 506     qdev_init_gpio_out_named(DEVICE(obj), &s->smi_irq, "smi-irq", 1);
 507 }
 508
 509 static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width)
 510 {
 511     PIIX4PMState *s = opaque;
 512     uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr);
 513
 514     trace_piix4_gpe_readb(addr, width, val);
 515     return val;
 516 }
 517
 518 static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
 519                        unsigned width)
 520 {
 521     PIIX4PMState *s = opaque;
 522
 523     trace_piix4_gpe_writeb(addr, width, val);
 524     acpi_gpe_ioport_writeb(&s->ar, addr, val);
 525     acpi_update_sci(&s->ar, s->irq);
 526 }
 527
 528 static const MemoryRegionOps piix4_gpe_ops = {
 529     .read = gpe_readb,
 530     .write = gpe_writeb,
 531     .valid.min_access_size = 1,
 532     .valid.max_access_size = 4,
 533     .impl.min_access_size = 1,
 534     .impl.max_access_size = 1,
 535     .endianness = DEVICE_LITTLE_ENDIAN,
 536 };
 537
 538
 539 static bool piix4_get_cpu_hotplug_legacy(Object *obj, Error **errp)
 540 {
 541     PIIX4PMState *s = PIIX4_PM(obj);
 542
 543     return s->cpu_hotplug_legacy;
 544 }
 545
 546 static void piix4_set_cpu_hotplug_legacy(Object *obj, bool value, Error **errp)
 547 {
 548     PIIX4PMState *s = PIIX4_PM(obj);
 549
 550     assert(!value);
 551     if (s->cpu_hotplug_legacy && value == false) {
 552         acpi_switch_to_modern_cphp(&s->gpe_cpu, &s->cpuhp_state,
 553                                    PIIX4_CPU_HOTPLUG_IO_BASE);
 554     }
 555     s->cpu_hotplug_legacy = value;
 556 }
 557
 558 static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
 559                                            PCIBus *bus, PIIX4PMState *s)
 560 {
 561     memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s,
 562                           "acpi-gpe0", GPE_LEN);
 563     memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe);
 564
 565     if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
 566         acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent,
 567                         s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4);
 568     }
 569
 570     s->cpu_hotplug_legacy = true;
 571     object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy",
 572                              piix4_get_cpu_hotplug_legacy,
 573                              piix4_set_cpu_hotplug_legacy);
 574     legacy_acpi_cpu_hotplug_init(parent, OBJECT(s), &s->gpe_cpu,
 575                                  PIIX4_CPU_HOTPLUG_IO_BASE);
 576
 577     if (s->acpi_memory_hotplug.is_enabled) {
 578         acpi_memory_hotplug_init(parent, OBJECT(s), &s->acpi_memory_hotplug,
 579                                  ACPI_MEMORY_HOTPLUG_BASE);
 580     }
 581 }
 582
 583 static void piix4_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
 584 {
 585     PIIX4PMState *s = PIIX4_PM(adev);
 586
 587     acpi_memory_ospm_status(&s->acpi_memory_hotplug, list);
 588     if (!s->cpu_hotplug_legacy) {
 589         acpi_cpu_ospm_status(&s->cpuhp_state, list);
 590     }
 591 }
 592
 593 static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
 594 {
 595     PIIX4PMState *s = PIIX4_PM(adev);
 596
 597     acpi_send_gpe_event(&s->ar, s->irq, ev);
 598 }
 599
 600 static Property piix4_pm_properties[] = {
 601     DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0),
 602     DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED, PIIX4PMState, disable_s3, 0),
 603     DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0),
 604     DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2),
 605     DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, PIIX4PMState,
 606                      use_acpi_hotplug_bridge, true),
 607     DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCI_ROOTHP, PIIX4PMState,
 608                      use_acpi_root_pci_hotplug, true),
 609     DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState,
 610                      acpi_memory_hotplug.is_enabled, true),
 611     DEFINE_PROP_BOOL("smm-compat", PIIX4PMState, smm_compat, false),
 612     DEFINE_PROP_BOOL("smm-enabled", PIIX4PMState, smm_enabled, false),
 613     DEFINE_PROP_BOOL("x-not-migrate-acpi-index", PIIX4PMState,
 614                       not_migrate_acpi_index, false),
 615     DEFINE_PROP_END_OF_LIST(),
 616 };
 617
 618 static void piix4_pm_class_init(ObjectClass *klass, void *data)
 619 {
 620     DeviceClass *dc = DEVICE_CLASS(klass);
 621     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 622     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
 623     AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass);
 624
 625     k->realize = piix4_pm_realize;
 626     k->config_write = pm_write_config;
 627     k->vendor_id = PCI_VENDOR_ID_INTEL;
 628     k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3;
 629     k->revision = 0x03;
 630     k->class_id = PCI_CLASS_BRIDGE_OTHER;
 631     dc->reset = piix4_pm_reset;
 632     dc->desc = "PM";
 633     dc->vmsd = &vmstate_acpi;
 634     device_class_set_props(dc, piix4_pm_properties);
 635     /*
 636      * Reason: part of PIIX4 southbridge, needs to be wired up,
 637      * e.g. by mips_malta_init()
 638      */
 639     dc->user_creatable = false;
 640     dc->hotpluggable = false;
 641     hc->pre_plug = piix4_device_pre_plug_cb;
 642     hc->plug = piix4_device_plug_cb;
 643     hc->unplug_request = piix4_device_unplug_request_cb;
 644     hc->unplug = piix4_device_unplug_cb;
 645     adevc->ospm_status = piix4_ospm_status;
 646     adevc->send_event = piix4_send_gpe;
 647     adevc->madt_cpu = pc_madt_cpu_entry;
 648 }
 649
 650 static const TypeInfo piix4_pm_info = {
 651     .name          = TYPE_PIIX4_PM,
 652     .parent        = TYPE_PCI_DEVICE,
 653     .instance_init  = piix4_pm_init,
 654     .instance_size = sizeof(PIIX4PMState),
 655     .class_init    = piix4_pm_class_init,
 656     .interfaces = (InterfaceInfo[]) {
 657         { TYPE_HOTPLUG_HANDLER },
 658         { TYPE_ACPI_DEVICE_IF },
 659         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
 660         { }
 661     }
 662 };
 663
 664 static void piix4_pm_register_types(void)
 665 {
 666     type_register_static(&piix4_pm_info);
 667 }
 668
 669 type_init(piix4_pm_register_types)