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1 /*
2 * ARMV7M System emulation.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "qemu/osdep.h"
11 #include "hw/arm/armv7m.h"
12 #include "qapi/error.h"
13 #include "hw/sysbus.h"
14 #include "hw/arm/boot.h"
15 #include "hw/loader.h"
16 #include "hw/qdev-properties.h"
17 #include "elf.h"
18 #include "sysemu/reset.h"
19 #include "qemu/error-report.h"
20 #include "qemu/module.h"
21 #include "target/arm/idau.h"
22
23 /* Bitbanded IO. Each word corresponds to a single bit. */
24
25 /* Get the byte address of the real memory for a bitband access. */
26 static inline hwaddr bitband_addr(BitBandState *s, hwaddr offset)
27 {
28 return s->base | (offset & 0x1ffffff) >> 5;
29 }
30
31 static MemTxResult bitband_read(void *opaque, hwaddr offset,
32 uint64_t *data, unsigned size, MemTxAttrs attrs)
33 {
34 BitBandState *s = opaque;
35 uint8_t buf[4];
36 MemTxResult res;
37 int bitpos, bit;
38 hwaddr addr;
39
40 assert(size <= 4);
41
42 /* Find address in underlying memory and round down to multiple of size */
43 addr = bitband_addr(s, offset) & (-size);
44 res = address_space_read(&s->source_as, addr, attrs, buf, size);
45 if (res) {
46 return res;
47 }
48 /* Bit position in the N bytes read... */
49 bitpos = (offset >> 2) & ((size * 8) - 1);
50 /* ...converted to byte in buffer and bit in byte */
51 bit = (buf[bitpos >> 3] >> (bitpos & 7)) & 1;
52 *data = bit;
53 return MEMTX_OK;
54 }
55
56 static MemTxResult bitband_write(void *opaque, hwaddr offset, uint64_t value,
57 unsigned size, MemTxAttrs attrs)
58 {
59 BitBandState *s = opaque;
60 uint8_t buf[4];
61 MemTxResult res;
62 int bitpos, bit;
63 hwaddr addr;
64
65 assert(size <= 4);
66
67 /* Find address in underlying memory and round down to multiple of size */
68 addr = bitband_addr(s, offset) & (-size);
69 res = address_space_read(&s->source_as, addr, attrs, buf, size);
70 if (res) {
71 return res;
72 }
73 /* Bit position in the N bytes read... */
74 bitpos = (offset >> 2) & ((size * 8) - 1);
75 /* ...converted to byte in buffer and bit in byte */
76 bit = 1 << (bitpos & 7);
77 if (value & 1) {
78 buf[bitpos >> 3] |= bit;
79 } else {
80 buf[bitpos >> 3] &= ~bit;
81 }
82 return address_space_write(&s->source_as, addr, attrs, buf, size);
83 }
84
85 static const MemoryRegionOps bitband_ops = {
86 .read_with_attrs = bitband_read,
87 .write_with_attrs = bitband_write,
88 .endianness = DEVICE_NATIVE_ENDIAN,
89 .impl.min_access_size = 1,
90 .impl.max_access_size = 4,
91 .valid.min_access_size = 1,
92 .valid.max_access_size = 4,
93 };
94
95 static void bitband_init(Object *obj)
96 {
97 BitBandState *s = BITBAND(obj);
98 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
99
100 memory_region_init_io(&s->iomem, obj, &bitband_ops, s,
101 "bitband", 0x02000000);
102 sysbus_init_mmio(dev, &s->iomem);
103 }
104
105 static void bitband_realize(DeviceState *dev, Error **errp)
106 {
107 BitBandState *s = BITBAND(dev);
108
109 if (!s->source_memory) {
110 error_setg(errp, "source-memory property not set");
111 return;
112 }
113
114 address_space_init(&s->source_as, s->source_memory, "bitband-source");
115 }
116
117 /* Board init. */
118
119 static const hwaddr bitband_input_addr[ARMV7M_NUM_BITBANDS] = {
120 0x20000000, 0x40000000
121 };
122
123 static const hwaddr bitband_output_addr[ARMV7M_NUM_BITBANDS] = {
124 0x22000000, 0x42000000
125 };
126
127 static void armv7m_instance_init(Object *obj)
128 {
129 ARMv7MState *s = ARMV7M(obj);
130 int i;
131
132 /* Can't init the cpu here, we don't yet know which model to use */
133
134 memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
135
136 object_initialize_child(obj, "nvic", &s->nvic, TYPE_NVIC);
137 object_property_add_alias(obj, "num-irq",
138 OBJECT(&s->nvic), "num-irq");
139
140 for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
141 object_initialize_child(obj, "bitband[*]", &s->bitband[i],
142 TYPE_BITBAND);
143 }
144 }
145
146 static void armv7m_realize(DeviceState *dev, Error **errp)
147 {
148 ARMv7MState *s = ARMV7M(dev);
149 SysBusDevice *sbd;
150 Error *err = NULL;
151 int i;
152
153 if (!s->board_memory) {
154 error_setg(errp, "memory property was not set");
155 return;
156 }
157
158 memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
159
160 s->cpu = ARM_CPU(object_new_with_props(s->cpu_type, OBJECT(s), "cpu",
161 &err, NULL));
162 if (err != NULL) {
163 error_propagate(errp, err);
164 return;
165 }
166
167 object_property_set_link(OBJECT(s->cpu), "memory", OBJECT(&s->container),
168 &error_abort);
169 if (object_property_find(OBJECT(s->cpu), "idau")) {
170 object_property_set_link(OBJECT(s->cpu), "idau", s->idau,
171 &error_abort);
172 }
173 if (object_property_find(OBJECT(s->cpu), "init-svtor")) {
174 if (!object_property_set_uint(OBJECT(s->cpu), "init-svtor",
175 s->init_svtor, errp)) {
176 return;
177 }
178 }
179 if (object_property_find(OBJECT(s->cpu), "init-nsvtor")) {
180 if (!object_property_set_uint(OBJECT(s->cpu), "init-nsvtor",
181 s->init_nsvtor, errp)) {
182 return;
183 }
184 }
185 if (object_property_find(OBJECT(s->cpu), "start-powered-off")) {
186 if (!object_property_set_bool(OBJECT(s->cpu), "start-powered-off",
187 s->start_powered_off, errp)) {
188 return;
189 }
190 }
191 if (object_property_find(OBJECT(s->cpu), "vfp")) {
192 if (!object_property_set_bool(OBJECT(s->cpu), "vfp", s->vfp, errp)) {
193 return;
194 }
195 }
196 if (object_property_find(OBJECT(s->cpu), "dsp")) {
197 if (!object_property_set_bool(OBJECT(s->cpu), "dsp", s->dsp, errp)) {
198 return;
199 }
200 }
201
202 /*
203 * Tell the CPU where the NVIC is; it will fail realize if it doesn't
204 * have one. Similarly, tell the NVIC where its CPU is.
205 */
206 s->cpu->env.nvic = &s->nvic;
207 s->nvic.cpu = s->cpu;
208
209 if (!qdev_realize(DEVICE(s->cpu), NULL, errp)) {
210 return;
211 }
212
213 /* Note that we must realize the NVIC after the CPU */
214 if (!sysbus_realize(SYS_BUS_DEVICE(&s->nvic), errp)) {
215 return;
216 }
217
218 /* Alias the NVIC's input and output GPIOs as our own so the board
219 * code can wire them up. (We do this in realize because the
220 * NVIC doesn't create the input GPIO array until realize.)
221 */
222 qdev_pass_gpios(DEVICE(&s->nvic), dev, NULL);
223 qdev_pass_gpios(DEVICE(&s->nvic), dev, "SYSRESETREQ");
224 qdev_pass_gpios(DEVICE(&s->nvic), dev, "NMI");
225
226 /* Wire the NVIC up to the CPU */
227 sbd = SYS_BUS_DEVICE(&s->nvic);
228 sysbus_connect_irq(sbd, 0,
229 qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
230
231 memory_region_add_subregion(&s->container, 0xe0000000,
232 sysbus_mmio_get_region(sbd, 0));
233
234 for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
235 if (s->enable_bitband) {
236 Object *obj = OBJECT(&s->bitband[i]);
237 SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
238
239 if (!object_property_set_int(obj, "base",
240 bitband_input_addr[i], errp)) {
241 return;
242 }
243 object_property_set_link(obj, "source-memory",
244 OBJECT(s->board_memory), &error_abort);
245 if (!sysbus_realize(SYS_BUS_DEVICE(obj), errp)) {
246 return;
247 }
248
249 memory_region_add_subregion(&s->container, bitband_output_addr[i],
250 sysbus_mmio_get_region(sbd, 0));
251 } else {
252 object_unparent(OBJECT(&s->bitband[i]));
253 }
254 }
255 }
256
257 static Property armv7m_properties[] = {
258 DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
259 DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
260 MemoryRegion *),
261 DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
262 DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
263 DEFINE_PROP_UINT32("init-nsvtor", ARMv7MState, init_nsvtor, 0),
264 DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
265 DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
266 false),
267 DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
268 DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
269 DEFINE_PROP_END_OF_LIST(),
270 };
271
272 static void armv7m_class_init(ObjectClass *klass, void *data)
273 {
274 DeviceClass *dc = DEVICE_CLASS(klass);
275
276 dc->realize = armv7m_realize;
277 device_class_set_props(dc, armv7m_properties);
278 }
279
280 static const TypeInfo armv7m_info = {
281 .name = TYPE_ARMV7M,
282 .parent = TYPE_SYS_BUS_DEVICE,
283 .instance_size = sizeof(ARMv7MState),
284 .instance_init = armv7m_instance_init,
285 .class_init = armv7m_class_init,
286 };
287
288 static void armv7m_reset(void *opaque)
289 {
290 ARMCPU *cpu = opaque;
291
292 cpu_reset(CPU(cpu));
293 }
294
295 void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
296 {
297 int image_size;
298 uint64_t entry;
299 int big_endian;
300 AddressSpace *as;
301 int asidx;
302 CPUState *cs = CPU(cpu);
303
304 #ifdef TARGET_WORDS_BIGENDIAN
305 big_endian = 1;
306 #else
307 big_endian = 0;
308 #endif
309
310 if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
311 asidx = ARMASIdx_S;
312 } else {
313 asidx = ARMASIdx_NS;
314 }
315 as = cpu_get_address_space(cs, asidx);
316
317 if (kernel_filename) {
318 image_size = load_elf_as(kernel_filename, NULL, NULL, NULL,
319 &entry, NULL, NULL,
320 NULL, big_endian, EM_ARM, 1, 0, as);
321 if (image_size < 0) {
322 image_size = load_image_targphys_as(kernel_filename, 0,
323 mem_size, as);
324 }
325 if (image_size < 0) {
326 error_report("Could not load kernel '%s'", kernel_filename);
327 exit(1);
328 }
329 }
330
331 /* CPU objects (unlike devices) are not automatically reset on system
332 * reset, so we must always register a handler to do so. Unlike
333 * A-profile CPUs, we don't need to do anything special in the
334 * handler to arrange that it starts correctly.
335 * This is arguably the wrong place to do this, but it matches the
336 * way A-profile does it. Note that this means that every M profile
337 * board must call this function!
338 */
339 qemu_register_reset(armv7m_reset, cpu);
340 }
341
342 static Property bitband_properties[] = {
343 DEFINE_PROP_UINT32("base", BitBandState, base, 0),
344 DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
345 TYPE_MEMORY_REGION, MemoryRegion *),
346 DEFINE_PROP_END_OF_LIST(),
347 };
348
349 static void bitband_class_init(ObjectClass *klass, void *data)
350 {
351 DeviceClass *dc = DEVICE_CLASS(klass);
352
353 dc->realize = bitband_realize;
354 device_class_set_props(dc, bitband_properties);
355 }
356
357 static const TypeInfo bitband_info = {
358 .name = TYPE_BITBAND,
359 .parent = TYPE_SYS_BUS_DEVICE,
360 .instance_size = sizeof(BitBandState),
361 .instance_init = bitband_init,
362 .class_init = bitband_class_init,
363 };
364
365 static void armv7m_register_types(void)
366 {
367 type_register_static(&bitband_info);
368 type_register_static(&armv7m_info);
369 }
370
371 type_init(armv7m_register_types)