hw/arm/aspeed.c

   1 /*
   2  * OpenPOWER Palmetto BMC
   3  *
   4  * Andrew Jeffery <andrew@aj.id.au>
   5  *
   6  * Copyright 2016 IBM Corp.
   7  *
   8  * This code is licensed under the GPL version 2 or later.  See
   9  * the COPYING file in the top-level directory.
  10  */
  11
  12 #include "qemu/osdep.h"
  13 #include "qapi/error.h"
  14 #include "cpu.h"
  15 #include "exec/address-spaces.h"
  16 #include "hw/arm/boot.h"
  17 #include "hw/arm/aspeed.h"
  18 #include "hw/arm/aspeed_soc.h"
  19 #include "hw/boards.h"
  20 #include "hw/i2c/smbus_eeprom.h"
  21 #include "hw/misc/pca9552.h"
  22 #include "hw/misc/tmp105.h"
  23 #include "hw/qdev-properties.h"
  24 #include "qemu/log.h"
  25 #include "sysemu/block-backend.h"
  26 #include "sysemu/sysemu.h"
  27 #include "hw/loader.h"
  28 #include "qemu/error-report.h"
  29 #include "qemu/units.h"
  30
  31 static struct arm_boot_info aspeed_board_binfo = {
  32     .board_id = -1, /* device-tree-only board */
  33 };
  34
  35 struct AspeedBoardState {
  36     AspeedSoCState soc;
  37     MemoryRegion ram_container;
  38     MemoryRegion ram;
  39     MemoryRegion max_ram;
  40 };
  41
  42 /* Palmetto hardware value: 0x120CE416 */
  43 #define PALMETTO_BMC_HW_STRAP1 (                                        \
  44         SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) |               \
  45         SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
  46         SCU_AST2400_HW_STRAP_ACPI_DIS |                                 \
  47         SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) |       \
  48         SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
  49         SCU_HW_STRAP_LPC_RESET_PIN |                                    \
  50         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) |                \
  51         SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
  52         SCU_HW_STRAP_SPI_WIDTH |                                        \
  53         SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
  54         SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
  55
  56 /* AST2500 evb hardware value: 0xF100C2E6 */
  57 #define AST2500_EVB_HW_STRAP1 ((                                        \
  58         AST2500_HW_STRAP1_DEFAULTS |                                    \
  59         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
  60         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
  61         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
  62         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
  63         SCU_HW_STRAP_MAC1_RGMII |                                       \
  64         SCU_HW_STRAP_MAC0_RGMII) &                                      \
  65         ~SCU_HW_STRAP_2ND_BOOT_WDT)
  66
  67 /* Romulus hardware value: 0xF10AD206 */
  68 #define ROMULUS_BMC_HW_STRAP1 (                                         \
  69         AST2500_HW_STRAP1_DEFAULTS |                                    \
  70         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
  71         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
  72         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
  73         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
  74         SCU_AST2500_HW_STRAP_ACPI_ENABLE |                              \
  75         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
  76
  77 /* Swift hardware value: 0xF11AD206 */
  78 #define SWIFT_BMC_HW_STRAP1 (                                           \
  79         AST2500_HW_STRAP1_DEFAULTS |                                    \
  80         SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
  81         SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
  82         SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
  83         SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
  84         SCU_H_PLL_BYPASS_EN |                                           \
  85         SCU_AST2500_HW_STRAP_ACPI_ENABLE |                              \
  86         SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
  87
  88 /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
  89 #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
  90
  91 /* AST2600 evb hardware value */
  92 #define AST2600_EVB_HW_STRAP1 0x000000C0
  93 #define AST2600_EVB_HW_STRAP2 0x00000003
  94
  95 /* Tacoma hardware value */
  96 #define TACOMA_BMC_HW_STRAP1  0x00000000
  97 #define TACOMA_BMC_HW_STRAP2  0x00000000
  98
  99 /*
 100  * The max ram region is for firmwares that scan the address space
 101  * with load/store to guess how much RAM the SoC has.
 102  */
 103 static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size)
 104 {
 105     return 0;
 106 }
 107
 108 static void max_ram_write(void *opaque, hwaddr offset, uint64_t value,
 109                            unsigned size)
 110 {
 111     /* Discard writes */
 112 }
 113
 114 static const MemoryRegionOps max_ram_ops = {
 115     .read = max_ram_read,
 116     .write = max_ram_write,
 117     .endianness = DEVICE_NATIVE_ENDIAN,
 118 };
 119
 120 #define FIRMWARE_ADDR 0x0
 121
 122 static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
 123                            Error **errp)
 124 {
 125     BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
 126     uint8_t *storage;
 127     int64_t size;
 128
 129     /* The block backend size should have already been 'validated' by
 130      * the creation of the m25p80 object.
 131      */
 132     size = blk_getlength(blk);
 133     if (size <= 0) {
 134         error_setg(errp, "failed to get flash size");
 135         return;
 136     }
 137
 138     if (rom_size > size) {
 139         rom_size = size;
 140     }
 141
 142     storage = g_new0(uint8_t, rom_size);
 143     if (blk_pread(blk, 0, storage, rom_size) < 0) {
 144         error_setg(errp, "failed to read the initial flash content");
 145         return;
 146     }
 147
 148     rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
 149     g_free(storage);
 150 }
 151
 152 static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
 153                                       Error **errp)
 154 {
 155     int i ;
 156
 157     for (i = 0; i < s->num_cs; ++i) {
 158         AspeedSMCFlash *fl = &s->flashes[i];
 159         DriveInfo *dinfo = drive_get_next(IF_MTD);
 160         qemu_irq cs_line;
 161
 162         fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
 163         if (dinfo) {
 164             qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
 165                                 errp);
 166         }
 167         qdev_init_nofail(fl->flash);
 168
 169         cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
 170         sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
 171     }
 172 }
 173
 174 static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
 175 {
 176         DeviceState *card;
 177
 178         card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
 179                            TYPE_SD_CARD);
 180         if (dinfo) {
 181             qdev_prop_set_drive(card, "drive", blk_by_legacy_dinfo(dinfo),
 182                                 &error_fatal);
 183         }
 184         object_property_set_bool(OBJECT(card), true, "realized", &error_fatal);
 185 }
 186
 187 static void aspeed_machine_init(MachineState *machine)
 188 {
 189     AspeedBoardState *bmc;
 190     AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
 191     AspeedSoCClass *sc;
 192     DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
 193     ram_addr_t max_ram_size;
 194     int i;
 195
 196     bmc = g_new0(AspeedBoardState, 1);
 197
 198     memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container",
 199                        UINT32_MAX);
 200
 201     object_initialize_child(OBJECT(machine), "soc", &bmc->soc,
 202                             (sizeof(bmc->soc)), amc->soc_name, &error_abort,
 203                             NULL);
 204
 205     sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
 206
 207     /*
 208      * This will error out if isize is not supported by memory controller.
 209      */
 210     object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
 211                              &error_fatal);
 212
 213     object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1",
 214                             &error_abort);
 215     object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2",
 216                             &error_abort);
 217     object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs",
 218                             &error_abort);
 219     object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
 220                             &error_abort);
 221     object_property_set_link(OBJECT(&bmc->soc), OBJECT(&bmc->ram_container),
 222                              "dram", &error_abort);
 223     if (machine->kernel_filename) {
 224         /*
 225          * When booting with a -kernel command line there is no u-boot
 226          * that runs to unlock the SCU. In this case set the default to
 227          * be unlocked as the kernel expects
 228          */
 229         object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
 230                                 "hw-prot-key", &error_abort);
 231     }
 232     object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
 233                              &error_abort);
 234
 235     memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
 236     memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram);
 237     memory_region_add_subregion(get_system_memory(),
 238                                 sc->memmap[ASPEED_SDRAM],
 239                                 &bmc->ram_container);
 240
 241     max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size",
 242                                             &error_abort);
 243     memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL,
 244                           "max_ram", max_ram_size  - ram_size);
 245     memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
 246
 247     aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model, &error_abort);
 248     aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model, &error_abort);
 249
 250     /* Install first FMC flash content as a boot rom. */
 251     if (drive0) {
 252         AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
 253         MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
 254
 255         /*
 256          * create a ROM region using the default mapping window size of
 257          * the flash module. The window size is 64MB for the AST2400
 258          * SoC and 128MB for the AST2500 SoC, which is twice as big as
 259          * needed by the flash modules of the Aspeed machines.
 260          */
 261         if (ASPEED_MACHINE(machine)->mmio_exec) {
 262             memory_region_init_alias(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
 263                                      &fl->mmio, 0, fl->size);
 264             memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
 265                                         boot_rom);
 266         } else {
 267             memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
 268                                    fl->size, &error_abort);
 269             memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
 270                                         boot_rom);
 271             write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
 272         }
 273     }
 274
 275     aspeed_board_binfo.ram_size = ram_size;
 276     aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM];
 277     aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus;
 278
 279     if (amc->i2c_init) {
 280         amc->i2c_init(bmc);
 281     }
 282
 283     for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
 284         sdhci_attach_drive(&bmc->soc.sdhci.slots[i], drive_get_next(IF_SD));
 285     }
 286
 287     if (bmc->soc.emmc.num_slots) {
 288         sdhci_attach_drive(&bmc->soc.emmc.slots[0], drive_get_next(IF_SD));
 289     }
 290
 291     arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
 292 }
 293
 294 static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
 295 {
 296     AspeedSoCState *soc = &bmc->soc;
 297     DeviceState *dev;
 298     uint8_t *eeprom_buf = g_malloc0(32 * 1024);
 299
 300     /* The palmetto platform expects a ds3231 RTC but a ds1338 is
 301      * enough to provide basic RTC features. Alarms will be missing */
 302     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);
 303
 304     smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), 0x50,
 305                           eeprom_buf);
 306
 307     /* add a TMP423 temperature sensor */
 308     dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
 309                            "tmp423", 0x4c);
 310     object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
 311     object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
 312     object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
 313     object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
 314 }
 315
 316 static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
 317 {
 318     AspeedSoCState *soc = &bmc->soc;
 319     uint8_t *eeprom_buf = g_malloc0(8 * 1024);
 320
 321     smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), 0x50,
 322                           eeprom_buf);
 323
 324     /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
 325     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7),
 326                      TYPE_TMP105, 0x4d);
 327
 328     /* The AST2500 EVB does not have an RTC. Let's pretend that one is
 329      * plugged on the I2C bus header */
 330     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
 331 }
 332
 333 static void ast2600_evb_i2c_init(AspeedBoardState *bmc)
 334 {
 335     /* Start with some devices on our I2C busses */
 336     ast2500_evb_i2c_init(bmc);
 337 }
 338
 339 static void romulus_bmc_i2c_init(AspeedBoardState *bmc)
 340 {
 341     AspeedSoCState *soc = &bmc->soc;
 342
 343     /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
 344      * good enough */
 345     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
 346 }
 347
 348 static void swift_bmc_i2c_init(AspeedBoardState *bmc)
 349 {
 350     AspeedSoCState *soc = &bmc->soc;
 351
 352     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60);
 353
 354     /* The swift board expects a TMP275 but a TMP105 is compatible */
 355     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x48);
 356     /* The swift board expects a pca9551 but a pca9552 is compatible */
 357     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "pca9552", 0x60);
 358
 359     /* The swift board expects an Epson RX8900 RTC but a ds1338 is compatible */
 360     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "ds1338", 0x32);
 361     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x60);
 362
 363     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp423", 0x4c);
 364     /* The swift board expects a pca9539 but a pca9552 is compatible */
 365     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "pca9552", 0x74);
 366
 367     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "tmp423", 0x4c);
 368     /* The swift board expects a pca9539 but a pca9552 is compatible */
 369     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "pca9552",
 370                      0x74);
 371
 372     /* The swift board expects a TMP275 but a TMP105 is compatible */
 373     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x48);
 374     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x4a);
 375 }
 376
 377 static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
 378 {
 379     AspeedSoCState *soc = &bmc->soc;
 380     uint8_t *eeprom_buf = g_malloc0(8 * 1024);
 381
 382     /* Bus 3: TODO bmp280@77 */
 383     /* Bus 3: TODO max31785@52 */
 384     /* Bus 3: TODO dps310@76 */
 385     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552,
 386                      0x60);
 387
 388     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
 389     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
 390
 391     /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
 392     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105,
 393                      0x4a);
 394
 395     /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
 396      * good enough */
 397     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
 398
 399     smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51,
 400                           eeprom_buf);
 401     i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552,
 402                      0x60);
 403     /* Bus 11: TODO ucd90160@64 */
 404 }
 405
 406 static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
 407 {
 408     return ASPEED_MACHINE(obj)->mmio_exec;
 409 }
 410
 411 static void aspeed_set_mmio_exec(Object *obj, bool value, Error **errp)
 412 {
 413     ASPEED_MACHINE(obj)->mmio_exec = value;
 414 }
 415
 416 static void aspeed_machine_instance_init(Object *obj)
 417 {
 418     ASPEED_MACHINE(obj)->mmio_exec = false;
 419 }
 420
 421 static void aspeed_machine_class_props_init(ObjectClass *oc)
 422 {
 423     object_class_property_add_bool(oc, "execute-in-place",
 424                                    aspeed_get_mmio_exec,
 425                                    aspeed_set_mmio_exec, &error_abort);
 426     object_class_property_set_description(oc, "execute-in-place",
 427                            "boot directly from CE0 flash device", &error_abort);
 428 }
 429
 430 static void aspeed_machine_class_init(ObjectClass *oc, void *data)
 431 {
 432     MachineClass *mc = MACHINE_CLASS(oc);
 433
 434     mc->init = aspeed_machine_init;
 435     mc->max_cpus = ASPEED_CPUS_NUM;
 436     mc->no_floppy = 1;
 437     mc->no_cdrom = 1;
 438     mc->no_parallel = 1;
 439
 440     aspeed_machine_class_props_init(oc);
 441 }
 442
 443 static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
 444 {
 445     MachineClass *mc = MACHINE_CLASS(oc);
 446     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
 447
 448     mc->desc       = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
 449     amc->soc_name  = "ast2400-a1";
 450     amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
 451     amc->fmc_model = "n25q256a";
 452     amc->spi_model = "mx25l25635e";
 453     amc->num_cs    = 1;
 454     amc->i2c_init  = palmetto_bmc_i2c_init;
 455     mc->default_ram_size       = 256 * MiB;
 456 };
 457
 458 static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
 459 {
 460     MachineClass *mc = MACHINE_CLASS(oc);
 461     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
 462
 463     mc->desc       = "Aspeed AST2500 EVB (ARM1176)";
 464     amc->soc_name  = "ast2500-a1";
 465     amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
 466     amc->fmc_model = "w25q256";
 467     amc->spi_model = "mx25l25635e";
 468     amc->num_cs    = 1;
 469     amc->i2c_init  = ast2500_evb_i2c_init;
 470     mc->default_ram_size       = 512 * MiB;
 471 };
 472
 473 static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
 474 {
 475     MachineClass *mc = MACHINE_CLASS(oc);
 476     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
 477
 478     mc->desc       = "OpenPOWER Romulus BMC (ARM1176)";
 479     amc->soc_name  = "ast2500-a1";
 480     amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
 481     amc->fmc_model = "n25q256a";
 482     amc->spi_model = "mx66l1g45g";
 483     amc->num_cs    = 2;
 484     amc->i2c_init  = romulus_bmc_i2c_init;
 485     mc->default_ram_size       = 512 * MiB;
 486 };
 487
 488 static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data)
 489 {
 490     MachineClass *mc = MACHINE_CLASS(oc);
 491     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
 492
 493     mc->desc       = "OpenPOWER Swift BMC (ARM1176)";
 494     amc->soc_name  = "ast2500-a1";
 495     amc->hw_strap1 = SWIFT_BMC_HW_STRAP1;
 496     amc->fmc_model = "mx66l1g45g";
 497     amc->spi_model = "mx66l1g45g";
 498     amc->num_cs    = 2;
 499     amc->i2c_init  = swift_bmc_i2c_init;
 500     mc->default_ram_size       = 512 * MiB;
 501 };
 502
 503 static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
 504 {
 505     MachineClass *mc = MACHINE_CLASS(oc);
 506     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
 507
 508     mc->desc       = "OpenPOWER Witherspoon BMC (ARM1176)";
 509     amc->soc_name  = "ast2500-a1";
 510     amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
 511     amc->fmc_model = "mx25l25635e";
 512     amc->spi_model = "mx66l1g45g";
 513     amc->num_cs    = 2;
 514     amc->i2c_init  = witherspoon_bmc_i2c_init;
 515     mc->default_ram_size = 512 * MiB;
 516 };
 517
 518 static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
 519 {
 520     MachineClass *mc = MACHINE_CLASS(oc);
 521     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
 522
 523     mc->desc       = "Aspeed AST2600 EVB (Cortex A7)";
 524     amc->soc_name  = "ast2600-a0";
 525     amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
 526     amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
 527     amc->fmc_model = "w25q512jv";
 528     amc->spi_model = "mx66u51235f";
 529     amc->num_cs    = 1;
 530     amc->i2c_init  = ast2600_evb_i2c_init;
 531     mc->default_ram_size = 1 * GiB;
 532 };
 533
 534 static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
 535 {
 536     MachineClass *mc = MACHINE_CLASS(oc);
 537     AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
 538
 539     mc->desc       = "Aspeed AST2600 EVB (Cortex A7)";
 540     amc->soc_name  = "ast2600-a0";
 541     amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
 542     amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
 543     amc->fmc_model = "mx66l1g45g";
 544     amc->spi_model = "mx66l1g45g";
 545     amc->num_cs    = 2;
 546     amc->i2c_init  = witherspoon_bmc_i2c_init; /* Same board layout */
 547     mc->default_ram_size = 1 * GiB;
 548 };
 549
 550 static const TypeInfo aspeed_machine_types[] = {
 551     {
 552         .name          = MACHINE_TYPE_NAME("palmetto-bmc"),
 553         .parent        = TYPE_ASPEED_MACHINE,
 554         .class_init    = aspeed_machine_palmetto_class_init,
 555     }, {
 556         .name          = MACHINE_TYPE_NAME("ast2500-evb"),
 557         .parent        = TYPE_ASPEED_MACHINE,
 558         .class_init    = aspeed_machine_ast2500_evb_class_init,
 559     }, {
 560         .name          = MACHINE_TYPE_NAME("romulus-bmc"),
 561         .parent        = TYPE_ASPEED_MACHINE,
 562         .class_init    = aspeed_machine_romulus_class_init,
 563     }, {
 564         .name          = MACHINE_TYPE_NAME("swift-bmc"),
 565         .parent        = TYPE_ASPEED_MACHINE,
 566         .class_init    = aspeed_machine_swift_class_init,
 567     }, {
 568         .name          = MACHINE_TYPE_NAME("witherspoon-bmc"),
 569         .parent        = TYPE_ASPEED_MACHINE,
 570         .class_init    = aspeed_machine_witherspoon_class_init,
 571     }, {
 572         .name          = MACHINE_TYPE_NAME("ast2600-evb"),
 573         .parent        = TYPE_ASPEED_MACHINE,
 574         .class_init    = aspeed_machine_ast2600_evb_class_init,
 575     }, {
 576         .name          = MACHINE_TYPE_NAME("tacoma-bmc"),
 577         .parent        = TYPE_ASPEED_MACHINE,
 578         .class_init    = aspeed_machine_tacoma_class_init,
 579     }, {
 580         .name          = TYPE_ASPEED_MACHINE,
 581         .parent        = TYPE_MACHINE,
 582         .instance_size = sizeof(AspeedMachine),
 583         .instance_init = aspeed_machine_instance_init,
 584         .class_size    = sizeof(AspeedMachineClass),
 585         .class_init    = aspeed_machine_class_init,
 586         .abstract      = true,
 587     }
 588 };
 589
 590 DEFINE_TYPES(aspeed_machine_types)