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1 /*
2 * OpenPOWER Palmetto BMC
3 *
4 * Andrew Jeffery <andrew@aj.id.au>
5 *
6 * Copyright 2016 IBM Corp.
7 *
8 * This code is licensed under the GPL version 2 or later. See
9 * the COPYING file in the top-level directory.
10 */
11
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "cpu.h"
15 #include "exec/address-spaces.h"
16 #include "hw/arm/boot.h"
17 #include "hw/arm/aspeed.h"
18 #include "hw/arm/aspeed_soc.h"
19 #include "hw/boards.h"
20 #include "hw/i2c/smbus_eeprom.h"
21 #include "hw/misc/pca9552.h"
22 #include "hw/misc/tmp105.h"
23 #include "hw/qdev-properties.h"
24 #include "qemu/log.h"
25 #include "sysemu/block-backend.h"
26 #include "sysemu/sysemu.h"
27 #include "hw/loader.h"
28 #include "qemu/error-report.h"
29 #include "qemu/units.h"
30
31 static struct arm_boot_info aspeed_board_binfo = {
32 .board_id = -1, /* device-tree-only board */
33 };
34
35 struct AspeedBoardState {
36 AspeedSoCState soc;
37 MemoryRegion ram_container;
38 MemoryRegion ram;
39 MemoryRegion max_ram;
40 };
41
42 /* Palmetto hardware value: 0x120CE416 */
43 #define PALMETTO_BMC_HW_STRAP1 ( \
44 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
45 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
46 SCU_AST2400_HW_STRAP_ACPI_DIS | \
47 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
48 SCU_HW_STRAP_VGA_CLASS_CODE | \
49 SCU_HW_STRAP_LPC_RESET_PIN | \
50 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
51 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
52 SCU_HW_STRAP_SPI_WIDTH | \
53 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
54 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
55
56 /* AST2500 evb hardware value: 0xF100C2E6 */
57 #define AST2500_EVB_HW_STRAP1 (( \
58 AST2500_HW_STRAP1_DEFAULTS | \
59 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
60 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
61 SCU_AST2500_HW_STRAP_UART_DEBUG | \
62 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
63 SCU_HW_STRAP_MAC1_RGMII | \
64 SCU_HW_STRAP_MAC0_RGMII) & \
65 ~SCU_HW_STRAP_2ND_BOOT_WDT)
66
67 /* Romulus hardware value: 0xF10AD206 */
68 #define ROMULUS_BMC_HW_STRAP1 ( \
69 AST2500_HW_STRAP1_DEFAULTS | \
70 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
71 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
72 SCU_AST2500_HW_STRAP_UART_DEBUG | \
73 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
74 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
75 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
76
77 /* Swift hardware value: 0xF11AD206 */
78 #define SWIFT_BMC_HW_STRAP1 ( \
79 AST2500_HW_STRAP1_DEFAULTS | \
80 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
81 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
82 SCU_AST2500_HW_STRAP_UART_DEBUG | \
83 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
84 SCU_H_PLL_BYPASS_EN | \
85 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
86 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
87
88 /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
89 #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
90
91 /*
92 * The max ram region is for firmwares that scan the address space
93 * with load/store to guess how much RAM the SoC has.
94 */
95 static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size)
96 {
97 return 0;
98 }
99
100 static void max_ram_write(void *opaque, hwaddr offset, uint64_t value,
101 unsigned size)
102 {
103 /* Discard writes */
104 }
105
106 static const MemoryRegionOps max_ram_ops = {
107 .read = max_ram_read,
108 .write = max_ram_write,
109 .endianness = DEVICE_NATIVE_ENDIAN,
110 };
111
112 #define FIRMWARE_ADDR 0x0
113
114 static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
115 Error **errp)
116 {
117 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
118 uint8_t *storage;
119 int64_t size;
120
121 /* The block backend size should have already been 'validated' by
122 * the creation of the m25p80 object.
123 */
124 size = blk_getlength(blk);
125 if (size <= 0) {
126 error_setg(errp, "failed to get flash size");
127 return;
128 }
129
130 if (rom_size > size) {
131 rom_size = size;
132 }
133
134 storage = g_new0(uint8_t, rom_size);
135 if (blk_pread(blk, 0, storage, rom_size) < 0) {
136 error_setg(errp, "failed to read the initial flash content");
137 return;
138 }
139
140 rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
141 g_free(storage);
142 }
143
144 static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
145 Error **errp)
146 {
147 int i ;
148
149 for (i = 0; i < s->num_cs; ++i) {
150 AspeedSMCFlash *fl = &s->flashes[i];
151 DriveInfo *dinfo = drive_get_next(IF_MTD);
152 qemu_irq cs_line;
153
154 fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
155 if (dinfo) {
156 qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
157 errp);
158 }
159 qdev_init_nofail(fl->flash);
160
161 cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
162 sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
163 }
164 }
165
166 static void aspeed_board_init(MachineState *machine,
167 const AspeedBoardConfig *cfg)
168 {
169 AspeedBoardState *bmc;
170 AspeedSoCClass *sc;
171 DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
172 ram_addr_t max_ram_size;
173
174 bmc = g_new0(AspeedBoardState, 1);
175
176 memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container",
177 UINT32_MAX);
178
179 object_initialize_child(OBJECT(machine), "soc", &bmc->soc,
180 (sizeof(bmc->soc)), cfg->soc_name, &error_abort,
181 NULL);
182
183 sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
184
185 object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
186 &error_abort);
187 object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
188 &error_abort);
189 object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
190 &error_abort);
191 object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
192 &error_abort);
193 if (machine->kernel_filename) {
194 /*
195 * When booting with a -kernel command line there is no u-boot
196 * that runs to unlock the SCU. In this case set the default to
197 * be unlocked as the kernel expects
198 */
199 object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
200 "hw-prot-key", &error_abort);
201 }
202 object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
203 &error_abort);
204
205 /*
206 * Allocate RAM after the memory controller has checked the size
207 * was valid. If not, a default value is used.
208 */
209 ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size",
210 &error_abort);
211
212 memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
213 memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram);
214 memory_region_add_subregion(get_system_memory(),
215 sc->info->memmap[ASPEED_SDRAM],
216 &bmc->ram_container);
217
218 max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size",
219 &error_abort);
220 memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL,
221 "max_ram", max_ram_size - ram_size);
222 memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
223
224 aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
225 aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);
226
227 /* Install first FMC flash content as a boot rom. */
228 if (drive0) {
229 AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
230 MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
231
232 /*
233 * create a ROM region using the default mapping window size of
234 * the flash module. The window size is 64MB for the AST2400
235 * SoC and 128MB for the AST2500 SoC, which is twice as big as
236 * needed by the flash modules of the Aspeed machines.
237 */
238 memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
239 fl->size, &error_abort);
240 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
241 boot_rom);
242 write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
243 }
244
245 aspeed_board_binfo.kernel_filename = machine->kernel_filename;
246 aspeed_board_binfo.initrd_filename = machine->initrd_filename;
247 aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline;
248 aspeed_board_binfo.ram_size = ram_size;
249 aspeed_board_binfo.loader_start = sc->info->memmap[ASPEED_SDRAM];
250 aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus;
251
252 if (cfg->i2c_init) {
253 cfg->i2c_init(bmc);
254 }
255
256 arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo);
257 }
258
259 static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
260 {
261 AspeedSoCState *soc = &bmc->soc;
262 DeviceState *dev;
263 uint8_t *eeprom_buf = g_malloc0(32 * 1024);
264
265 /* The palmetto platform expects a ds3231 RTC but a ds1338 is
266 * enough to provide basic RTC features. Alarms will be missing */
267 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);
268
269 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), 0x50,
270 eeprom_buf);
271
272 /* add a TMP423 temperature sensor */
273 dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
274 "tmp423", 0x4c);
275 object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
276 object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
277 object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
278 object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
279 }
280
281 static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
282 {
283 AspeedSoCState *soc = &bmc->soc;
284 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
285
286 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), 0x50,
287 eeprom_buf);
288
289 /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
290 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7),
291 TYPE_TMP105, 0x4d);
292
293 /* The AST2500 EVB does not have an RTC. Let's pretend that one is
294 * plugged on the I2C bus header */
295 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
296 }
297
298 static void romulus_bmc_i2c_init(AspeedBoardState *bmc)
299 {
300 AspeedSoCState *soc = &bmc->soc;
301
302 /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
303 * good enough */
304 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
305 }
306
307 static void swift_bmc_i2c_init(AspeedBoardState *bmc)
308 {
309 AspeedSoCState *soc = &bmc->soc;
310
311 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60);
312
313 /* The swift board expects a TMP275 but a TMP105 is compatible */
314 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x48);
315 /* The swift board expects a pca9551 but a pca9552 is compatible */
316 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "pca9552", 0x60);
317
318 /* The swift board expects an Epson RX8900 RTC but a ds1338 is compatible */
319 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "ds1338", 0x32);
320 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x60);
321
322 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp423", 0x4c);
323 /* The swift board expects a pca9539 but a pca9552 is compatible */
324 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "pca9552", 0x74);
325
326 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "tmp423", 0x4c);
327 /* The swift board expects a pca9539 but a pca9552 is compatible */
328 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "pca9552",
329 0x74);
330
331 /* The swift board expects a TMP275 but a TMP105 is compatible */
332 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x48);
333 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x4a);
334 }
335
336 static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
337 {
338 AspeedSoCState *soc = &bmc->soc;
339 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
340
341 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552,
342 0x60);
343
344 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
345 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
346
347 /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
348 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105,
349 0x4a);
350
351 /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
352 * good enough */
353 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
354
355 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51,
356 eeprom_buf);
357 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552,
358 0x60);
359 }
360
361 static void aspeed_machine_init(MachineState *machine)
362 {
363 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
364
365 aspeed_board_init(machine, amc->board);
366 }
367
368 static void aspeed_machine_class_init(ObjectClass *oc, void *data)
369 {
370 MachineClass *mc = MACHINE_CLASS(oc);
371 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
372 const AspeedBoardConfig *board = data;
373
374 mc->desc = board->desc;
375 mc->init = aspeed_machine_init;
376 mc->max_cpus = ASPEED_CPUS_NUM;
377 mc->no_sdcard = 1;
378 mc->no_floppy = 1;
379 mc->no_cdrom = 1;
380 mc->no_parallel = 1;
381 if (board->ram) {
382 mc->default_ram_size = board->ram;
383 }
384 amc->board = board;
385 }
386
387 static const TypeInfo aspeed_machine_type = {
388 .name = TYPE_ASPEED_MACHINE,
389 .parent = TYPE_MACHINE,
390 .instance_size = sizeof(AspeedMachine),
391 .class_size = sizeof(AspeedMachineClass),
392 .abstract = true,
393 };
394
395 static const AspeedBoardConfig aspeed_boards[] = {
396 {
397 .name = MACHINE_TYPE_NAME("palmetto-bmc"),
398 .desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)",
399 .soc_name = "ast2400-a1",
400 .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
401 .fmc_model = "n25q256a",
402 .spi_model = "mx25l25635e",
403 .num_cs = 1,
404 .i2c_init = palmetto_bmc_i2c_init,
405 .ram = 256 * MiB,
406 }, {
407 .name = MACHINE_TYPE_NAME("ast2500-evb"),
408 .desc = "Aspeed AST2500 EVB (ARM1176)",
409 .soc_name = "ast2500-a1",
410 .hw_strap1 = AST2500_EVB_HW_STRAP1,
411 .fmc_model = "w25q256",
412 .spi_model = "mx25l25635e",
413 .num_cs = 1,
414 .i2c_init = ast2500_evb_i2c_init,
415 .ram = 512 * MiB,
416 }, {
417 .name = MACHINE_TYPE_NAME("romulus-bmc"),
418 .desc = "OpenPOWER Romulus BMC (ARM1176)",
419 .soc_name = "ast2500-a1",
420 .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
421 .fmc_model = "n25q256a",
422 .spi_model = "mx66l1g45g",
423 .num_cs = 2,
424 .i2c_init = romulus_bmc_i2c_init,
425 .ram = 512 * MiB,
426 }, {
427 .name = MACHINE_TYPE_NAME("swift-bmc"),
428 .desc = "OpenPOWER Swift BMC (ARM1176)",
429 .soc_name = "ast2500-a1",
430 .hw_strap1 = SWIFT_BMC_HW_STRAP1,
431 .fmc_model = "mx66l1g45g",
432 .spi_model = "mx66l1g45g",
433 .num_cs = 2,
434 .i2c_init = swift_bmc_i2c_init,
435 .ram = 512 * MiB,
436 }, {
437 .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
438 .desc = "OpenPOWER Witherspoon BMC (ARM1176)",
439 .soc_name = "ast2500-a1",
440 .hw_strap1 = WITHERSPOON_BMC_HW_STRAP1,
441 .fmc_model = "mx25l25635e",
442 .spi_model = "mx66l1g45g",
443 .num_cs = 2,
444 .i2c_init = witherspoon_bmc_i2c_init,
445 .ram = 512 * MiB,
446 },
447 };
448
449 static void aspeed_machine_types(void)
450 {
451 int i;
452
453 type_register_static(&aspeed_machine_type);
454 for (i = 0; i < ARRAY_SIZE(aspeed_boards); ++i) {
455 TypeInfo ti = {
456 .name = aspeed_boards[i].name,
457 .parent = TYPE_ASPEED_MACHINE,
458 .class_init = aspeed_machine_class_init,
459 .class_data = (void *)&aspeed_boards[i],
460 };
461 type_register(&ti);
462 }
463 }
464
465 type_init(aspeed_machine_types)