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1 /*
2 * ARM kernel loader.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "config.h"
11 #include "hw/hw.h"
12 #include "hw/arm/arm.h"
13 #include "sysemu/sysemu.h"
14 #include "hw/boards.h"
15 #include "hw/loader.h"
16 #include "elf.h"
17 #include "sysemu/device_tree.h"
18 #include "qemu/config-file.h"
19
20 #define KERNEL_ARGS_ADDR 0x100
21 #define KERNEL_LOAD_ADDR 0x00010000
22
23 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
24 static uint32_t bootloader[] = {
25 0xe3a00000, /* mov r0, #0 */
26 0xe59f1004, /* ldr r1, [pc, #4] */
27 0xe59f2004, /* ldr r2, [pc, #4] */
28 0xe59ff004, /* ldr pc, [pc, #4] */
29 0, /* Board ID */
30 0, /* Address of kernel args. Set by integratorcp_init. */
31 0 /* Kernel entry point. Set by integratorcp_init. */
32 };
33
34 /* Handling for secondary CPU boot in a multicore system.
35 * Unlike the uniprocessor/primary CPU boot, this is platform
36 * dependent. The default code here is based on the secondary
37 * CPU boot protocol used on realview/vexpress boards, with
38 * some parameterisation to increase its flexibility.
39 * QEMU platform models for which this code is not appropriate
40 * should override write_secondary_boot and secondary_cpu_reset_hook
41 * instead.
42 *
43 * This code enables the interrupt controllers for the secondary
44 * CPUs and then puts all the secondary CPUs into a loop waiting
45 * for an interprocessor interrupt and polling a configurable
46 * location for the kernel secondary CPU entry point.
47 */
48 #define DSB_INSN 0xf57ff04f
49 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
50
51 static uint32_t smpboot[] = {
52 0xe59f2028, /* ldr r2, gic_cpu_if */
53 0xe59f0028, /* ldr r0, startaddr */
54 0xe3a01001, /* mov r1, #1 */
55 0xe5821000, /* str r1, [r2] - set GICC_CTLR.Enable */
56 0xe3a010ff, /* mov r1, #0xff */
57 0xe5821004, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
58 DSB_INSN, /* dsb */
59 0xe320f003, /* wfi */
60 0xe5901000, /* ldr r1, [r0] */
61 0xe1110001, /* tst r1, r1 */
62 0x0afffffb, /* beq <wfi> */
63 0xe12fff11, /* bx r1 */
64 0, /* gic_cpu_if: base address of GIC CPU interface */
65 0 /* bootreg: Boot register address is held here */
66 };
67
68 static void default_write_secondary(ARMCPU *cpu,
69 const struct arm_boot_info *info)
70 {
71 int n;
72 smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
73 smpboot[ARRAY_SIZE(smpboot) - 2] = info->gic_cpu_if_addr;
74 for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
75 /* Replace DSB with the pre-v7 DSB if necessary. */
76 if (!arm_feature(&cpu->env, ARM_FEATURE_V7) &&
77 smpboot[n] == DSB_INSN) {
78 smpboot[n] = CP15_DSB_INSN;
79 }
80 smpboot[n] = tswap32(smpboot[n]);
81 }
82 rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
83 info->smp_loader_start);
84 }
85
86 static void default_reset_secondary(ARMCPU *cpu,
87 const struct arm_boot_info *info)
88 {
89 CPUARMState *env = &cpu->env;
90
91 stl_phys_notdirty(info->smp_bootreg_addr, 0);
92 env->regs[15] = info->smp_loader_start;
93 }
94
95 #define WRITE_WORD(p, value) do { \
96 stl_phys_notdirty(p, value); \
97 p += 4; \
98 } while (0)
99
100 static void set_kernel_args(const struct arm_boot_info *info)
101 {
102 int initrd_size = info->initrd_size;
103 hwaddr base = info->loader_start;
104 hwaddr p;
105
106 p = base + KERNEL_ARGS_ADDR;
107 /* ATAG_CORE */
108 WRITE_WORD(p, 5);
109 WRITE_WORD(p, 0x54410001);
110 WRITE_WORD(p, 1);
111 WRITE_WORD(p, 0x1000);
112 WRITE_WORD(p, 0);
113 /* ATAG_MEM */
114 /* TODO: handle multiple chips on one ATAG list */
115 WRITE_WORD(p, 4);
116 WRITE_WORD(p, 0x54410002);
117 WRITE_WORD(p, info->ram_size);
118 WRITE_WORD(p, info->loader_start);
119 if (initrd_size) {
120 /* ATAG_INITRD2 */
121 WRITE_WORD(p, 4);
122 WRITE_WORD(p, 0x54420005);
123 WRITE_WORD(p, info->initrd_start);
124 WRITE_WORD(p, initrd_size);
125 }
126 if (info->kernel_cmdline && *info->kernel_cmdline) {
127 /* ATAG_CMDLINE */
128 int cmdline_size;
129
130 cmdline_size = strlen(info->kernel_cmdline);
131 cpu_physical_memory_write(p + 8, info->kernel_cmdline,
132 cmdline_size + 1);
133 cmdline_size = (cmdline_size >> 2) + 1;
134 WRITE_WORD(p, cmdline_size + 2);
135 WRITE_WORD(p, 0x54410009);
136 p += cmdline_size * 4;
137 }
138 if (info->atag_board) {
139 /* ATAG_BOARD */
140 int atag_board_len;
141 uint8_t atag_board_buf[0x1000];
142
143 atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
144 WRITE_WORD(p, (atag_board_len + 8) >> 2);
145 WRITE_WORD(p, 0x414f4d50);
146 cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
147 p += atag_board_len;
148 }
149 /* ATAG_END */
150 WRITE_WORD(p, 0);
151 WRITE_WORD(p, 0);
152 }
153
154 static void set_kernel_args_old(const struct arm_boot_info *info)
155 {
156 hwaddr p;
157 const char *s;
158 int initrd_size = info->initrd_size;
159 hwaddr base = info->loader_start;
160
161 /* see linux/include/asm-arm/setup.h */
162 p = base + KERNEL_ARGS_ADDR;
163 /* page_size */
164 WRITE_WORD(p, 4096);
165 /* nr_pages */
166 WRITE_WORD(p, info->ram_size / 4096);
167 /* ramdisk_size */
168 WRITE_WORD(p, 0);
169 #define FLAG_READONLY 1
170 #define FLAG_RDLOAD 4
171 #define FLAG_RDPROMPT 8
172 /* flags */
173 WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
174 /* rootdev */
175 WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */
176 /* video_num_cols */
177 WRITE_WORD(p, 0);
178 /* video_num_rows */
179 WRITE_WORD(p, 0);
180 /* video_x */
181 WRITE_WORD(p, 0);
182 /* video_y */
183 WRITE_WORD(p, 0);
184 /* memc_control_reg */
185 WRITE_WORD(p, 0);
186 /* unsigned char sounddefault */
187 /* unsigned char adfsdrives */
188 /* unsigned char bytes_per_char_h */
189 /* unsigned char bytes_per_char_v */
190 WRITE_WORD(p, 0);
191 /* pages_in_bank[4] */
192 WRITE_WORD(p, 0);
193 WRITE_WORD(p, 0);
194 WRITE_WORD(p, 0);
195 WRITE_WORD(p, 0);
196 /* pages_in_vram */
197 WRITE_WORD(p, 0);
198 /* initrd_start */
199 if (initrd_size) {
200 WRITE_WORD(p, info->initrd_start);
201 } else {
202 WRITE_WORD(p, 0);
203 }
204 /* initrd_size */
205 WRITE_WORD(p, initrd_size);
206 /* rd_start */
207 WRITE_WORD(p, 0);
208 /* system_rev */
209 WRITE_WORD(p, 0);
210 /* system_serial_low */
211 WRITE_WORD(p, 0);
212 /* system_serial_high */
213 WRITE_WORD(p, 0);
214 /* mem_fclk_21285 */
215 WRITE_WORD(p, 0);
216 /* zero unused fields */
217 while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
218 WRITE_WORD(p, 0);
219 }
220 s = info->kernel_cmdline;
221 if (s) {
222 cpu_physical_memory_write(p, s, strlen(s) + 1);
223 } else {
224 WRITE_WORD(p, 0);
225 }
226 }
227
228 static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo)
229 {
230 void *fdt = NULL;
231 int size, rc;
232 uint32_t acells, scells;
233
234 if (binfo->dtb_filename) {
235 char *filename;
236 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
237 if (!filename) {
238 fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
239 goto fail;
240 }
241
242 fdt = load_device_tree(filename, &size);
243 if (!fdt) {
244 fprintf(stderr, "Couldn't open dtb file %s\n", filename);
245 g_free(filename);
246 goto fail;
247 }
248 g_free(filename);
249 } else if (binfo->get_dtb) {
250 fdt = binfo->get_dtb(binfo, &size);
251 if (!fdt) {
252 fprintf(stderr, "Board was unable to create a dtb blob\n");
253 goto fail;
254 }
255 }
256
257 acells = qemu_devtree_getprop_cell(fdt, "/", "#address-cells");
258 scells = qemu_devtree_getprop_cell(fdt, "/", "#size-cells");
259 if (acells == 0 || scells == 0) {
260 fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
261 goto fail;
262 }
263
264 if (scells < 2 && binfo->ram_size >= (1ULL << 32)) {
265 /* This is user error so deserves a friendlier error message
266 * than the failure of setprop_sized_cells would provide
267 */
268 fprintf(stderr, "qemu: dtb file not compatible with "
269 "RAM size > 4GB\n");
270 goto fail;
271 }
272
273 rc = qemu_devtree_setprop_sized_cells(fdt, "/memory", "reg",
274 acells, binfo->loader_start,
275 scells, binfo->ram_size);
276 if (rc < 0) {
277 fprintf(stderr, "couldn't set /memory/reg\n");
278 goto fail;
279 }
280
281 if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
282 rc = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
283 binfo->kernel_cmdline);
284 if (rc < 0) {
285 fprintf(stderr, "couldn't set /chosen/bootargs\n");
286 goto fail;
287 }
288 }
289
290 if (binfo->initrd_size) {
291 rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
292 binfo->initrd_start);
293 if (rc < 0) {
294 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
295 goto fail;
296 }
297
298 rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
299 binfo->initrd_start + binfo->initrd_size);
300 if (rc < 0) {
301 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
302 goto fail;
303 }
304 }
305
306 if (binfo->modify_dtb) {
307 binfo->modify_dtb(binfo, fdt);
308 }
309
310 qemu_devtree_dumpdtb(fdt, size);
311
312 cpu_physical_memory_write(addr, fdt, size);
313
314 g_free(fdt);
315
316 return 0;
317
318 fail:
319 g_free(fdt);
320 return -1;
321 }
322
323 static void do_cpu_reset(void *opaque)
324 {
325 ARMCPU *cpu = opaque;
326 CPUARMState *env = &cpu->env;
327 const struct arm_boot_info *info = env->boot_info;
328
329 cpu_reset(CPU(cpu));
330 if (info) {
331 if (!info->is_linux) {
332 /* Jump to the entry point. */
333 env->regs[15] = info->entry & 0xfffffffe;
334 env->thumb = info->entry & 1;
335 } else {
336 if (CPU(cpu) == first_cpu) {
337 env->regs[15] = info->loader_start;
338 if (!info->dtb_filename) {
339 if (old_param) {
340 set_kernel_args_old(info);
341 } else {
342 set_kernel_args(info);
343 }
344 }
345 } else {
346 info->secondary_cpu_reset_hook(cpu, info);
347 }
348 }
349 }
350 }
351
352 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
353 {
354 CPUState *cs = CPU(cpu);
355 int kernel_size;
356 int initrd_size;
357 int n;
358 int is_linux = 0;
359 uint64_t elf_entry;
360 hwaddr entry;
361 int big_endian;
362
363 /* Load the kernel. */
364 if (!info->kernel_filename) {
365 /* If no kernel specified, do nothing; we will start from address 0
366 * (typically a boot ROM image) in the same way as hardware.
367 */
368 return;
369 }
370
371 info->dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
372
373 if (!info->secondary_cpu_reset_hook) {
374 info->secondary_cpu_reset_hook = default_reset_secondary;
375 }
376 if (!info->write_secondary_boot) {
377 info->write_secondary_boot = default_write_secondary;
378 }
379
380 if (info->nb_cpus == 0)
381 info->nb_cpus = 1;
382
383 #ifdef TARGET_WORDS_BIGENDIAN
384 big_endian = 1;
385 #else
386 big_endian = 0;
387 #endif
388
389 /* We want to put the initrd far enough into RAM that when the
390 * kernel is uncompressed it will not clobber the initrd. However
391 * on boards without much RAM we must ensure that we still leave
392 * enough room for a decent sized initrd, and on boards with large
393 * amounts of RAM we must avoid the initrd being so far up in RAM
394 * that it is outside lowmem and inaccessible to the kernel.
395 * So for boards with less than 256MB of RAM we put the initrd
396 * halfway into RAM, and for boards with 256MB of RAM or more we put
397 * the initrd at 128MB.
398 */
399 info->initrd_start = info->loader_start +
400 MIN(info->ram_size / 2, 128 * 1024 * 1024);
401
402 /* Assume that raw images are linux kernels, and ELF images are not. */
403 kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
404 NULL, NULL, big_endian, ELF_MACHINE, 1);
405 entry = elf_entry;
406 if (kernel_size < 0) {
407 kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
408 &is_linux);
409 }
410 if (kernel_size < 0) {
411 entry = info->loader_start + KERNEL_LOAD_ADDR;
412 kernel_size = load_image_targphys(info->kernel_filename, entry,
413 info->ram_size - KERNEL_LOAD_ADDR);
414 is_linux = 1;
415 }
416 if (kernel_size < 0) {
417 fprintf(stderr, "qemu: could not load kernel '%s'\n",
418 info->kernel_filename);
419 exit(1);
420 }
421 info->entry = entry;
422 if (is_linux) {
423 if (info->initrd_filename) {
424 initrd_size = load_ramdisk(info->initrd_filename,
425 info->initrd_start,
426 info->ram_size -
427 info->initrd_start);
428 if (initrd_size < 0) {
429 initrd_size = load_image_targphys(info->initrd_filename,
430 info->initrd_start,
431 info->ram_size -
432 info->initrd_start);
433 }
434 if (initrd_size < 0) {
435 fprintf(stderr, "qemu: could not load initrd '%s'\n",
436 info->initrd_filename);
437 exit(1);
438 }
439 } else {
440 initrd_size = 0;
441 }
442 info->initrd_size = initrd_size;
443
444 bootloader[4] = info->board_id;
445
446 /* for device tree boot, we pass the DTB directly in r2. Otherwise
447 * we point to the kernel args.
448 */
449 if (info->dtb_filename || info->get_dtb) {
450 /* Place the DTB after the initrd in memory. Note that some
451 * kernels will trash anything in the 4K page the initrd
452 * ends in, so make sure the DTB isn't caught up in that.
453 */
454 hwaddr dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size,
455 4096);
456 if (load_dtb(dtb_start, info)) {
457 exit(1);
458 }
459 bootloader[5] = dtb_start;
460 } else {
461 bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
462 if (info->ram_size >= (1ULL << 32)) {
463 fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
464 " Linux kernel using ATAGS (try passing a device tree"
465 " using -dtb)\n");
466 exit(1);
467 }
468 }
469 bootloader[6] = entry;
470 for (n = 0; n < sizeof(bootloader) / 4; n++) {
471 bootloader[n] = tswap32(bootloader[n]);
472 }
473 rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
474 info->loader_start);
475 if (info->nb_cpus > 1) {
476 info->write_secondary_boot(cpu, info);
477 }
478 }
479 info->is_linux = is_linux;
480
481 for (; cs; cs = CPU_NEXT(cs)) {
482 cpu = ARM_CPU(cs);
483 cpu->env.boot_info = info;
484 qemu_register_reset(do_cpu_reset, cpu);
485 }
486 }