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git.proxmox.com Git - mirror_qemu.git/blob - hw/arm/digic.c
2 * QEMU model of the Canon DIGIC SoC.
4 * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
6 * This model is based on reverse engineering efforts
7 * made by CHDK (http://chdk.wikia.com) and
8 * Magic Lantern (http://www.magiclantern.fm) projects
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
23 #include "qemu/osdep.h"
24 #include "qapi/error.h"
25 #include "hw/arm/digic.h"
26 #include "sysemu/sysemu.h"
28 #define DIGIC4_TIMER_BASE(n) (0xc0210000 + (n) * 0x100)
30 #define DIGIC_UART_BASE 0xc0800000
32 static void digic_init(Object
*obj
)
34 DigicState
*s
= DIGIC(obj
);
37 object_initialize_child(obj
, "cpu", &s
->cpu
, sizeof(s
->cpu
),
38 "arm946-" TYPE_ARM_CPU
, &error_abort
, NULL
);
40 for (i
= 0; i
< DIGIC4_NB_TIMERS
; i
++) {
41 #define DIGIC_TIMER_NAME_MLEN 11
42 char name
[DIGIC_TIMER_NAME_MLEN
];
44 snprintf(name
, DIGIC_TIMER_NAME_MLEN
, "timer[%d]", i
);
45 sysbus_init_child_obj(obj
, name
, &s
->timer
[i
], sizeof(s
->timer
[i
]),
49 sysbus_init_child_obj(obj
, "uart", &s
->uart
, sizeof(s
->uart
),
53 static void digic_realize(DeviceState
*dev
, Error
**errp
)
55 DigicState
*s
= DIGIC(dev
);
60 object_property_set_bool(OBJECT(&s
->cpu
), true, "reset-hivecs", &err
);
62 error_propagate(errp
, err
);
66 object_property_set_bool(OBJECT(&s
->cpu
), true, "realized", &err
);
68 error_propagate(errp
, err
);
72 for (i
= 0; i
< DIGIC4_NB_TIMERS
; i
++) {
73 object_property_set_bool(OBJECT(&s
->timer
[i
]), true, "realized", &err
);
75 error_propagate(errp
, err
);
79 sbd
= SYS_BUS_DEVICE(&s
->timer
[i
]);
80 sysbus_mmio_map(sbd
, 0, DIGIC4_TIMER_BASE(i
));
83 qdev_prop_set_chr(DEVICE(&s
->uart
), "chardev", serial_hd(0));
84 object_property_set_bool(OBJECT(&s
->uart
), true, "realized", &err
);
86 error_propagate(errp
, err
);
90 sbd
= SYS_BUS_DEVICE(&s
->uart
);
91 sysbus_mmio_map(sbd
, 0, DIGIC_UART_BASE
);
94 static void digic_class_init(ObjectClass
*oc
, void *data
)
96 DeviceClass
*dc
= DEVICE_CLASS(oc
);
98 dc
->realize
= digic_realize
;
99 /* Reason: Uses serial_hds in the realize function --> not usable twice */
100 dc
->user_creatable
= false;
103 static const TypeInfo digic_type_info
= {
105 .parent
= TYPE_DEVICE
,
106 .instance_size
= sizeof(DigicState
),
107 .instance_init
= digic_init
,
108 .class_init
= digic_class_init
,
111 static void digic_register_types(void)
113 type_register_static(&digic_type_info
);
116 type_init(digic_register_types
)