hw/arm/exynos4_boards.c

   1 /*
   2  *  Samsung exynos4 SoC based boards emulation
   3  *
   4  *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
   5  *    Maksim Kozlov <m.kozlov@samsung.com>
   6  *    Evgeny Voevodin <e.voevodin@samsung.com>
   7  *    Igor Mitsyanko  <i.mitsyanko@samsung.com>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License as published by the
  11  *  Free Software Foundation; either version 2 of the License, or
  12  *  (at your option) any later version.
  13  *
  14  *  This program is distributed in the hope that it will be useful, but WITHOUT
  15  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  17  *  for more details.
  18  *
  19  *  You should have received a copy of the GNU General Public License along
  20  *  with this program; if not, see <http://www.gnu.org/licenses/>.
  21  *
  22  */
  23
  24 #include "qemu/osdep.h"
  25 #include "qemu/units.h"
  26 #include "qapi/error.h"
  27 #include "qemu/error-report.h"
  28 #include "cpu.h"
  29 #include "sysemu/sysemu.h"
  30 #include "hw/sysbus.h"
  31 #include "net/net.h"
  32 #include "hw/arm/boot.h"
  33 #include "exec/address-spaces.h"
  34 #include "hw/arm/exynos4210.h"
  35 #include "hw/net/lan9118.h"
  36 #include "hw/boards.h"
  37
  38 #define SMDK_LAN9118_BASE_ADDR      0x05000000
  39
  40 typedef enum Exynos4BoardType {
  41     EXYNOS4_BOARD_NURI,
  42     EXYNOS4_BOARD_SMDKC210,
  43     EXYNOS4_NUM_OF_BOARDS
  44 } Exynos4BoardType;
  45
  46 typedef struct Exynos4BoardState {
  47     Exynos4210State soc;
  48     MemoryRegion dram0_mem;
  49     MemoryRegion dram1_mem;
  50 } Exynos4BoardState;
  51
  52 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
  53     [EXYNOS4_BOARD_NURI]     = 0xD33,
  54     [EXYNOS4_BOARD_SMDKC210] = 0xB16,
  55 };
  56
  57 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
  58     [EXYNOS4_BOARD_NURI]     = EXYNOS4210_SECOND_CPU_BOOTREG,
  59     [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
  60 };
  61
  62 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
  63     [EXYNOS4_BOARD_NURI]     = 1 * GiB,
  64     [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
  65 };
  66
  67 static struct arm_boot_info exynos4_board_binfo = {
  68     .loader_start     = EXYNOS4210_BASE_BOOT_ADDR,
  69     .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
  70     .nb_cpus          = EXYNOS4210_NCPUS,
  71     .write_secondary_boot = exynos4210_write_secondary,
  72 };
  73
  74 static void lan9215_init(uint32_t base, qemu_irq irq)
  75 {
  76     DeviceState *dev;
  77     SysBusDevice *s;
  78
  79     /* This should be a 9215 but the 9118 is close enough */
  80     if (nd_table[0].used) {
  81         qemu_check_nic_model(&nd_table[0], "lan9118");
  82         dev = qdev_create(NULL, TYPE_LAN9118);
  83         qdev_set_nic_properties(dev, &nd_table[0]);
  84         qdev_prop_set_uint32(dev, "mode_16bit", 1);
  85         qdev_init_nofail(dev);
  86         s = SYS_BUS_DEVICE(dev);
  87         sysbus_mmio_map(s, 0, base);
  88         sysbus_connect_irq(s, 0, irq);
  89     }
  90 }
  91
  92 static void exynos4_boards_init_ram(Exynos4BoardState *s,
  93                                     MemoryRegion *system_mem,
  94                                     unsigned long ram_size)
  95 {
  96     unsigned long mem_size = ram_size;
  97
  98     if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
  99         memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
 100                                mem_size - EXYNOS4210_DRAM_MAX_SIZE,
 101                                &error_fatal);
 102         memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
 103                                     &s->dram1_mem);
 104         mem_size = EXYNOS4210_DRAM_MAX_SIZE;
 105     }
 106
 107     memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
 108                            &error_fatal);
 109     memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
 110                                 &s->dram0_mem);
 111 }
 112
 113 static Exynos4BoardState *
 114 exynos4_boards_init_common(MachineState *machine,
 115                            Exynos4BoardType board_type)
 116 {
 117     Exynos4BoardState *s = g_new(Exynos4BoardState, 1);
 118
 119     exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
 120     exynos4_board_binfo.board_id = exynos4_board_id[board_type];
 121     exynos4_board_binfo.smp_bootreg_addr =
 122             exynos4_board_smp_bootreg_addr[board_type];
 123     exynos4_board_binfo.kernel_filename = machine->kernel_filename;
 124     exynos4_board_binfo.initrd_filename = machine->initrd_filename;
 125     exynos4_board_binfo.kernel_cmdline = machine->kernel_cmdline;
 126     exynos4_board_binfo.gic_cpu_if_addr =
 127             EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
 128
 129     exynos4_boards_init_ram(s, get_system_memory(),
 130                             exynos4_board_ram_size[board_type]);
 131
 132     object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC);
 133     qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default());
 134     object_property_set_bool(OBJECT(&s->soc), true, "realized",
 135                              &error_fatal);
 136
 137     return s;
 138 }
 139
 140 static void nuri_init(MachineState *machine)
 141 {
 142     exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI);
 143
 144     arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
 145 }
 146
 147 static void smdkc210_init(MachineState *machine)
 148 {
 149     Exynos4BoardState *s = exynos4_boards_init_common(machine,
 150                                                       EXYNOS4_BOARD_SMDKC210);
 151
 152     lan9215_init(SMDK_LAN9118_BASE_ADDR,
 153             qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
 154     arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
 155 }
 156
 157 static void nuri_class_init(ObjectClass *oc, void *data)
 158 {
 159     MachineClass *mc = MACHINE_CLASS(oc);
 160
 161     mc->desc = "Samsung NURI board (Exynos4210)";
 162     mc->init = nuri_init;
 163     mc->max_cpus = EXYNOS4210_NCPUS;
 164     mc->min_cpus = EXYNOS4210_NCPUS;
 165     mc->default_cpus = EXYNOS4210_NCPUS;
 166     mc->ignore_memory_transaction_failures = true;
 167 }
 168
 169 static const TypeInfo nuri_type = {
 170     .name = MACHINE_TYPE_NAME("nuri"),
 171     .parent = TYPE_MACHINE,
 172     .class_init = nuri_class_init,
 173 };
 174
 175 static void smdkc210_class_init(ObjectClass *oc, void *data)
 176 {
 177     MachineClass *mc = MACHINE_CLASS(oc);
 178
 179     mc->desc = "Samsung SMDKC210 board (Exynos4210)";
 180     mc->init = smdkc210_init;
 181     mc->max_cpus = EXYNOS4210_NCPUS;
 182     mc->min_cpus = EXYNOS4210_NCPUS;
 183     mc->default_cpus = EXYNOS4210_NCPUS;
 184     mc->ignore_memory_transaction_failures = true;
 185 }
 186
 187 static const TypeInfo smdkc210_type = {
 188     .name = MACHINE_TYPE_NAME("smdkc210"),
 189     .parent = TYPE_MACHINE,
 190     .class_init = smdkc210_class_init,
 191 };
 192
 193 static void exynos4_machines_init(void)
 194 {
 195     type_register_static(&nuri_type);
 196     type_register_static(&smdkc210_type);
 197 }
 198
 199 type_init(exynos4_machines_init)