2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
5 * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
8 * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti
9 * Upstream code cleanup (c) 2018 Pekka Enberg
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
15 #include "qemu/osdep.h"
16 #include "qemu/units.h"
17 #include "qemu/cutils.h"
18 #include "qapi/error.h"
20 #include "hw/arm/bcm2836.h"
21 #include "hw/registerfields.h"
22 #include "qemu/error-report.h"
23 #include "hw/boards.h"
24 #include "hw/loader.h"
25 #include "hw/arm/boot.h"
26 #include "sysemu/sysemu.h"
27 #include "qom/object.h"
29 #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */
30 #define MVBAR_ADDR 0x400 /* secure vectors */
31 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
32 #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */
33 #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */
34 #define SPINTABLE_ADDR 0xd8 /* Pi 3 bootloader spintable */
36 /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */
37 #define MACH_TYPE_BCM2708 3138
39 struct RaspiMachineState
{
41 MachineState parent_obj
;
44 struct arm_boot_info binfo
;
46 typedef struct RaspiMachineState RaspiMachineState
;
48 struct RaspiMachineClass
{
50 MachineClass parent_obj
;
54 typedef struct RaspiMachineClass RaspiMachineClass
;
56 #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common")
57 DECLARE_OBJ_CHECKERS(RaspiMachineState
, RaspiMachineClass
,
58 RASPI_MACHINE
, TYPE_RASPI_MACHINE
)
62 * Board revision codes:
63 * www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/
65 FIELD(REV_CODE
, REVISION
, 0, 4);
66 FIELD(REV_CODE
, TYPE
, 4, 8);
67 FIELD(REV_CODE
, PROCESSOR
, 12, 4);
68 FIELD(REV_CODE
, MANUFACTURER
, 16, 4);
69 FIELD(REV_CODE
, MEMORY_SIZE
, 20, 3);
70 FIELD(REV_CODE
, STYLE
, 23, 1);
72 typedef enum RaspiProcessorId
{
73 PROCESSOR_ID_BCM2836
= 1,
74 PROCESSOR_ID_BCM2837
= 2,
81 [PROCESSOR_ID_BCM2836
] = {TYPE_BCM2836
, BCM283X_NCPUS
},
82 [PROCESSOR_ID_BCM2837
] = {TYPE_BCM2837
, BCM283X_NCPUS
},
85 static uint64_t board_ram_size(uint32_t board_rev
)
87 assert(FIELD_EX32(board_rev
, REV_CODE
, STYLE
)); /* Only new style */
88 return 256 * MiB
<< FIELD_EX32(board_rev
, REV_CODE
, MEMORY_SIZE
);
91 static RaspiProcessorId
board_processor_id(uint32_t board_rev
)
93 int proc_id
= FIELD_EX32(board_rev
, REV_CODE
, PROCESSOR
);
95 assert(FIELD_EX32(board_rev
, REV_CODE
, STYLE
)); /* Only new style */
96 assert(proc_id
< ARRAY_SIZE(soc_property
) && soc_property
[proc_id
].type
);
101 static int board_version(uint32_t board_rev
)
103 return board_processor_id(board_rev
) + 1;
106 static const char *board_soc_type(uint32_t board_rev
)
108 return soc_property
[board_processor_id(board_rev
)].type
;
111 static int cores_count(uint32_t board_rev
)
113 return soc_property
[board_processor_id(board_rev
)].cores_count
;
116 static const char *board_type(uint32_t board_rev
)
118 static const char *types
[] = {
119 "A", "B", "A+", "B+", "2B", "Alpha", "CM1", NULL
, "3B", "Zero",
120 "CM3", NULL
, "Zero W", "3B+", "3A+", NULL
, "CM3+", "4B",
122 assert(FIELD_EX32(board_rev
, REV_CODE
, STYLE
)); /* Only new style */
123 int bt
= FIELD_EX32(board_rev
, REV_CODE
, TYPE
);
124 if (bt
>= ARRAY_SIZE(types
) || !types
[bt
]) {
130 static void write_smpboot(ARMCPU
*cpu
, const struct arm_boot_info
*info
)
132 static const uint32_t smpboot
[] = {
133 0xe1a0e00f, /* mov lr, pc */
134 0xe3a0fe00 + (BOARDSETUP_ADDR
>> 4), /* mov pc, BOARDSETUP_ADDR */
135 0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5;get core ID */
136 0xe7e10050, /* ubfx r0, r0, #0, #2 ;extract LSB */
137 0xe59f5014, /* ldr r5, =0x400000CC ;load mbox base */
138 0xe320f001, /* 1: yield */
139 0xe7953200, /* ldr r3, [r5, r0, lsl #4] ;read mbox for our core*/
140 0xe3530000, /* cmp r3, #0 ;spin while zero */
141 0x0afffffb, /* beq 1b */
142 0xe7853200, /* str r3, [r5, r0, lsl #4] ;clear mbox */
143 0xe12fff13, /* bx r3 ;jump to target */
144 0x400000cc, /* (constant: mailbox 3 read/clear base) */
147 /* check that we don't overrun board setup vectors */
148 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR
+ sizeof(smpboot
) > MVBAR_ADDR
);
149 /* check that board setup address is correctly relocated */
150 QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR
& 0xf) != 0
151 || (BOARDSETUP_ADDR
>> 4) >= 0x100);
153 rom_add_blob_fixed_as("raspi_smpboot", smpboot
, sizeof(smpboot
),
154 info
->smp_loader_start
,
155 arm_boot_address_space(cpu
, info
));
158 static void write_smpboot64(ARMCPU
*cpu
, const struct arm_boot_info
*info
)
160 AddressSpace
*as
= arm_boot_address_space(cpu
, info
);
161 /* Unlike the AArch32 version we don't need to call the board setup hook.
162 * The mechanism for doing the spin-table is also entirely different.
163 * We must have four 64-bit fields at absolute addresses
164 * 0xd8, 0xe0, 0xe8, 0xf0 in RAM, which are the flag variables for
165 * our CPUs, and which we must ensure are zero initialized before
166 * the primary CPU goes into the kernel. We put these variables inside
167 * a rom blob, so that the reset for ROM contents zeroes them for us.
169 static const uint32_t smpboot
[] = {
170 0xd2801b05, /* mov x5, 0xd8 */
171 0xd53800a6, /* mrs x6, mpidr_el1 */
172 0x924004c6, /* and x6, x6, #0x3 */
173 0xd503205f, /* spin: wfe */
174 0xf86678a4, /* ldr x4, [x5,x6,lsl #3] */
175 0xb4ffffc4, /* cbz x4, spin */
176 0xd2800000, /* mov x0, #0x0 */
177 0xd2800001, /* mov x1, #0x0 */
178 0xd2800002, /* mov x2, #0x0 */
179 0xd2800003, /* mov x3, #0x0 */
180 0xd61f0080, /* br x4 */
183 static const uint64_t spintables
[] = {
187 rom_add_blob_fixed_as("raspi_smpboot", smpboot
, sizeof(smpboot
),
188 info
->smp_loader_start
, as
);
189 rom_add_blob_fixed_as("raspi_spintables", spintables
, sizeof(spintables
),
193 static void write_board_setup(ARMCPU
*cpu
, const struct arm_boot_info
*info
)
195 arm_write_secure_board_setup_dummy_smc(cpu
, info
, MVBAR_ADDR
);
198 static void reset_secondary(ARMCPU
*cpu
, const struct arm_boot_info
*info
)
200 CPUState
*cs
= CPU(cpu
);
201 cpu_set_pc(cs
, info
->smp_loader_start
);
204 static void setup_boot(MachineState
*machine
, int version
, size_t ram_size
)
206 RaspiMachineState
*s
= RASPI_MACHINE(machine
);
209 s
->binfo
.board_id
= MACH_TYPE_BCM2708
;
210 s
->binfo
.ram_size
= ram_size
;
211 s
->binfo
.nb_cpus
= machine
->smp
.cpus
;
214 /* The rpi1 and 2 require some custom setup code to run in Secure
215 * mode before booting a kernel (to set up the SMC vectors so
216 * that we get a no-op SMC; this is used by Linux to call the
217 * firmware for some cache maintenance operations.
218 * The rpi3 doesn't need this.
220 s
->binfo
.board_setup_addr
= BOARDSETUP_ADDR
;
221 s
->binfo
.write_board_setup
= write_board_setup
;
222 s
->binfo
.secure_board_setup
= true;
223 s
->binfo
.secure_boot
= true;
226 /* Pi2 and Pi3 requires SMP setup */
228 s
->binfo
.smp_loader_start
= SMPBOOT_ADDR
;
230 s
->binfo
.write_secondary_boot
= write_smpboot
;
232 s
->binfo
.write_secondary_boot
= write_smpboot64
;
234 s
->binfo
.secondary_cpu_reset_hook
= reset_secondary
;
237 /* If the user specified a "firmware" image (e.g. UEFI), we bypass
238 * the normal Linux boot process
240 if (machine
->firmware
) {
241 hwaddr firmware_addr
= version
== 3 ? FIRMWARE_ADDR_3
: FIRMWARE_ADDR_2
;
242 /* load the firmware image (typically kernel.img) */
243 r
= load_image_targphys(machine
->firmware
, firmware_addr
,
244 ram_size
- firmware_addr
);
246 error_report("Failed to load firmware from %s", machine
->firmware
);
250 s
->binfo
.entry
= firmware_addr
;
251 s
->binfo
.firmware_loaded
= true;
254 arm_load_kernel(&s
->soc
.cpu
[0].core
, machine
, &s
->binfo
);
257 static void raspi_machine_init(MachineState
*machine
)
259 RaspiMachineClass
*mc
= RASPI_MACHINE_GET_CLASS(machine
);
260 RaspiMachineState
*s
= RASPI_MACHINE(machine
);
261 uint32_t board_rev
= mc
->board_rev
;
262 int version
= board_version(board_rev
);
263 uint64_t ram_size
= board_ram_size(board_rev
);
268 DeviceState
*carddev
;
270 if (machine
->ram_size
!= ram_size
) {
271 char *size_str
= size_to_str(ram_size
);
272 error_report("Invalid RAM size, should be %s", size_str
);
277 /* FIXME: Remove when we have custom CPU address space support */
278 memory_region_add_subregion_overlap(get_system_memory(), 0,
282 object_initialize_child(OBJECT(machine
), "soc", &s
->soc
,
283 board_soc_type(board_rev
));
284 object_property_add_const_link(OBJECT(&s
->soc
), "ram", OBJECT(machine
->ram
));
285 object_property_set_int(OBJECT(&s
->soc
), "board-rev", board_rev
,
287 qdev_realize(DEVICE(&s
->soc
), NULL
, &error_abort
);
289 /* Create and plug in the SD cards */
290 di
= drive_get_next(IF_SD
);
291 blk
= di
? blk_by_legacy_dinfo(di
) : NULL
;
292 bus
= qdev_get_child_bus(DEVICE(&s
->soc
), "sd-bus");
294 error_report("No SD bus found in SOC object");
297 carddev
= qdev_new(TYPE_SD_CARD
);
298 qdev_prop_set_drive_err(carddev
, "drive", blk
, &error_fatal
);
299 qdev_realize_and_unref(carddev
, bus
, &error_fatal
);
301 vcram_size
= object_property_get_uint(OBJECT(&s
->soc
), "vcram-size",
303 setup_boot(machine
, version
, machine
->ram_size
- vcram_size
);
306 static void raspi_machine_class_common_init(MachineClass
*mc
,
309 mc
->desc
= g_strdup_printf("Raspberry Pi %s (revision 1.%u)",
310 board_type(board_rev
),
311 FIELD_EX32(board_rev
, REV_CODE
, REVISION
));
312 mc
->init
= raspi_machine_init
;
313 mc
->block_default_type
= IF_SD
;
317 mc
->default_cpus
= mc
->min_cpus
= mc
->max_cpus
= cores_count(board_rev
);
318 mc
->default_ram_size
= board_ram_size(board_rev
);
319 mc
->default_ram_id
= "ram";
322 static void raspi2b_machine_class_init(ObjectClass
*oc
, void *data
)
324 MachineClass
*mc
= MACHINE_CLASS(oc
);
325 RaspiMachineClass
*rmc
= RASPI_MACHINE_CLASS(oc
);
327 mc
->alias
= "raspi2";
328 rmc
->board_rev
= 0xa21041;
329 raspi_machine_class_common_init(mc
, rmc
->board_rev
);
332 #ifdef TARGET_AARCH64
333 static void raspi3b_machine_class_init(ObjectClass
*oc
, void *data
)
335 MachineClass
*mc
= MACHINE_CLASS(oc
);
336 RaspiMachineClass
*rmc
= RASPI_MACHINE_CLASS(oc
);
338 mc
->alias
= "raspi3";
339 rmc
->board_rev
= 0xa02082;
340 raspi_machine_class_common_init(mc
, rmc
->board_rev
);
342 #endif /* TARGET_AARCH64 */
344 static const TypeInfo raspi_machine_types
[] = {
346 .name
= MACHINE_TYPE_NAME("raspi2b"),
347 .parent
= TYPE_RASPI_MACHINE
,
348 .class_init
= raspi2b_machine_class_init
,
349 #ifdef TARGET_AARCH64
351 .name
= MACHINE_TYPE_NAME("raspi3b"),
352 .parent
= TYPE_RASPI_MACHINE
,
353 .class_init
= raspi3b_machine_class_init
,
356 .name
= TYPE_RASPI_MACHINE
,
357 .parent
= TYPE_MACHINE
,
358 .instance_size
= sizeof(RaspiMachineState
),
359 .class_size
= sizeof(RaspiMachineClass
),
364 DEFINE_TYPES(raspi_machine_types
)