hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qapi/error.h"
  15 #include "hw/arm/pxa.h"
  16 #include "hw/arm/boot.h"
  17 #include "sysemu/runstate.h"
  18 #include "sysemu/sysemu.h"
  19 #include "hw/pcmcia.h"
  20 #include "hw/qdev-properties.h"
  21 #include "hw/i2c/i2c.h"
  22 #include "hw/irq.h"
  23 #include "hw/ssi/ssi.h"
  24 #include "hw/block/flash.h"
  25 #include "qemu/timer.h"
  26 #include "hw/arm/sharpsl.h"
  27 #include "ui/console.h"
  28 #include "hw/audio/wm8750.h"
  29 #include "audio/audio.h"
  30 #include "hw/boards.h"
  31 #include "hw/sysbus.h"
  32 #include "migration/vmstate.h"
  33 #include "exec/address-spaces.h"
  34 #include "cpu.h"
  35
  36 enum spitz_model_e { spitz, akita, borzoi, terrier };
  37
  38 typedef struct {
  39     MachineClass parent;
  40     enum spitz_model_e model;
  41     int arm_id;
  42 } SpitzMachineClass;
  43
  44 typedef struct {
  45     MachineState parent;
  46     PXA2xxState *mpu;
  47     DeviceState *mux;
  48     DeviceState *lcdtg;
  49     DeviceState *ads7846;
  50     DeviceState *max1111;
  51 } SpitzMachineState;
  52
  53 #define TYPE_SPITZ_MACHINE "spitz-common"
  54 #define SPITZ_MACHINE(obj) \
  55     OBJECT_CHECK(SpitzMachineState, obj, TYPE_SPITZ_MACHINE)
  56 #define SPITZ_MACHINE_GET_CLASS(obj) \
  57     OBJECT_GET_CLASS(SpitzMachineClass, obj, TYPE_SPITZ_MACHINE)
  58 #define SPITZ_MACHINE_CLASS(klass) \
  59     OBJECT_CLASS_CHECK(SpitzMachineClass, klass, TYPE_SPITZ_MACHINE)
  60
  61 #undef REG_FMT
  62 #define REG_FMT                         "0x%02lx"
  63
  64 /* Spitz Flash */
  65 #define FLASH_BASE              0x0c000000
  66 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  67 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  68 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  69 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  70 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  71 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  72 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  73
  74 #define FLASHCTL_CE0            (1 << 0)
  75 #define FLASHCTL_CLE            (1 << 1)
  76 #define FLASHCTL_ALE            (1 << 2)
  77 #define FLASHCTL_WP             (1 << 3)
  78 #define FLASHCTL_CE1            (1 << 4)
  79 #define FLASHCTL_RYBY           (1 << 5)
  80 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  81
  82 #define TYPE_SL_NAND "sl-nand"
  83 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  84
  85 typedef struct {
  86     SysBusDevice parent_obj;
  87
  88     MemoryRegion iomem;
  89     DeviceState *nand;
  90     uint8_t ctl;
  91     uint8_t manf_id;
  92     uint8_t chip_id;
  93     ECCState ecc;
  94 } SLNANDState;
  95
  96 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  97 {
  98     SLNANDState *s = (SLNANDState *) opaque;
  99     int ryby;
 100
 101     switch (addr) {
 102 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
 103     case FLASH_ECCLPLB:
 104         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
 105                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
 106
 107 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
 108     case FLASH_ECCLPUB:
 109         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
 110                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
 111
 112     case FLASH_ECCCP:
 113         return s->ecc.cp;
 114
 115     case FLASH_ECCCNTR:
 116         return s->ecc.count & 0xff;
 117
 118     case FLASH_FLASHCTL:
 119         nand_getpins(s->nand, &ryby);
 120         if (ryby)
 121             return s->ctl | FLASHCTL_RYBY;
 122         else
 123             return s->ctl;
 124
 125     case FLASH_FLASHIO:
 126         if (size == 4) {
 127             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 128                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 129         }
 130         return ecc_digest(&s->ecc, nand_getio(s->nand));
 131
 132     default:
 133         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 134     }
 135     return 0;
 136 }
 137
 138 static void sl_write(void *opaque, hwaddr addr,
 139                      uint64_t value, unsigned size)
 140 {
 141     SLNANDState *s = (SLNANDState *) opaque;
 142
 143     switch (addr) {
 144     case FLASH_ECCCLRR:
 145         /* Value is ignored.  */
 146         ecc_reset(&s->ecc);
 147         break;
 148
 149     case FLASH_FLASHCTL:
 150         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 151         nand_setpins(s->nand,
 152                         s->ctl & FLASHCTL_CLE,
 153                         s->ctl & FLASHCTL_ALE,
 154                         s->ctl & FLASHCTL_NCE,
 155                         s->ctl & FLASHCTL_WP,
 156                         0);
 157         break;
 158
 159     case FLASH_FLASHIO:
 160         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 161         break;
 162
 163     default:
 164         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 165     }
 166 }
 167
 168 enum {
 169     FLASH_128M,
 170     FLASH_1024M,
 171 };
 172
 173 static const MemoryRegionOps sl_ops = {
 174     .read = sl_read,
 175     .write = sl_write,
 176     .endianness = DEVICE_NATIVE_ENDIAN,
 177 };
 178
 179 static void sl_flash_register(PXA2xxState *cpu, int size)
 180 {
 181     DeviceState *dev;
 182
 183     dev = qdev_new(TYPE_SL_NAND);
 184
 185     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 186     if (size == FLASH_128M)
 187         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 188     else if (size == FLASH_1024M)
 189         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 190
 191     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 192     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 193 }
 194
 195 static void sl_nand_init(Object *obj)
 196 {
 197     SLNANDState *s = SL_NAND(obj);
 198     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 199
 200     s->ctl = 0;
 201
 202     memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
 203     sysbus_init_mmio(dev, &s->iomem);
 204 }
 205
 206 static void sl_nand_realize(DeviceState *dev, Error **errp)
 207 {
 208     SLNANDState *s = SL_NAND(dev);
 209     DriveInfo *nand;
 210
 211     /* FIXME use a qdev drive property instead of drive_get() */
 212     nand = drive_get(IF_MTD, 0, 0);
 213     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 214                         s->manf_id, s->chip_id);
 215 }
 216
 217 /* Spitz Keyboard */
 218
 219 #define SPITZ_KEY_STROBE_NUM    11
 220 #define SPITZ_KEY_SENSE_NUM     7
 221
 222 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 223     12, 17, 91, 34, 36, 38, 39
 224 };
 225
 226 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 227     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 228 };
 229
 230 /* Eighth additional row maps the special keys */
 231 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 232     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 233     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 234     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 235     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 236     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 237     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 238     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 239     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 240 };
 241
 242 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 243 #define SPITZ_GPIO_SYNC                 16      /* Sync button */
 244 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 245 #define SPITZ_GPIO_SWA          97      /* Lid */
 246 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 247
 248 /* The special buttons are mapped to unused keys */
 249 static const int spitz_gpiomap[5] = {
 250     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 251     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 252 };
 253
 254 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 255 #define SPITZ_KEYBOARD(obj) \
 256     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 257
 258 typedef struct {
 259     SysBusDevice parent_obj;
 260
 261     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 262     qemu_irq gpiomap[5];
 263     int keymap[0x80];
 264     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 265     uint16_t strobe_state;
 266     uint16_t sense_state;
 267
 268     uint16_t pre_map[0x100];
 269     uint16_t modifiers;
 270     uint16_t imodifiers;
 271     uint8_t fifo[16];
 272     int fifopos, fifolen;
 273     QEMUTimer *kbdtimer;
 274 } SpitzKeyboardState;
 275
 276 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 277 {
 278     int i;
 279     uint16_t strobe, sense = 0;
 280     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 281         strobe = s->keyrow[i] & s->strobe_state;
 282         if (strobe) {
 283             sense |= 1 << i;
 284             if (!(s->sense_state & (1 << i)))
 285                 qemu_irq_raise(s->sense[i]);
 286         } else if (s->sense_state & (1 << i))
 287             qemu_irq_lower(s->sense[i]);
 288     }
 289
 290     s->sense_state = sense;
 291 }
 292
 293 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 294 {
 295     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 296
 297     if (level)
 298         s->strobe_state |= 1 << line;
 299     else
 300         s->strobe_state &= ~(1 << line);
 301     spitz_keyboard_sense_update(s);
 302 }
 303
 304 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 305 {
 306     int spitz_keycode = s->keymap[keycode & 0x7f];
 307     if (spitz_keycode == -1)
 308         return;
 309
 310     /* Handle the additional keys */
 311     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 312         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 313         return;
 314     }
 315
 316     if (keycode & 0x80)
 317         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 318     else
 319         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 320
 321     spitz_keyboard_sense_update(s);
 322 }
 323
 324 #define SPITZ_MOD_SHIFT   (1 << 7)
 325 #define SPITZ_MOD_CTRL    (1 << 8)
 326 #define SPITZ_MOD_FN      (1 << 9)
 327
 328 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 329
 330 static void spitz_keyboard_handler(void *opaque, int keycode)
 331 {
 332     SpitzKeyboardState *s = opaque;
 333     uint16_t code;
 334     int mapcode;
 335     switch (keycode) {
 336     case 0x2a:  /* Left Shift */
 337         s->modifiers |= 1;
 338         break;
 339     case 0xaa:
 340         s->modifiers &= ~1;
 341         break;
 342     case 0x36:  /* Right Shift */
 343         s->modifiers |= 2;
 344         break;
 345     case 0xb6:
 346         s->modifiers &= ~2;
 347         break;
 348     case 0x1d:  /* Control */
 349         s->modifiers |= 4;
 350         break;
 351     case 0x9d:
 352         s->modifiers &= ~4;
 353         break;
 354     case 0x38:  /* Alt */
 355         s->modifiers |= 8;
 356         break;
 357     case 0xb8:
 358         s->modifiers &= ~8;
 359         break;
 360     }
 361
 362     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 363             (keycode | SPITZ_MOD_SHIFT) :
 364             (keycode & ~SPITZ_MOD_SHIFT))];
 365
 366     if (code != mapcode) {
 367 #if 0
 368         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 369             QUEUE_KEY(0x2a | (keycode & 0x80));
 370         }
 371         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 372             QUEUE_KEY(0x1d | (keycode & 0x80));
 373         }
 374         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 375             QUEUE_KEY(0x38 | (keycode & 0x80));
 376         }
 377         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 378             QUEUE_KEY(0x2a | (~keycode & 0x80));
 379         }
 380         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 381             QUEUE_KEY(0x36 | (~keycode & 0x80));
 382         }
 383 #else
 384         if (keycode & 0x80) {
 385             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 386                 QUEUE_KEY(0x2a | 0x80);
 387             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 388                 QUEUE_KEY(0x1d | 0x80);
 389             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 390                 QUEUE_KEY(0x38 | 0x80);
 391             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 392                 QUEUE_KEY(0x2a);
 393             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 394                 QUEUE_KEY(0x36);
 395             s->imodifiers = 0;
 396         } else {
 397             if ((code & SPITZ_MOD_SHIFT) &&
 398                 !((s->modifiers | s->imodifiers) & 1)) {
 399                 QUEUE_KEY(0x2a);
 400                 s->imodifiers |= 1;
 401             }
 402             if ((code & SPITZ_MOD_CTRL) &&
 403                 !((s->modifiers | s->imodifiers) & 4)) {
 404                 QUEUE_KEY(0x1d);
 405                 s->imodifiers |= 4;
 406             }
 407             if ((code & SPITZ_MOD_FN) &&
 408                 !((s->modifiers | s->imodifiers) & 8)) {
 409                 QUEUE_KEY(0x38);
 410                 s->imodifiers |= 8;
 411             }
 412             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 413                             !(s->imodifiers & 0x10)) {
 414                 QUEUE_KEY(0x2a | 0x80);
 415                 s->imodifiers |= 0x10;
 416             }
 417             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 418                             !(s->imodifiers & 0x20)) {
 419                 QUEUE_KEY(0x36 | 0x80);
 420                 s->imodifiers |= 0x20;
 421             }
 422         }
 423 #endif
 424     }
 425
 426     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 427 }
 428
 429 static void spitz_keyboard_tick(void *opaque)
 430 {
 431     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 432
 433     if (s->fifolen) {
 434         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 435         s->fifolen --;
 436         if (s->fifopos >= 16)
 437             s->fifopos = 0;
 438     }
 439
 440     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 441                    NANOSECONDS_PER_SECOND / 32);
 442 }
 443
 444 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 445 {
 446     int i;
 447     for (i = 0; i < 0x100; i ++)
 448         s->pre_map[i] = i;
 449     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 450     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 451     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 452     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 453     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 454     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 455     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 456     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 457     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 458     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 459     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 460     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 461     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 462     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 463     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 464     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 465     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 466     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 467     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 468     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 469     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 470     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 471     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 472     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 473     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 474     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 475     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 476     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 477     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 478     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 479     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 480     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 481
 482     s->modifiers = 0;
 483     s->imodifiers = 0;
 484     s->fifopos = 0;
 485     s->fifolen = 0;
 486 }
 487
 488 #undef SPITZ_MOD_SHIFT
 489 #undef SPITZ_MOD_CTRL
 490 #undef SPITZ_MOD_FN
 491
 492 static int spitz_keyboard_post_load(void *opaque, int version_id)
 493 {
 494     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 495
 496     /* Release all pressed keys */
 497     memset(s->keyrow, 0, sizeof(s->keyrow));
 498     spitz_keyboard_sense_update(s);
 499     s->modifiers = 0;
 500     s->imodifiers = 0;
 501     s->fifopos = 0;
 502     s->fifolen = 0;
 503
 504     return 0;
 505 }
 506
 507 static void spitz_keyboard_register(PXA2xxState *cpu)
 508 {
 509     int i;
 510     DeviceState *dev;
 511     SpitzKeyboardState *s;
 512
 513     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 514     s = SPITZ_KEYBOARD(dev);
 515
 516     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 517         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 518
 519     for (i = 0; i < 5; i ++)
 520         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 521
 522     if (!graphic_rotate)
 523         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 524
 525     for (i = 0; i < 5; i++)
 526         qemu_set_irq(s->gpiomap[i], 0);
 527
 528     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 529         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 530                 qdev_get_gpio_in(dev, i));
 531
 532     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 533
 534     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 535 }
 536
 537 static void spitz_keyboard_init(Object *obj)
 538 {
 539     DeviceState *dev = DEVICE(obj);
 540     SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
 541     int i, j;
 542
 543     for (i = 0; i < 0x80; i ++)
 544         s->keymap[i] = -1;
 545     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 546         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 547             if (spitz_keymap[i][j] != -1)
 548                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 549
 550     spitz_keyboard_pre_map(s);
 551
 552     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 553     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 554 }
 555
 556 static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
 557 {
 558     SpitzKeyboardState *s = SPITZ_KEYBOARD(dev);
 559     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 560 }
 561
 562 /* LCD backlight controller */
 563
 564 #define LCDTG_RESCTL    0x00
 565 #define LCDTG_PHACTRL   0x01
 566 #define LCDTG_DUTYCTRL  0x02
 567 #define LCDTG_POWERREG0         0x03
 568 #define LCDTG_POWERREG1         0x04
 569 #define LCDTG_GPOR3     0x05
 570 #define LCDTG_PICTRL    0x06
 571 #define LCDTG_POLCTRL   0x07
 572
 573 typedef struct {
 574     SSISlave ssidev;
 575     uint32_t bl_intensity;
 576     uint32_t bl_power;
 577 } SpitzLCDTG;
 578
 579 static void spitz_bl_update(SpitzLCDTG *s)
 580 {
 581     if (s->bl_power && s->bl_intensity)
 582         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 583     else
 584         zaurus_printf("LCD Backlight now off\n");
 585 }
 586
 587 /* FIXME: Implement GPIO properly and remove this hack.  */
 588 static SpitzLCDTG *spitz_lcdtg;
 589
 590 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 591 {
 592     SpitzLCDTG *s = spitz_lcdtg;
 593     int prev = s->bl_intensity;
 594
 595     if (level)
 596         s->bl_intensity &= ~0x20;
 597     else
 598         s->bl_intensity |= 0x20;
 599
 600     if (s->bl_power && prev != s->bl_intensity)
 601         spitz_bl_update(s);
 602 }
 603
 604 static inline void spitz_bl_power(void *opaque, int line, int level)
 605 {
 606     SpitzLCDTG *s = spitz_lcdtg;
 607     s->bl_power = !!level;
 608     spitz_bl_update(s);
 609 }
 610
 611 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 612 {
 613     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 614     int addr;
 615     addr = value >> 5;
 616     value &= 0x1f;
 617
 618     switch (addr) {
 619     case LCDTG_RESCTL:
 620         if (value)
 621             zaurus_printf("LCD in QVGA mode\n");
 622         else
 623             zaurus_printf("LCD in VGA mode\n");
 624         break;
 625
 626     case LCDTG_DUTYCTRL:
 627         s->bl_intensity &= ~0x1f;
 628         s->bl_intensity |= value;
 629         if (s->bl_power)
 630             spitz_bl_update(s);
 631         break;
 632
 633     case LCDTG_POWERREG0:
 634         /* Set common voltage to M62332FP */
 635         break;
 636     }
 637     return 0;
 638 }
 639
 640 static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
 641 {
 642     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 643
 644     spitz_lcdtg = s;
 645     s->bl_power = 0;
 646     s->bl_intensity = 0x20;
 647 }
 648
 649 /* SSP devices */
 650
 651 #define CORGI_SSP_PORT          2
 652
 653 #define SPITZ_GPIO_LCDCON_CS    53
 654 #define SPITZ_GPIO_ADS7846_CS   14
 655 #define SPITZ_GPIO_MAX1111_CS   20
 656 #define SPITZ_GPIO_TP_INT       11
 657
 658 static DeviceState *max1111;
 659
 660 /* "Demux" the signal based on current chipselect */
 661 typedef struct {
 662     SSISlave ssidev;
 663     SSIBus *bus[3];
 664     uint32_t enable[3];
 665 } CorgiSSPState;
 666
 667 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 668 {
 669     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 670     int i;
 671
 672     for (i = 0; i < 3; i++) {
 673         if (s->enable[i]) {
 674             return ssi_transfer(s->bus[i], value);
 675         }
 676     }
 677     return 0;
 678 }
 679
 680 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 681 {
 682     CorgiSSPState *s = (CorgiSSPState *)opaque;
 683     assert(line >= 0 && line < 3);
 684     s->enable[line] = !level;
 685 }
 686
 687 #define MAX1111_BATT_VOLT       1
 688 #define MAX1111_BATT_TEMP       2
 689 #define MAX1111_ACIN_VOLT       3
 690
 691 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 692 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 693 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 694
 695 static void spitz_adc_temp_on(void *opaque, int line, int level)
 696 {
 697     if (!max1111)
 698         return;
 699
 700     if (level)
 701         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 702     else
 703         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 704 }
 705
 706 static void corgi_ssp_realize(SSISlave *d, Error **errp)
 707 {
 708     DeviceState *dev = DEVICE(d);
 709     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 710
 711     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 712     s->bus[0] = ssi_create_bus(dev, "ssi0");
 713     s->bus[1] = ssi_create_bus(dev, "ssi1");
 714     s->bus[2] = ssi_create_bus(dev, "ssi2");
 715 }
 716
 717 static void spitz_ssp_attach(SpitzMachineState *sms)
 718 {
 719     void *bus;
 720
 721     sms->mux = ssi_create_slave(sms->mpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 722
 723     bus = qdev_get_child_bus(sms->mux, "ssi0");
 724     sms->lcdtg = ssi_create_slave(bus, "spitz-lcdtg");
 725
 726     bus = qdev_get_child_bus(sms->mux, "ssi1");
 727     sms->ads7846 = ssi_create_slave(bus, "ads7846");
 728     qdev_connect_gpio_out(sms->ads7846, 0,
 729                           qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT));
 730
 731     bus = qdev_get_child_bus(sms->mux, "ssi2");
 732     sms->max1111 = ssi_create_slave(bus, "max1111");
 733     max1111 = sms->max1111;
 734     max111x_set_input(sms->max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 735     max111x_set_input(sms->max1111, MAX1111_BATT_TEMP, 0);
 736     max111x_set_input(sms->max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 737
 738     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS,
 739                         qdev_get_gpio_in(sms->mux, 0));
 740     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS,
 741                         qdev_get_gpio_in(sms->mux, 1));
 742     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS,
 743                         qdev_get_gpio_in(sms->mux, 2));
 744 }
 745
 746 /* CF Microdrive */
 747
 748 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 749 {
 750     PCMCIACardState *md;
 751     DriveInfo *dinfo;
 752
 753     dinfo = drive_get(IF_IDE, 0, 0);
 754     if (!dinfo || dinfo->media_cd)
 755         return;
 756     md = dscm1xxxx_init(dinfo);
 757     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 758 }
 759
 760 /* Wm8750 and Max7310 on I2C */
 761
 762 #define AKITA_MAX_ADDR  0x18
 763 #define SPITZ_WM_ADDRL  0x1b
 764 #define SPITZ_WM_ADDRH  0x1a
 765
 766 #define SPITZ_GPIO_WM   5
 767
 768 static void spitz_wm8750_addr(void *opaque, int line, int level)
 769 {
 770     I2CSlave *wm = (I2CSlave *) opaque;
 771     if (level)
 772         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 773     else
 774         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 775 }
 776
 777 static void spitz_i2c_setup(PXA2xxState *cpu)
 778 {
 779     /* Attach the CPU on one end of our I2C bus.  */
 780     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 781
 782     DeviceState *wm;
 783
 784     /* Attach a WM8750 to the bus */
 785     wm = i2c_create_slave(bus, TYPE_WM8750, 0);
 786
 787     spitz_wm8750_addr(wm, 0, 0);
 788     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 789                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 790     /* .. and to the sound interface.  */
 791     cpu->i2s->opaque = wm;
 792     cpu->i2s->codec_out = wm8750_dac_dat;
 793     cpu->i2s->codec_in = wm8750_adc_dat;
 794     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 795 }
 796
 797 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 798 {
 799     /* Attach a Max7310 to Akita I2C bus.  */
 800     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 801                      AKITA_MAX_ADDR);
 802 }
 803
 804 /* Other peripherals */
 805
 806 static void spitz_out_switch(void *opaque, int line, int level)
 807 {
 808     switch (line) {
 809     case 0:
 810         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 811         break;
 812     case 1:
 813         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 814         break;
 815     case 2:
 816         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 817         break;
 818     case 3:
 819         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 820         break;
 821     case 4:
 822         spitz_bl_bit5(opaque, line, level);
 823         break;
 824     case 5:
 825         spitz_bl_power(opaque, line, level);
 826         break;
 827     case 6:
 828         spitz_adc_temp_on(opaque, line, level);
 829         break;
 830     }
 831 }
 832
 833 #define SPITZ_SCP_LED_GREEN             1
 834 #define SPITZ_SCP_JK_B                  2
 835 #define SPITZ_SCP_CHRG_ON               3
 836 #define SPITZ_SCP_MUTE_L                4
 837 #define SPITZ_SCP_MUTE_R                5
 838 #define SPITZ_SCP_CF_POWER              6
 839 #define SPITZ_SCP_LED_ORANGE            7
 840 #define SPITZ_SCP_JK_A                  8
 841 #define SPITZ_SCP_ADC_TEMP_ON           9
 842 #define SPITZ_SCP2_IR_ON                1
 843 #define SPITZ_SCP2_AKIN_PULLUP          2
 844 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 845 #define SPITZ_SCP2_BACKLIGHT_ON                 8
 846 #define SPITZ_SCP2_MIC_BIAS             9
 847
 848 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 849                 DeviceState *scp0, DeviceState *scp1)
 850 {
 851     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 852
 853     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 854     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 855     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 856     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 857
 858     if (scp1) {
 859         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 860         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 861     }
 862
 863     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 864 }
 865
 866 #define SPITZ_GPIO_HSYNC                22
 867 #define SPITZ_GPIO_SD_DETECT            9
 868 #define SPITZ_GPIO_SD_WP                81
 869 #define SPITZ_GPIO_ON_RESET             89
 870 #define SPITZ_GPIO_BAT_COVER            90
 871 #define SPITZ_GPIO_CF1_IRQ              105
 872 #define SPITZ_GPIO_CF1_CD               94
 873 #define SPITZ_GPIO_CF2_IRQ              106
 874 #define SPITZ_GPIO_CF2_CD               93
 875
 876 static int spitz_hsync;
 877
 878 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 879 {
 880     PXA2xxState *cpu = (PXA2xxState *) opaque;
 881     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 882     spitz_hsync ^= 1;
 883 }
 884
 885 static void spitz_reset(void *opaque, int line, int level)
 886 {
 887     if (level) {
 888         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 889     }
 890 }
 891
 892 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 893 {
 894     qemu_irq lcd_hsync;
 895     qemu_irq reset;
 896
 897     /*
 898      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 899      * read to satisfy broken guests that poll-wait for hsync.
 900      * Simulating a real hsync event would be less practical and
 901      * wouldn't guarantee that a guest ever exits the loop.
 902      */
 903     spitz_hsync = 0;
 904     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 905     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 906     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 907
 908     /* MMC/SD host */
 909     pxa2xx_mmci_handlers(cpu->mmc,
 910                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 911                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 912
 913     /* Battery lock always closed */
 914     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 915
 916     /* Handle reset */
 917     reset = qemu_allocate_irq(spitz_reset, cpu, 0);
 918     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
 919
 920     /* PCMCIA signals: card's IRQ and Card-Detect */
 921     if (slots >= 1)
 922         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 923                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 924                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 925     if (slots >= 2)
 926         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 927                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 928                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 929 }
 930
 931 /* Board init.  */
 932 #define SPITZ_RAM       0x04000000
 933 #define SPITZ_ROM       0x00800000
 934
 935 static struct arm_boot_info spitz_binfo = {
 936     .loader_start = PXA2XX_SDRAM_BASE,
 937     .ram_size = 0x04000000,
 938 };
 939
 940 static void spitz_common_init(MachineState *machine)
 941 {
 942     SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine);
 943     SpitzMachineState *sms = SPITZ_MACHINE(machine);
 944     enum spitz_model_e model = smc->model;
 945     PXA2xxState *mpu;
 946     DeviceState *scp0, *scp1 = NULL;
 947     MemoryRegion *address_space_mem = get_system_memory();
 948     MemoryRegion *rom = g_new(MemoryRegion, 1);
 949
 950     /* Setup CPU & memory */
 951     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
 952                       machine->cpu_type);
 953     sms->mpu = mpu;
 954
 955     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 956
 957     memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
 958     memory_region_add_subregion(address_space_mem, 0, rom);
 959
 960     /* Setup peripherals */
 961     spitz_keyboard_register(mpu);
 962
 963     spitz_ssp_attach(sms);
 964
 965     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 966     if (model != akita) {
 967         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 968     }
 969
 970     spitz_scoop_gpio_setup(mpu, scp0, scp1);
 971
 972     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 973
 974     spitz_i2c_setup(mpu);
 975
 976     if (model == akita)
 977         spitz_akita_i2c_setup(mpu);
 978
 979     if (model == terrier)
 980         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 981         spitz_microdrive_attach(mpu, 1);
 982     else if (model != akita)
 983         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 984         spitz_microdrive_attach(mpu, 0);
 985
 986     spitz_binfo.board_id = smc->arm_id;
 987     arm_load_kernel(mpu->cpu, machine, &spitz_binfo);
 988     sl_bootparam_write(SL_PXA_PARAM_BASE);
 989 }
 990
 991 static void spitz_common_class_init(ObjectClass *oc, void *data)
 992 {
 993     MachineClass *mc = MACHINE_CLASS(oc);
 994
 995     mc->block_default_type = IF_IDE;
 996     mc->ignore_memory_transaction_failures = true;
 997     mc->init = spitz_common_init;
 998 }
 999
1000 static const TypeInfo spitz_common_info = {
1001     .name = TYPE_SPITZ_MACHINE,
1002     .parent = TYPE_MACHINE,
1003     .abstract = true,
1004     .instance_size = sizeof(SpitzMachineState),
1005     .class_size = sizeof(SpitzMachineClass),
1006     .class_init = spitz_common_class_init,
1007 };
1008
1009 static void akitapda_class_init(ObjectClass *oc, void *data)
1010 {
1011     MachineClass *mc = MACHINE_CLASS(oc);
1012     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1013
1014     mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
1015     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1016     smc->model = akita;
1017     smc->arm_id = 0x2e8;
1018 }
1019
1020 static const TypeInfo akitapda_type = {
1021     .name = MACHINE_TYPE_NAME("akita"),
1022     .parent = TYPE_SPITZ_MACHINE,
1023     .class_init = akitapda_class_init,
1024 };
1025
1026 static void spitzpda_class_init(ObjectClass *oc, void *data)
1027 {
1028     MachineClass *mc = MACHINE_CLASS(oc);
1029     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1030
1031     mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
1032     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1033     smc->model = spitz;
1034     smc->arm_id = 0x2c9;
1035 }
1036
1037 static const TypeInfo spitzpda_type = {
1038     .name = MACHINE_TYPE_NAME("spitz"),
1039     .parent = TYPE_SPITZ_MACHINE,
1040     .class_init = spitzpda_class_init,
1041 };
1042
1043 static void borzoipda_class_init(ObjectClass *oc, void *data)
1044 {
1045     MachineClass *mc = MACHINE_CLASS(oc);
1046     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1047
1048     mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1049     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1050     smc->model = borzoi;
1051     smc->arm_id = 0x33f;
1052 }
1053
1054 static const TypeInfo borzoipda_type = {
1055     .name = MACHINE_TYPE_NAME("borzoi"),
1056     .parent = TYPE_SPITZ_MACHINE,
1057     .class_init = borzoipda_class_init,
1058 };
1059
1060 static void terrierpda_class_init(ObjectClass *oc, void *data)
1061 {
1062     MachineClass *mc = MACHINE_CLASS(oc);
1063     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1064
1065     mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1066     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1067     smc->model = terrier;
1068     smc->arm_id = 0x33f;
1069 }
1070
1071 static const TypeInfo terrierpda_type = {
1072     .name = MACHINE_TYPE_NAME("terrier"),
1073     .parent = TYPE_SPITZ_MACHINE,
1074     .class_init = terrierpda_class_init,
1075 };
1076
1077 static void spitz_machine_init(void)
1078 {
1079     type_register_static(&spitz_common_info);
1080     type_register_static(&akitapda_type);
1081     type_register_static(&spitzpda_type);
1082     type_register_static(&borzoipda_type);
1083     type_register_static(&terrierpda_type);
1084 }
1085
1086 type_init(spitz_machine_init)
1087
1088 static bool is_version_0(void *opaque, int version_id)
1089 {
1090     return version_id == 0;
1091 }
1092
1093 static VMStateDescription vmstate_sl_nand_info = {
1094     .name = "sl-nand",
1095     .version_id = 0,
1096     .minimum_version_id = 0,
1097     .fields = (VMStateField[]) {
1098         VMSTATE_UINT8(ctl, SLNANDState),
1099         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1100         VMSTATE_END_OF_LIST(),
1101     },
1102 };
1103
1104 static Property sl_nand_properties[] = {
1105     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1106     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1107     DEFINE_PROP_END_OF_LIST(),
1108 };
1109
1110 static void sl_nand_class_init(ObjectClass *klass, void *data)
1111 {
1112     DeviceClass *dc = DEVICE_CLASS(klass);
1113
1114     dc->vmsd = &vmstate_sl_nand_info;
1115     device_class_set_props(dc, sl_nand_properties);
1116     dc->realize = sl_nand_realize;
1117     /* Reason: init() method uses drive_get() */
1118     dc->user_creatable = false;
1119 }
1120
1121 static const TypeInfo sl_nand_info = {
1122     .name          = TYPE_SL_NAND,
1123     .parent        = TYPE_SYS_BUS_DEVICE,
1124     .instance_size = sizeof(SLNANDState),
1125     .instance_init = sl_nand_init,
1126     .class_init    = sl_nand_class_init,
1127 };
1128
1129 static VMStateDescription vmstate_spitz_kbd = {
1130     .name = "spitz-keyboard",
1131     .version_id = 1,
1132     .minimum_version_id = 0,
1133     .post_load = spitz_keyboard_post_load,
1134     .fields = (VMStateField[]) {
1135         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1136         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1137         VMSTATE_UNUSED_TEST(is_version_0, 5),
1138         VMSTATE_END_OF_LIST(),
1139     },
1140 };
1141
1142 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1143 {
1144     DeviceClass *dc = DEVICE_CLASS(klass);
1145
1146     dc->vmsd = &vmstate_spitz_kbd;
1147     dc->realize = spitz_keyboard_realize;
1148 }
1149
1150 static const TypeInfo spitz_keyboard_info = {
1151     .name          = TYPE_SPITZ_KEYBOARD,
1152     .parent        = TYPE_SYS_BUS_DEVICE,
1153     .instance_size = sizeof(SpitzKeyboardState),
1154     .instance_init = spitz_keyboard_init,
1155     .class_init    = spitz_keyboard_class_init,
1156 };
1157
1158 static const VMStateDescription vmstate_corgi_ssp_regs = {
1159     .name = "corgi-ssp",
1160     .version_id = 2,
1161     .minimum_version_id = 2,
1162     .fields = (VMStateField[]) {
1163         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1164         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1165         VMSTATE_END_OF_LIST(),
1166     }
1167 };
1168
1169 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1170 {
1171     DeviceClass *dc = DEVICE_CLASS(klass);
1172     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1173
1174     k->realize = corgi_ssp_realize;
1175     k->transfer = corgi_ssp_transfer;
1176     dc->vmsd = &vmstate_corgi_ssp_regs;
1177 }
1178
1179 static const TypeInfo corgi_ssp_info = {
1180     .name          = "corgi-ssp",
1181     .parent        = TYPE_SSI_SLAVE,
1182     .instance_size = sizeof(CorgiSSPState),
1183     .class_init    = corgi_ssp_class_init,
1184 };
1185
1186 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1187     .name = "spitz-lcdtg",
1188     .version_id = 1,
1189     .minimum_version_id = 1,
1190     .fields = (VMStateField[]) {
1191         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1192         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1193         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1194         VMSTATE_END_OF_LIST(),
1195     }
1196 };
1197
1198 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1199 {
1200     DeviceClass *dc = DEVICE_CLASS(klass);
1201     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1202
1203     k->realize = spitz_lcdtg_realize;
1204     k->transfer = spitz_lcdtg_transfer;
1205     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1206 }
1207
1208 static const TypeInfo spitz_lcdtg_info = {
1209     .name          = "spitz-lcdtg",
1210     .parent        = TYPE_SSI_SLAVE,
1211     .instance_size = sizeof(SpitzLCDTG),
1212     .class_init    = spitz_lcdtg_class_init,
1213 };
1214
1215 static void spitz_register_types(void)
1216 {
1217     type_register_static(&corgi_ssp_info);
1218     type_register_static(&spitz_lcdtg_info);
1219     type_register_static(&spitz_keyboard_info);
1220     type_register_static(&sl_nand_info);
1221 }
1222
1223 type_init(spitz_register_types)