hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "hw/hw.h"
  14 #include "hw/arm/pxa.h"
  15 #include "hw/arm/arm.h"
  16 #include "sysemu/sysemu.h"
  17 #include "hw/pcmcia.h"
  18 #include "hw/i2c/i2c.h"
  19 #include "hw/ssi.h"
  20 #include "hw/block/flash.h"
  21 #include "qemu/timer.h"
  22 #include "hw/devices.h"
  23 #include "hw/arm/sharpsl.h"
  24 #include "ui/console.h"
  25 #include "audio/audio.h"
  26 #include "hw/boards.h"
  27 #include "sysemu/block-backend.h"
  28 #include "hw/sysbus.h"
  29 #include "exec/address-spaces.h"
  30
  31 #undef REG_FMT
  32 #define REG_FMT                 "0x%02lx"
  33
  34 /* Spitz Flash */
  35 #define FLASH_BASE              0x0c000000
  36 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  37 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  38 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  39 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  40 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  41 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  42 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  43
  44 #define FLASHCTL_CE0            (1 << 0)
  45 #define FLASHCTL_CLE            (1 << 1)
  46 #define FLASHCTL_ALE            (1 << 2)
  47 #define FLASHCTL_WP             (1 << 3)
  48 #define FLASHCTL_CE1            (1 << 4)
  49 #define FLASHCTL_RYBY           (1 << 5)
  50 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  51
  52 #define TYPE_SL_NAND "sl-nand"
  53 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  54
  55 typedef struct {
  56     SysBusDevice parent_obj;
  57
  58     MemoryRegion iomem;
  59     DeviceState *nand;
  60     uint8_t ctl;
  61     uint8_t manf_id;
  62     uint8_t chip_id;
  63     ECCState ecc;
  64 } SLNANDState;
  65
  66 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  67 {
  68     SLNANDState *s = (SLNANDState *) opaque;
  69     int ryby;
  70
  71     switch (addr) {
  72 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  73     case FLASH_ECCLPLB:
  74         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  75                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  76
  77 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  78     case FLASH_ECCLPUB:
  79         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  80                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  81
  82     case FLASH_ECCCP:
  83         return s->ecc.cp;
  84
  85     case FLASH_ECCCNTR:
  86         return s->ecc.count & 0xff;
  87
  88     case FLASH_FLASHCTL:
  89         nand_getpins(s->nand, &ryby);
  90         if (ryby)
  91             return s->ctl | FLASHCTL_RYBY;
  92         else
  93             return s->ctl;
  94
  95     case FLASH_FLASHIO:
  96         if (size == 4) {
  97             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
  98                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
  99         }
 100         return ecc_digest(&s->ecc, nand_getio(s->nand));
 101
 102     default:
 103         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 104     }
 105     return 0;
 106 }
 107
 108 static void sl_write(void *opaque, hwaddr addr,
 109                      uint64_t value, unsigned size)
 110 {
 111     SLNANDState *s = (SLNANDState *) opaque;
 112
 113     switch (addr) {
 114     case FLASH_ECCCLRR:
 115         /* Value is ignored.  */
 116         ecc_reset(&s->ecc);
 117         break;
 118
 119     case FLASH_FLASHCTL:
 120         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 121         nand_setpins(s->nand,
 122                         s->ctl & FLASHCTL_CLE,
 123                         s->ctl & FLASHCTL_ALE,
 124                         s->ctl & FLASHCTL_NCE,
 125                         s->ctl & FLASHCTL_WP,
 126                         0);
 127         break;
 128
 129     case FLASH_FLASHIO:
 130         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 131         break;
 132
 133     default:
 134         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 135     }
 136 }
 137
 138 enum {
 139     FLASH_128M,
 140     FLASH_1024M,
 141 };
 142
 143 static const MemoryRegionOps sl_ops = {
 144     .read = sl_read,
 145     .write = sl_write,
 146     .endianness = DEVICE_NATIVE_ENDIAN,
 147 };
 148
 149 static void sl_flash_register(PXA2xxState *cpu, int size)
 150 {
 151     DeviceState *dev;
 152
 153     dev = qdev_create(NULL, TYPE_SL_NAND);
 154
 155     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 156     if (size == FLASH_128M)
 157         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 158     else if (size == FLASH_1024M)
 159         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 160
 161     qdev_init_nofail(dev);
 162     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 163 }
 164
 165 static int sl_nand_init(SysBusDevice *dev)
 166 {
 167     SLNANDState *s = SL_NAND(dev);
 168     DriveInfo *nand;
 169
 170     s->ctl = 0;
 171     nand = drive_get(IF_MTD, 0, 0);
 172     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 173                         s->manf_id, s->chip_id);
 174
 175     memory_region_init_io(&s->iomem, OBJECT(s), &sl_ops, s, "sl", 0x40);
 176     sysbus_init_mmio(dev, &s->iomem);
 177
 178     return 0;
 179 }
 180
 181 /* Spitz Keyboard */
 182
 183 #define SPITZ_KEY_STROBE_NUM    11
 184 #define SPITZ_KEY_SENSE_NUM     7
 185
 186 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 187     12, 17, 91, 34, 36, 38, 39
 188 };
 189
 190 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 191     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 192 };
 193
 194 /* Eighth additional row maps the special keys */
 195 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 196     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 197     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 198     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 199     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 200     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 201     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 202     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 203     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 204 };
 205
 206 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 207 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 208 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 209 #define SPITZ_GPIO_SWA          97      /* Lid */
 210 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 211
 212 /* The special buttons are mapped to unused keys */
 213 static const int spitz_gpiomap[5] = {
 214     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 215     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 216 };
 217
 218 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 219 #define SPITZ_KEYBOARD(obj) \
 220     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 221
 222 typedef struct {
 223     SysBusDevice parent_obj;
 224
 225     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 226     qemu_irq gpiomap[5];
 227     int keymap[0x80];
 228     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 229     uint16_t strobe_state;
 230     uint16_t sense_state;
 231
 232     uint16_t pre_map[0x100];
 233     uint16_t modifiers;
 234     uint16_t imodifiers;
 235     uint8_t fifo[16];
 236     int fifopos, fifolen;
 237     QEMUTimer *kbdtimer;
 238 } SpitzKeyboardState;
 239
 240 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 241 {
 242     int i;
 243     uint16_t strobe, sense = 0;
 244     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 245         strobe = s->keyrow[i] & s->strobe_state;
 246         if (strobe) {
 247             sense |= 1 << i;
 248             if (!(s->sense_state & (1 << i)))
 249                 qemu_irq_raise(s->sense[i]);
 250         } else if (s->sense_state & (1 << i))
 251             qemu_irq_lower(s->sense[i]);
 252     }
 253
 254     s->sense_state = sense;
 255 }
 256
 257 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 258 {
 259     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 260
 261     if (level)
 262         s->strobe_state |= 1 << line;
 263     else
 264         s->strobe_state &= ~(1 << line);
 265     spitz_keyboard_sense_update(s);
 266 }
 267
 268 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 269 {
 270     int spitz_keycode = s->keymap[keycode & 0x7f];
 271     if (spitz_keycode == -1)
 272         return;
 273
 274     /* Handle the additional keys */
 275     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 276         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 277         return;
 278     }
 279
 280     if (keycode & 0x80)
 281         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 282     else
 283         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 284
 285     spitz_keyboard_sense_update(s);
 286 }
 287
 288 #define SPITZ_MOD_SHIFT   (1 << 7)
 289 #define SPITZ_MOD_CTRL    (1 << 8)
 290 #define SPITZ_MOD_FN      (1 << 9)
 291
 292 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 293
 294 static void spitz_keyboard_handler(void *opaque, int keycode)
 295 {
 296     SpitzKeyboardState *s = opaque;
 297     uint16_t code;
 298     int mapcode;
 299     switch (keycode) {
 300     case 0x2a:  /* Left Shift */
 301         s->modifiers |= 1;
 302         break;
 303     case 0xaa:
 304         s->modifiers &= ~1;
 305         break;
 306     case 0x36:  /* Right Shift */
 307         s->modifiers |= 2;
 308         break;
 309     case 0xb6:
 310         s->modifiers &= ~2;
 311         break;
 312     case 0x1d:  /* Control */
 313         s->modifiers |= 4;
 314         break;
 315     case 0x9d:
 316         s->modifiers &= ~4;
 317         break;
 318     case 0x38:  /* Alt */
 319         s->modifiers |= 8;
 320         break;
 321     case 0xb8:
 322         s->modifiers &= ~8;
 323         break;
 324     }
 325
 326     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 327             (keycode | SPITZ_MOD_SHIFT) :
 328             (keycode & ~SPITZ_MOD_SHIFT))];
 329
 330     if (code != mapcode) {
 331 #if 0
 332         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 333             QUEUE_KEY(0x2a | (keycode & 0x80));
 334         }
 335         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 336             QUEUE_KEY(0x1d | (keycode & 0x80));
 337         }
 338         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 339             QUEUE_KEY(0x38 | (keycode & 0x80));
 340         }
 341         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 342             QUEUE_KEY(0x2a | (~keycode & 0x80));
 343         }
 344         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 345             QUEUE_KEY(0x36 | (~keycode & 0x80));
 346         }
 347 #else
 348         if (keycode & 0x80) {
 349             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 350                 QUEUE_KEY(0x2a | 0x80);
 351             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 352                 QUEUE_KEY(0x1d | 0x80);
 353             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 354                 QUEUE_KEY(0x38 | 0x80);
 355             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 356                 QUEUE_KEY(0x2a);
 357             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 358                 QUEUE_KEY(0x36);
 359             s->imodifiers = 0;
 360         } else {
 361             if ((code & SPITZ_MOD_SHIFT) &&
 362                 !((s->modifiers | s->imodifiers) & 1)) {
 363                 QUEUE_KEY(0x2a);
 364                 s->imodifiers |= 1;
 365             }
 366             if ((code & SPITZ_MOD_CTRL) &&
 367                 !((s->modifiers | s->imodifiers) & 4)) {
 368                 QUEUE_KEY(0x1d);
 369                 s->imodifiers |= 4;
 370             }
 371             if ((code & SPITZ_MOD_FN) &&
 372                 !((s->modifiers | s->imodifiers) & 8)) {
 373                 QUEUE_KEY(0x38);
 374                 s->imodifiers |= 8;
 375             }
 376             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 377                             !(s->imodifiers & 0x10)) {
 378                 QUEUE_KEY(0x2a | 0x80);
 379                 s->imodifiers |= 0x10;
 380             }
 381             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 382                             !(s->imodifiers & 0x20)) {
 383                 QUEUE_KEY(0x36 | 0x80);
 384                 s->imodifiers |= 0x20;
 385             }
 386         }
 387 #endif
 388     }
 389
 390     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 391 }
 392
 393 static void spitz_keyboard_tick(void *opaque)
 394 {
 395     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 396
 397     if (s->fifolen) {
 398         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 399         s->fifolen --;
 400         if (s->fifopos >= 16)
 401             s->fifopos = 0;
 402     }
 403
 404     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 405                    get_ticks_per_sec() / 32);
 406 }
 407
 408 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 409 {
 410     int i;
 411     for (i = 0; i < 0x100; i ++)
 412         s->pre_map[i] = i;
 413     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 414     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 415     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 416     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 417     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 418     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 419     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 420     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 421     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 422     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 423     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 424     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 425     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 426     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 427     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 428     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 429     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 430     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 431     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 432     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 433     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 434     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 435     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 436     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 437     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 438     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 439     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 440     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 441     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 442     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 443     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 444     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 445
 446     s->modifiers = 0;
 447     s->imodifiers = 0;
 448     s->fifopos = 0;
 449     s->fifolen = 0;
 450 }
 451
 452 #undef SPITZ_MOD_SHIFT
 453 #undef SPITZ_MOD_CTRL
 454 #undef SPITZ_MOD_FN
 455
 456 static int spitz_keyboard_post_load(void *opaque, int version_id)
 457 {
 458     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 459
 460     /* Release all pressed keys */
 461     memset(s->keyrow, 0, sizeof(s->keyrow));
 462     spitz_keyboard_sense_update(s);
 463     s->modifiers = 0;
 464     s->imodifiers = 0;
 465     s->fifopos = 0;
 466     s->fifolen = 0;
 467
 468     return 0;
 469 }
 470
 471 static void spitz_keyboard_register(PXA2xxState *cpu)
 472 {
 473     int i;
 474     DeviceState *dev;
 475     SpitzKeyboardState *s;
 476
 477     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 478     s = SPITZ_KEYBOARD(dev);
 479
 480     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 481         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 482
 483     for (i = 0; i < 5; i ++)
 484         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 485
 486     if (!graphic_rotate)
 487         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 488
 489     for (i = 0; i < 5; i++)
 490         qemu_set_irq(s->gpiomap[i], 0);
 491
 492     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 493         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 494                 qdev_get_gpio_in(dev, i));
 495
 496     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 497
 498     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 499 }
 500
 501 static int spitz_keyboard_init(SysBusDevice *sbd)
 502 {
 503     DeviceState *dev = DEVICE(sbd);
 504     SpitzKeyboardState *s = SPITZ_KEYBOARD(dev);
 505     int i, j;
 506
 507     for (i = 0; i < 0x80; i ++)
 508         s->keymap[i] = -1;
 509     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 510         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 511             if (spitz_keymap[i][j] != -1)
 512                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 513
 514     spitz_keyboard_pre_map(s);
 515
 516     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 517     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 518     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 519
 520     return 0;
 521 }
 522
 523 /* LCD backlight controller */
 524
 525 #define LCDTG_RESCTL    0x00
 526 #define LCDTG_PHACTRL   0x01
 527 #define LCDTG_DUTYCTRL  0x02
 528 #define LCDTG_POWERREG0 0x03
 529 #define LCDTG_POWERREG1 0x04
 530 #define LCDTG_GPOR3     0x05
 531 #define LCDTG_PICTRL    0x06
 532 #define LCDTG_POLCTRL   0x07
 533
 534 typedef struct {
 535     SSISlave ssidev;
 536     uint32_t bl_intensity;
 537     uint32_t bl_power;
 538 } SpitzLCDTG;
 539
 540 static void spitz_bl_update(SpitzLCDTG *s)
 541 {
 542     if (s->bl_power && s->bl_intensity)
 543         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 544     else
 545         zaurus_printf("LCD Backlight now off\n");
 546 }
 547
 548 /* FIXME: Implement GPIO properly and remove this hack.  */
 549 static SpitzLCDTG *spitz_lcdtg;
 550
 551 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 552 {
 553     SpitzLCDTG *s = spitz_lcdtg;
 554     int prev = s->bl_intensity;
 555
 556     if (level)
 557         s->bl_intensity &= ~0x20;
 558     else
 559         s->bl_intensity |= 0x20;
 560
 561     if (s->bl_power && prev != s->bl_intensity)
 562         spitz_bl_update(s);
 563 }
 564
 565 static inline void spitz_bl_power(void *opaque, int line, int level)
 566 {
 567     SpitzLCDTG *s = spitz_lcdtg;
 568     s->bl_power = !!level;
 569     spitz_bl_update(s);
 570 }
 571
 572 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 573 {
 574     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 575     int addr;
 576     addr = value >> 5;
 577     value &= 0x1f;
 578
 579     switch (addr) {
 580     case LCDTG_RESCTL:
 581         if (value)
 582             zaurus_printf("LCD in QVGA mode\n");
 583         else
 584             zaurus_printf("LCD in VGA mode\n");
 585         break;
 586
 587     case LCDTG_DUTYCTRL:
 588         s->bl_intensity &= ~0x1f;
 589         s->bl_intensity |= value;
 590         if (s->bl_power)
 591             spitz_bl_update(s);
 592         break;
 593
 594     case LCDTG_POWERREG0:
 595         /* Set common voltage to M62332FP */
 596         break;
 597     }
 598     return 0;
 599 }
 600
 601 static int spitz_lcdtg_init(SSISlave *dev)
 602 {
 603     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 604
 605     spitz_lcdtg = s;
 606     s->bl_power = 0;
 607     s->bl_intensity = 0x20;
 608
 609     return 0;
 610 }
 611
 612 /* SSP devices */
 613
 614 #define CORGI_SSP_PORT          2
 615
 616 #define SPITZ_GPIO_LCDCON_CS    53
 617 #define SPITZ_GPIO_ADS7846_CS   14
 618 #define SPITZ_GPIO_MAX1111_CS   20
 619 #define SPITZ_GPIO_TP_INT       11
 620
 621 static DeviceState *max1111;
 622
 623 /* "Demux" the signal based on current chipselect */
 624 typedef struct {
 625     SSISlave ssidev;
 626     SSIBus *bus[3];
 627     uint32_t enable[3];
 628 } CorgiSSPState;
 629
 630 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 631 {
 632     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 633     int i;
 634
 635     for (i = 0; i < 3; i++) {
 636         if (s->enable[i]) {
 637             return ssi_transfer(s->bus[i], value);
 638         }
 639     }
 640     return 0;
 641 }
 642
 643 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 644 {
 645     CorgiSSPState *s = (CorgiSSPState *)opaque;
 646     assert(line >= 0 && line < 3);
 647     s->enable[line] = !level;
 648 }
 649
 650 #define MAX1111_BATT_VOLT       1
 651 #define MAX1111_BATT_TEMP       2
 652 #define MAX1111_ACIN_VOLT       3
 653
 654 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 655 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 656 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 657
 658 static void spitz_adc_temp_on(void *opaque, int line, int level)
 659 {
 660     if (!max1111)
 661         return;
 662
 663     if (level)
 664         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 665     else
 666         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 667 }
 668
 669 static int corgi_ssp_init(SSISlave *d)
 670 {
 671     DeviceState *dev = DEVICE(d);
 672     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 673
 674     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 675     s->bus[0] = ssi_create_bus(dev, "ssi0");
 676     s->bus[1] = ssi_create_bus(dev, "ssi1");
 677     s->bus[2] = ssi_create_bus(dev, "ssi2");
 678
 679     return 0;
 680 }
 681
 682 static void spitz_ssp_attach(PXA2xxState *cpu)
 683 {
 684     DeviceState *mux;
 685     DeviceState *dev;
 686     void *bus;
 687
 688     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 689
 690     bus = qdev_get_child_bus(mux, "ssi0");
 691     ssi_create_slave(bus, "spitz-lcdtg");
 692
 693     bus = qdev_get_child_bus(mux, "ssi1");
 694     dev = ssi_create_slave(bus, "ads7846");
 695     qdev_connect_gpio_out(dev, 0,
 696                           qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
 697
 698     bus = qdev_get_child_bus(mux, "ssi2");
 699     max1111 = ssi_create_slave(bus, "max1111");
 700     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 701     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 702     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 703
 704     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 705                         qdev_get_gpio_in(mux, 0));
 706     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 707                         qdev_get_gpio_in(mux, 1));
 708     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 709                         qdev_get_gpio_in(mux, 2));
 710 }
 711
 712 /* CF Microdrive */
 713
 714 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 715 {
 716     PCMCIACardState *md;
 717     DriveInfo *dinfo;
 718
 719     dinfo = drive_get(IF_IDE, 0, 0);
 720     if (!dinfo || dinfo->media_cd)
 721         return;
 722     md = dscm1xxxx_init(dinfo);
 723     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 724 }
 725
 726 /* Wm8750 and Max7310 on I2C */
 727
 728 #define AKITA_MAX_ADDR  0x18
 729 #define SPITZ_WM_ADDRL  0x1b
 730 #define SPITZ_WM_ADDRH  0x1a
 731
 732 #define SPITZ_GPIO_WM   5
 733
 734 static void spitz_wm8750_addr(void *opaque, int line, int level)
 735 {
 736     I2CSlave *wm = (I2CSlave *) opaque;
 737     if (level)
 738         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 739     else
 740         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 741 }
 742
 743 static void spitz_i2c_setup(PXA2xxState *cpu)
 744 {
 745     /* Attach the CPU on one end of our I2C bus.  */
 746     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 747
 748     DeviceState *wm;
 749
 750     /* Attach a WM8750 to the bus */
 751     wm = i2c_create_slave(bus, "wm8750", 0);
 752
 753     spitz_wm8750_addr(wm, 0, 0);
 754     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 755                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 756     /* .. and to the sound interface.  */
 757     cpu->i2s->opaque = wm;
 758     cpu->i2s->codec_out = wm8750_dac_dat;
 759     cpu->i2s->codec_in = wm8750_adc_dat;
 760     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 761 }
 762
 763 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 764 {
 765     /* Attach a Max7310 to Akita I2C bus.  */
 766     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 767                      AKITA_MAX_ADDR);
 768 }
 769
 770 /* Other peripherals */
 771
 772 static void spitz_out_switch(void *opaque, int line, int level)
 773 {
 774     switch (line) {
 775     case 0:
 776         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 777         break;
 778     case 1:
 779         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 780         break;
 781     case 2:
 782         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 783         break;
 784     case 3:
 785         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 786         break;
 787     case 4:
 788         spitz_bl_bit5(opaque, line, level);
 789         break;
 790     case 5:
 791         spitz_bl_power(opaque, line, level);
 792         break;
 793     case 6:
 794         spitz_adc_temp_on(opaque, line, level);
 795         break;
 796     }
 797 }
 798
 799 #define SPITZ_SCP_LED_GREEN             1
 800 #define SPITZ_SCP_JK_B                  2
 801 #define SPITZ_SCP_CHRG_ON               3
 802 #define SPITZ_SCP_MUTE_L                4
 803 #define SPITZ_SCP_MUTE_R                5
 804 #define SPITZ_SCP_CF_POWER              6
 805 #define SPITZ_SCP_LED_ORANGE            7
 806 #define SPITZ_SCP_JK_A                  8
 807 #define SPITZ_SCP_ADC_TEMP_ON           9
 808 #define SPITZ_SCP2_IR_ON                1
 809 #define SPITZ_SCP2_AKIN_PULLUP          2
 810 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 811 #define SPITZ_SCP2_BACKLIGHT_ON         8
 812 #define SPITZ_SCP2_MIC_BIAS             9
 813
 814 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 815                 DeviceState *scp0, DeviceState *scp1)
 816 {
 817     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 818
 819     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 820     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 821     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 822     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 823
 824     if (scp1) {
 825         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 826         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 827     }
 828
 829     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 830 }
 831
 832 #define SPITZ_GPIO_HSYNC                22
 833 #define SPITZ_GPIO_SD_DETECT            9
 834 #define SPITZ_GPIO_SD_WP                81
 835 #define SPITZ_GPIO_ON_RESET             89
 836 #define SPITZ_GPIO_BAT_COVER            90
 837 #define SPITZ_GPIO_CF1_IRQ              105
 838 #define SPITZ_GPIO_CF1_CD               94
 839 #define SPITZ_GPIO_CF2_IRQ              106
 840 #define SPITZ_GPIO_CF2_CD               93
 841
 842 static int spitz_hsync;
 843
 844 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 845 {
 846     PXA2xxState *cpu = (PXA2xxState *) opaque;
 847     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 848     spitz_hsync ^= 1;
 849 }
 850
 851 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 852 {
 853     qemu_irq lcd_hsync;
 854     /*
 855      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 856      * read to satisfy broken guests that poll-wait for hsync.
 857      * Simulating a real hsync event would be less practical and
 858      * wouldn't guarantee that a guest ever exits the loop.
 859      */
 860     spitz_hsync = 0;
 861     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 862     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 863     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 864
 865     /* MMC/SD host */
 866     pxa2xx_mmci_handlers(cpu->mmc,
 867                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 868                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 869
 870     /* Battery lock always closed */
 871     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 872
 873     /* Handle reset */
 874     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
 875
 876     /* PCMCIA signals: card's IRQ and Card-Detect */
 877     if (slots >= 1)
 878         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 879                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 880                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 881     if (slots >= 2)
 882         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 883                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 884                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 885 }
 886
 887 /* Board init.  */
 888 enum spitz_model_e { spitz, akita, borzoi, terrier };
 889
 890 #define SPITZ_RAM       0x04000000
 891 #define SPITZ_ROM       0x00800000
 892
 893 static struct arm_boot_info spitz_binfo = {
 894     .loader_start = PXA2XX_SDRAM_BASE,
 895     .ram_size = 0x04000000,
 896 };
 897
 898 static void spitz_common_init(MachineState *machine,
 899                               enum spitz_model_e model, int arm_id)
 900 {
 901     PXA2xxState *mpu;
 902     DeviceState *scp0, *scp1 = NULL;
 903     MemoryRegion *address_space_mem = get_system_memory();
 904     MemoryRegion *rom = g_new(MemoryRegion, 1);
 905     const char *cpu_model = machine->cpu_model;
 906
 907     if (!cpu_model)
 908         cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
 909
 910     /* Setup CPU & memory */
 911     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
 912
 913     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 914
 915     memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_abort);
 916     vmstate_register_ram_global(rom);
 917     memory_region_set_readonly(rom, true);
 918     memory_region_add_subregion(address_space_mem, 0, rom);
 919
 920     /* Setup peripherals */
 921     spitz_keyboard_register(mpu);
 922
 923     spitz_ssp_attach(mpu);
 924
 925     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 926     if (model != akita) {
 927         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 928     }
 929
 930     spitz_scoop_gpio_setup(mpu, scp0, scp1);
 931
 932     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 933
 934     spitz_i2c_setup(mpu);
 935
 936     if (model == akita)
 937         spitz_akita_i2c_setup(mpu);
 938
 939     if (model == terrier)
 940         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 941         spitz_microdrive_attach(mpu, 1);
 942     else if (model != akita)
 943         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 944         spitz_microdrive_attach(mpu, 0);
 945
 946     spitz_binfo.kernel_filename = machine->kernel_filename;
 947     spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
 948     spitz_binfo.initrd_filename = machine->initrd_filename;
 949     spitz_binfo.board_id = arm_id;
 950     arm_load_kernel(mpu->cpu, &spitz_binfo);
 951     sl_bootparam_write(SL_PXA_PARAM_BASE);
 952 }
 953
 954 static void spitz_init(MachineState *machine)
 955 {
 956     spitz_common_init(machine, spitz, 0x2c9);
 957 }
 958
 959 static void borzoi_init(MachineState *machine)
 960 {
 961     spitz_common_init(machine, borzoi, 0x33f);
 962 }
 963
 964 static void akita_init(MachineState *machine)
 965 {
 966     spitz_common_init(machine, akita, 0x2e8);
 967 }
 968
 969 static void terrier_init(MachineState *machine)
 970 {
 971     spitz_common_init(machine, terrier, 0x33f);
 972 }
 973
 974 static QEMUMachine akitapda_machine = {
 975     .name = "akita",
 976     .desc = "Akita PDA (PXA270)",
 977     .init = akita_init,
 978 };
 979
 980 static QEMUMachine spitzpda_machine = {
 981     .name = "spitz",
 982     .desc = "Spitz PDA (PXA270)",
 983     .init = spitz_init,
 984 };
 985
 986 static QEMUMachine borzoipda_machine = {
 987     .name = "borzoi",
 988     .desc = "Borzoi PDA (PXA270)",
 989     .init = borzoi_init,
 990 };
 991
 992 static QEMUMachine terrierpda_machine = {
 993     .name = "terrier",
 994     .desc = "Terrier PDA (PXA270)",
 995     .init = terrier_init,
 996 };
 997
 998 static void spitz_machine_init(void)
 999 {
1000     qemu_register_machine(&akitapda_machine);
1001     qemu_register_machine(&spitzpda_machine);
1002     qemu_register_machine(&borzoipda_machine);
1003     qemu_register_machine(&terrierpda_machine);
1004 }
1005
1006 machine_init(spitz_machine_init);
1007
1008 static bool is_version_0(void *opaque, int version_id)
1009 {
1010     return version_id == 0;
1011 }
1012
1013 static VMStateDescription vmstate_sl_nand_info = {
1014     .name = "sl-nand",
1015     .version_id = 0,
1016     .minimum_version_id = 0,
1017     .fields = (VMStateField[]) {
1018         VMSTATE_UINT8(ctl, SLNANDState),
1019         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1020         VMSTATE_END_OF_LIST(),
1021     },
1022 };
1023
1024 static Property sl_nand_properties[] = {
1025     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1026     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1027     DEFINE_PROP_END_OF_LIST(),
1028 };
1029
1030 static void sl_nand_class_init(ObjectClass *klass, void *data)
1031 {
1032     DeviceClass *dc = DEVICE_CLASS(klass);
1033     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1034
1035     k->init = sl_nand_init;
1036     dc->vmsd = &vmstate_sl_nand_info;
1037     dc->props = sl_nand_properties;
1038 }
1039
1040 static const TypeInfo sl_nand_info = {
1041     .name          = TYPE_SL_NAND,
1042     .parent        = TYPE_SYS_BUS_DEVICE,
1043     .instance_size = sizeof(SLNANDState),
1044     .class_init    = sl_nand_class_init,
1045 };
1046
1047 static VMStateDescription vmstate_spitz_kbd = {
1048     .name = "spitz-keyboard",
1049     .version_id = 1,
1050     .minimum_version_id = 0,
1051     .post_load = spitz_keyboard_post_load,
1052     .fields = (VMStateField[]) {
1053         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1054         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1055         VMSTATE_UNUSED_TEST(is_version_0, 5),
1056         VMSTATE_END_OF_LIST(),
1057     },
1058 };
1059
1060 static Property spitz_keyboard_properties[] = {
1061     DEFINE_PROP_END_OF_LIST(),
1062 };
1063
1064 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1065 {
1066     DeviceClass *dc = DEVICE_CLASS(klass);
1067     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1068
1069     k->init = spitz_keyboard_init;
1070     dc->vmsd = &vmstate_spitz_kbd;
1071     dc->props = spitz_keyboard_properties;
1072 }
1073
1074 static const TypeInfo spitz_keyboard_info = {
1075     .name          = TYPE_SPITZ_KEYBOARD,
1076     .parent        = TYPE_SYS_BUS_DEVICE,
1077     .instance_size = sizeof(SpitzKeyboardState),
1078     .class_init    = spitz_keyboard_class_init,
1079 };
1080
1081 static const VMStateDescription vmstate_corgi_ssp_regs = {
1082     .name = "corgi-ssp",
1083     .version_id = 2,
1084     .minimum_version_id = 2,
1085     .fields = (VMStateField[]) {
1086         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1087         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1088         VMSTATE_END_OF_LIST(),
1089     }
1090 };
1091
1092 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1093 {
1094     DeviceClass *dc = DEVICE_CLASS(klass);
1095     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1096
1097     k->init = corgi_ssp_init;
1098     k->transfer = corgi_ssp_transfer;
1099     dc->vmsd = &vmstate_corgi_ssp_regs;
1100 }
1101
1102 static const TypeInfo corgi_ssp_info = {
1103     .name          = "corgi-ssp",
1104     .parent        = TYPE_SSI_SLAVE,
1105     .instance_size = sizeof(CorgiSSPState),
1106     .class_init    = corgi_ssp_class_init,
1107 };
1108
1109 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1110     .name = "spitz-lcdtg",
1111     .version_id = 1,
1112     .minimum_version_id = 1,
1113     .fields = (VMStateField[]) {
1114         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1115         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1116         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1117         VMSTATE_END_OF_LIST(),
1118     }
1119 };
1120
1121 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1122 {
1123     DeviceClass *dc = DEVICE_CLASS(klass);
1124     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1125
1126     k->init = spitz_lcdtg_init;
1127     k->transfer = spitz_lcdtg_transfer;
1128     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1129 }
1130
1131 static const TypeInfo spitz_lcdtg_info = {
1132     .name          = "spitz-lcdtg",
1133     .parent        = TYPE_SSI_SLAVE,
1134     .instance_size = sizeof(SpitzLCDTG),
1135     .class_init    = spitz_lcdtg_class_init,
1136 };
1137
1138 static void spitz_register_types(void)
1139 {
1140     type_register_static(&corgi_ssp_info);
1141     type_register_static(&spitz_lcdtg_info);
1142     type_register_static(&spitz_keyboard_info);
1143     type_register_static(&sl_nand_info);
1144 }
1145
1146 type_init(spitz_register_types)