2 * ARM Platform Bus device tree generation helpers
4 * Copyright (c) 2014 Linaro Limited
7 * Alex Graf <agraf@suse.de>
8 * Eric Auger <eric.auger@linaro.org>
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2 or later, as published by the Free Software Foundation.
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
24 #include "qemu/osdep.h"
25 #include "qapi/error.h"
27 #include "qemu-common.h"
29 #include <linux/vfio.h>
31 #include "hw/arm/sysbus-fdt.h"
32 #include "qemu/error-report.h"
33 #include "sysemu/device_tree.h"
34 #include "hw/platform-bus.h"
35 #include "sysemu/sysemu.h"
36 #include "hw/vfio/vfio-platform.h"
37 #include "hw/vfio/vfio-calxeda-xgmac.h"
38 #include "hw/vfio/vfio-amd-xgbe.h"
39 #include "hw/arm/fdt.h"
42 * internal struct that contains the information to create dynamic
45 typedef struct PlatformBusFDTData
{
46 void *fdt
; /* device tree handle */
47 int irq_start
; /* index of the first IRQ usable by platform bus devices */
48 const char *pbus_node_name
; /* name of the platform bus node */
49 PlatformBusDevice
*pbus
;
52 /* struct that associates a device type name and a node creation function */
53 typedef struct NodeCreationPair
{
55 int (*add_fdt_node_fn
)(SysBusDevice
*sbdev
, void *opaque
);
60 typedef struct HostProperty
{
68 * copy_properties_from_host
70 * copies properties listed in an array from host device tree to
71 * guest device tree. If a non optional property is not found, the
72 * function asserts. An optional property is ignored if not found
73 * in the host device tree.
74 * @props: array of HostProperty to copy
75 * @nb_props: number of properties in the array
76 * @host_dt: host device tree blob
77 * @guest_dt: guest device tree blob
78 * @node_path: host dt node path where the property is supposed to be
80 * @nodename: guest node name the properties should be added to
82 static void copy_properties_from_host(HostProperty
*props
, int nb_props
,
83 void *host_fdt
, void *guest_fdt
,
84 char *node_path
, char *nodename
)
90 for (i
= 0; i
< nb_props
; i
++) {
91 r
= qemu_fdt_getprop(host_fdt
, node_path
,
94 props
[i
].optional
? &err
: &error_fatal
);
96 qemu_fdt_setprop(guest_fdt
, nodename
,
97 props
[i
].name
, r
, prop_len
);
99 if (prop_len
!= -FDT_ERR_NOTFOUND
) {
100 /* optional property not returned although property exists */
101 error_report_err(err
);
109 /* clock properties whose values are copied/pasted from host */
110 static HostProperty clock_copied_properties
[] = {
111 {"compatible", false},
112 {"#clock-cells", false},
113 {"clock-frequency", true},
114 {"clock-output-names", true},
118 * fdt_build_clock_node
120 * Build a guest clock node, used as a dependency from a passthrough'ed
121 * device. Most information are retrieved from the host clock node.
122 * Also check the host clock is a fixed one.
124 * @host_fdt: host device tree blob from which info are retrieved
125 * @guest_fdt: guest device tree blob where the clock node is added
126 * @host_phandle: phandle of the clock in host device tree
127 * @guest_phandle: phandle to assign to the guest node
129 static void fdt_build_clock_node(void *host_fdt
, void *guest_fdt
,
130 uint32_t host_phandle
,
131 uint32_t guest_phandle
)
133 char *node_path
= NULL
;
136 int ret
, node_offset
, prop_len
, path_len
= 16;
138 node_offset
= fdt_node_offset_by_phandle(host_fdt
, host_phandle
);
139 if (node_offset
<= 0) {
140 error_setg(&error_fatal
,
141 "not able to locate clock handle %d in host device tree",
144 node_path
= g_malloc(path_len
);
145 while ((ret
= fdt_get_path(host_fdt
, node_offset
, node_path
, path_len
))
146 == -FDT_ERR_NOSPACE
) {
148 node_path
= g_realloc(node_path
, path_len
);
151 error_setg(&error_fatal
,
152 "not able to retrieve node path for clock handle %d",
156 r
= qemu_fdt_getprop(host_fdt
, node_path
, "compatible", &prop_len
,
158 if (strcmp(r
, "fixed-clock")) {
159 error_setg(&error_fatal
,
160 "clock handle %d is not a fixed clock", host_phandle
);
163 nodename
= strrchr(node_path
, '/');
164 qemu_fdt_add_subnode(guest_fdt
, nodename
);
166 copy_properties_from_host(clock_copied_properties
,
167 ARRAY_SIZE(clock_copied_properties
),
169 node_path
, nodename
);
171 qemu_fdt_setprop_cell(guest_fdt
, nodename
, "phandle", guest_phandle
);
177 * sysfs_to_dt_name: convert the name found in sysfs into the node name
178 * for instance e0900000.xgmac is converted into xgmac@e0900000
179 * @sysfs_name: directory name in sysfs
181 * returns the device tree name upon success or NULL in case the sysfs name
182 * does not match the expected format
184 static char *sysfs_to_dt_name(const char *sysfs_name
)
186 gchar
**substrings
= g_strsplit(sysfs_name
, ".", 2);
187 char *dt_name
= NULL
;
189 if (!substrings
|| !substrings
[0] || !substrings
[1]) {
192 dt_name
= g_strdup_printf("%s@%s", substrings
[1], substrings
[0]);
194 g_strfreev(substrings
);
198 /* Device Specific Code */
201 * add_calxeda_midway_xgmac_fdt_node
203 * Generates a simple node with following properties:
204 * compatible string, regs, interrupts, dma-coherent
206 static int add_calxeda_midway_xgmac_fdt_node(SysBusDevice
*sbdev
, void *opaque
)
208 PlatformBusFDTData
*data
= opaque
;
209 PlatformBusDevice
*pbus
= data
->pbus
;
210 void *fdt
= data
->fdt
;
211 const char *parent_node
= data
->pbus_node_name
;
212 int compat_str_len
, i
;
214 uint32_t *irq_attr
, *reg_attr
;
215 uint64_t mmio_base
, irq_number
;
216 VFIOPlatformDevice
*vdev
= VFIO_PLATFORM_DEVICE(sbdev
);
217 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
219 mmio_base
= platform_bus_get_mmio_addr(pbus
, sbdev
, 0);
220 nodename
= g_strdup_printf("%s/%s@%" PRIx64
, parent_node
,
221 vbasedev
->name
, mmio_base
);
222 qemu_fdt_add_subnode(fdt
, nodename
);
224 compat_str_len
= strlen(vdev
->compat
) + 1;
225 qemu_fdt_setprop(fdt
, nodename
, "compatible",
226 vdev
->compat
, compat_str_len
);
228 qemu_fdt_setprop(fdt
, nodename
, "dma-coherent", "", 0);
230 reg_attr
= g_new(uint32_t, vbasedev
->num_regions
* 2);
231 for (i
= 0; i
< vbasedev
->num_regions
; i
++) {
232 mmio_base
= platform_bus_get_mmio_addr(pbus
, sbdev
, i
);
233 reg_attr
[2 * i
] = cpu_to_be32(mmio_base
);
234 reg_attr
[2 * i
+ 1] = cpu_to_be32(
235 memory_region_size(vdev
->regions
[i
]->mem
));
237 qemu_fdt_setprop(fdt
, nodename
, "reg", reg_attr
,
238 vbasedev
->num_regions
* 2 * sizeof(uint32_t));
240 irq_attr
= g_new(uint32_t, vbasedev
->num_irqs
* 3);
241 for (i
= 0; i
< vbasedev
->num_irqs
; i
++) {
242 irq_number
= platform_bus_get_irqn(pbus
, sbdev
, i
)
244 irq_attr
[3 * i
] = cpu_to_be32(GIC_FDT_IRQ_TYPE_SPI
);
245 irq_attr
[3 * i
+ 1] = cpu_to_be32(irq_number
);
246 irq_attr
[3 * i
+ 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_LEVEL_HI
);
248 qemu_fdt_setprop(fdt
, nodename
, "interrupts",
249 irq_attr
, vbasedev
->num_irqs
* 3 * sizeof(uint32_t));
256 /* AMD xgbe properties whose values are copied/pasted from host */
257 static HostProperty amd_xgbe_copied_properties
[] = {
258 {"compatible", false},
259 {"dma-coherent", true},
260 {"amd,per-channel-interrupt", true},
262 {"mac-address", true},
263 {"amd,speed-set", false},
264 {"amd,serdes-blwc", true},
265 {"amd,serdes-cdr-rate", true},
266 {"amd,serdes-pq-skew", true},
267 {"amd,serdes-tx-amp", true},
268 {"amd,serdes-dfe-tap-config", true},
269 {"amd,serdes-dfe-tap-enable", true},
270 {"clock-names", false},
274 * add_amd_xgbe_fdt_node
276 * Generates the combined xgbe/phy node following kernel >=4.2
277 * binding documentation:
278 * Documentation/devicetree/bindings/net/amd-xgbe.txt:
279 * Also 2 clock nodes are created (dma and ptp)
281 * Asserts in case of error
283 static int add_amd_xgbe_fdt_node(SysBusDevice
*sbdev
, void *opaque
)
285 PlatformBusFDTData
*data
= opaque
;
286 PlatformBusDevice
*pbus
= data
->pbus
;
287 VFIOPlatformDevice
*vdev
= VFIO_PLATFORM_DEVICE(sbdev
);
288 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
290 const char *parent_node
= data
->pbus_node_name
;
291 char **node_path
, *nodename
, *dt_name
;
292 void *guest_fdt
= data
->fdt
, *host_fdt
;
295 uint32_t *irq_attr
, *reg_attr
, *host_clock_phandles
;
296 uint64_t mmio_base
, irq_number
;
297 uint32_t guest_clock_phandles
[2];
299 host_fdt
= load_device_tree_from_sysfs();
301 dt_name
= sysfs_to_dt_name(vbasedev
->name
);
303 error_setg(&error_fatal
, "%s incorrect sysfs device name %s",
304 __func__
, vbasedev
->name
);
306 node_path
= qemu_fdt_node_path(host_fdt
, dt_name
, vdev
->compat
,
308 if (!node_path
|| !node_path
[0]) {
309 error_setg(&error_fatal
, "%s unable to retrieve node path for %s/%s",
310 __func__
, dt_name
, vdev
->compat
);
314 error_setg(&error_fatal
, "%s more than one node matching %s/%s!",
315 __func__
, dt_name
, vdev
->compat
);
320 if (vbasedev
->num_regions
!= 5) {
321 error_setg(&error_fatal
, "%s Does the host dt node combine XGBE/PHY?",
325 /* generate nodes for DMA_CLK and PTP_CLK */
326 r
= qemu_fdt_getprop(host_fdt
, node_path
[0], "clocks",
327 &prop_len
, &error_fatal
);
329 error_setg(&error_fatal
, "%s clocks property should contain 2 handles",
332 host_clock_phandles
= (uint32_t *)r
;
333 guest_clock_phandles
[0] = qemu_fdt_alloc_phandle(guest_fdt
);
334 guest_clock_phandles
[1] = qemu_fdt_alloc_phandle(guest_fdt
);
337 * clock handles fetched from host dt are in be32 layout whereas
338 * rest of the code uses cpu layout. Also guest clock handles are
341 fdt_build_clock_node(host_fdt
, guest_fdt
,
342 be32_to_cpu(host_clock_phandles
[0]),
343 guest_clock_phandles
[0]);
345 fdt_build_clock_node(host_fdt
, guest_fdt
,
346 be32_to_cpu(host_clock_phandles
[1]),
347 guest_clock_phandles
[1]);
349 /* combined XGBE/PHY node */
350 mmio_base
= platform_bus_get_mmio_addr(pbus
, sbdev
, 0);
351 nodename
= g_strdup_printf("%s/%s@%" PRIx64
, parent_node
,
352 vbasedev
->name
, mmio_base
);
353 qemu_fdt_add_subnode(guest_fdt
, nodename
);
355 copy_properties_from_host(amd_xgbe_copied_properties
,
356 ARRAY_SIZE(amd_xgbe_copied_properties
),
358 node_path
[0], nodename
);
360 qemu_fdt_setprop_cells(guest_fdt
, nodename
, "clocks",
361 guest_clock_phandles
[0],
362 guest_clock_phandles
[1]);
364 reg_attr
= g_new(uint32_t, vbasedev
->num_regions
* 2);
365 for (i
= 0; i
< vbasedev
->num_regions
; i
++) {
366 mmio_base
= platform_bus_get_mmio_addr(pbus
, sbdev
, i
);
367 reg_attr
[2 * i
] = cpu_to_be32(mmio_base
);
368 reg_attr
[2 * i
+ 1] = cpu_to_be32(
369 memory_region_size(vdev
->regions
[i
]->mem
));
371 qemu_fdt_setprop(guest_fdt
, nodename
, "reg", reg_attr
,
372 vbasedev
->num_regions
* 2 * sizeof(uint32_t));
374 irq_attr
= g_new(uint32_t, vbasedev
->num_irqs
* 3);
375 for (i
= 0; i
< vbasedev
->num_irqs
; i
++) {
376 irq_number
= platform_bus_get_irqn(pbus
, sbdev
, i
)
378 irq_attr
[3 * i
] = cpu_to_be32(GIC_FDT_IRQ_TYPE_SPI
);
379 irq_attr
[3 * i
+ 1] = cpu_to_be32(irq_number
);
381 * General device interrupt and PCS auto-negotiation interrupts are
382 * level-sensitive while the 4 per-channel interrupts are edge
385 QLIST_FOREACH(intp
, &vdev
->intp_list
, next
) {
386 if (intp
->pin
== i
) {
390 if (intp
->flags
& VFIO_IRQ_INFO_AUTOMASKED
) {
391 irq_attr
[3 * i
+ 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_LEVEL_HI
);
393 irq_attr
[3 * i
+ 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_EDGE_LO_HI
);
396 qemu_fdt_setprop(guest_fdt
, nodename
, "interrupts",
397 irq_attr
, vbasedev
->num_irqs
* 3 * sizeof(uint32_t));
400 g_strfreev(node_path
);
407 #endif /* CONFIG_LINUX */
409 /* list of supported dynamic sysbus devices */
410 static const NodeCreationPair add_fdt_node_functions
[] = {
412 {TYPE_VFIO_CALXEDA_XGMAC
, add_calxeda_midway_xgmac_fdt_node
},
413 {TYPE_VFIO_AMD_XGBE
, add_amd_xgbe_fdt_node
},
415 {"", NULL
}, /* last element */
421 * add_fdt_node - add the device tree node of a dynamic sysbus device
423 * @sbdev: handle to the sysbus device
424 * @opaque: handle to the PlatformBusFDTData
426 * Checks the sysbus type belongs to the list of device types that
427 * are dynamically instantiable and if so call the node creation
430 static void add_fdt_node(SysBusDevice
*sbdev
, void *opaque
)
434 for (i
= 0; i
< ARRAY_SIZE(add_fdt_node_functions
); i
++) {
435 if (!strcmp(object_get_typename(OBJECT(sbdev
)),
436 add_fdt_node_functions
[i
].typename
)) {
437 ret
= add_fdt_node_functions
[i
].add_fdt_node_fn(sbdev
, opaque
);
442 error_report("Device %s can not be dynamically instantiated",
443 qdev_fw_name(DEVICE(sbdev
)));
447 void platform_bus_add_all_fdt_nodes(void *fdt
, const char *intc
, hwaddr addr
,
448 hwaddr bus_size
, int irq_start
)
450 const char platcomp
[] = "qemu,platform\0simple-bus";
451 PlatformBusDevice
*pbus
;
457 node
= g_strdup_printf("/platform@%"PRIx64
, addr
);
459 /* Create a /platform node that we can put all devices into */
460 qemu_fdt_add_subnode(fdt
, node
);
461 qemu_fdt_setprop(fdt
, node
, "compatible", platcomp
, sizeof(platcomp
));
463 /* Our platform bus region is less than 32bits, so 1 cell is enough for
466 qemu_fdt_setprop_cells(fdt
, node
, "#size-cells", 1);
467 qemu_fdt_setprop_cells(fdt
, node
, "#address-cells", 1);
468 qemu_fdt_setprop_cells(fdt
, node
, "ranges", 0, addr
>> 32, addr
, bus_size
);
470 qemu_fdt_setprop_phandle(fdt
, node
, "interrupt-parent", intc
);
472 dev
= qdev_find_recursive(sysbus_get_default(), TYPE_PLATFORM_BUS_DEVICE
);
473 pbus
= PLATFORM_BUS_DEVICE(dev
);
475 PlatformBusFDTData data
= {
477 .irq_start
= irq_start
,
478 .pbus_node_name
= node
,
482 /* Loop through all dynamic sysbus devices and create their node */
483 foreach_dynamic_sysbus_device(add_fdt_node
, &data
);