hw/arm/xlnx-zcu102.c

   1 /*
   2  * Xilinx ZynqMP ZCU102 board
   3  *
   4  * Copyright (C) 2015 Xilinx Inc
   5  * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License as published by the
   9  * Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  15  * for more details.
  16  */
  17
  18 #include "qemu/osdep.h"
  19 #include "qapi/error.h"
  20 #include "cpu.h"
  21 #include "hw/arm/xlnx-zynqmp.h"
  22 #include "hw/boards.h"
  23 #include "qemu/error-report.h"
  24 #include "qemu/log.h"
  25 #include "sysemu/qtest.h"
  26 #include "sysemu/device_tree.h"
  27
  28 typedef struct XlnxZCU102 {
  29     MachineState parent_obj;
  30
  31     XlnxZynqMPState soc;
  32
  33     bool secure;
  34     bool virt;
  35
  36     struct arm_boot_info binfo;
  37 } XlnxZCU102;
  38
  39 #define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
  40 #define ZCU102_MACHINE(obj) \
  41     OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
  42
  43
  44 static bool zcu102_get_secure(Object *obj, Error **errp)
  45 {
  46     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  47
  48     return s->secure;
  49 }
  50
  51 static void zcu102_set_secure(Object *obj, bool value, Error **errp)
  52 {
  53     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  54
  55     s->secure = value;
  56 }
  57
  58 static bool zcu102_get_virt(Object *obj, Error **errp)
  59 {
  60     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  61
  62     return s->virt;
  63 }
  64
  65 static void zcu102_set_virt(Object *obj, bool value, Error **errp)
  66 {
  67     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  68
  69     s->virt = value;
  70 }
  71
  72 static void zcu102_modify_dtb(const struct arm_boot_info *binfo, void *fdt)
  73 {
  74     XlnxZCU102 *s = container_of(binfo, XlnxZCU102, binfo);
  75     bool method_is_hvc;
  76     char **node_path;
  77     const char *r;
  78     int prop_len;
  79     int i;
  80
  81     /* If EL3 is enabled, we keep all firmware nodes active.  */
  82     if (!s->secure) {
  83         node_path = qemu_fdt_node_path(fdt, NULL, "xlnx,zynqmp-firmware",
  84                                        &error_fatal);
  85
  86         for (i = 0; node_path && node_path[i]; i++) {
  87             r = qemu_fdt_getprop(fdt, node_path[i], "method", &prop_len, NULL);
  88             method_is_hvc = r && !strcmp("hvc", r);
  89
  90             /* Allow HVC based firmware if EL2 is enabled.  */
  91             if (method_is_hvc && s->virt) {
  92                 continue;
  93             }
  94             qemu_fdt_setprop_string(fdt, node_path[i], "status", "disabled");
  95         }
  96         g_strfreev(node_path);
  97     }
  98 }
  99
 100 static void xlnx_zcu102_init(MachineState *machine)
 101 {
 102     XlnxZCU102 *s = ZCU102_MACHINE(machine);
 103     int i;
 104     uint64_t ram_size = machine->ram_size;
 105
 106     /* Create the memory region to pass to the SoC */
 107     if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
 108         error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
 109                      "0x%llx", ram_size,
 110                      XLNX_ZYNQMP_MAX_RAM_SIZE);
 111         exit(1);
 112     }
 113
 114     if (ram_size < 0x08000000) {
 115         qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
 116                  ram_size);
 117     }
 118
 119     object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
 120                             TYPE_XLNX_ZYNQMP, &error_abort, NULL);
 121
 122     object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram),
 123                          "ddr-ram", &error_abort);
 124     object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
 125                              &error_fatal);
 126     object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
 127                              &error_fatal);
 128
 129     object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
 130
 131     /* Create and plug in the SD cards */
 132     for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
 133         BusState *bus;
 134         DriveInfo *di = drive_get_next(IF_SD);
 135         BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
 136         DeviceState *carddev;
 137         char *bus_name;
 138
 139         bus_name = g_strdup_printf("sd-bus%d", i);
 140         bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
 141         g_free(bus_name);
 142         if (!bus) {
 143             error_report("No SD bus found for SD card %d", i);
 144             exit(1);
 145         }
 146         carddev = qdev_create(bus, TYPE_SD_CARD);
 147         qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
 148         object_property_set_bool(OBJECT(carddev), true, "realized",
 149                                  &error_fatal);
 150     }
 151
 152     for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
 153         SSIBus *spi_bus;
 154         DeviceState *flash_dev;
 155         qemu_irq cs_line;
 156         DriveInfo *dinfo = drive_get_next(IF_MTD);
 157         gchar *bus_name = g_strdup_printf("spi%d", i);
 158
 159         spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
 160         g_free(bus_name);
 161
 162         flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
 163         if (dinfo) {
 164             qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
 165                                 &error_fatal);
 166         }
 167         qdev_init_nofail(flash_dev);
 168
 169         cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
 170
 171         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
 172     }
 173
 174     for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {
 175         SSIBus *spi_bus;
 176         DeviceState *flash_dev;
 177         qemu_irq cs_line;
 178         DriveInfo *dinfo = drive_get_next(IF_MTD);
 179         int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;
 180         gchar *bus_name = g_strdup_printf("qspi%d", bus);
 181
 182         spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
 183         g_free(bus_name);
 184
 185         flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11");
 186         if (dinfo) {
 187             qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
 188                                 &error_fatal);
 189         }
 190         qdev_init_nofail(flash_dev);
 191
 192         cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
 193
 194         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);
 195     }
 196
 197     /* TODO create and connect IDE devices for ide_drive_get() */
 198
 199     s->binfo.ram_size = ram_size;
 200     s->binfo.loader_start = 0;
 201     s->binfo.modify_dtb = zcu102_modify_dtb;
 202     arm_load_kernel(s->soc.boot_cpu_ptr, machine, &s->binfo);
 203 }
 204
 205 static void xlnx_zcu102_machine_instance_init(Object *obj)
 206 {
 207     XlnxZCU102 *s = ZCU102_MACHINE(obj);
 208
 209     /* Default to secure mode being disabled */
 210     s->secure = false;
 211     object_property_add_bool(obj, "secure", zcu102_get_secure,
 212                              zcu102_set_secure);
 213     object_property_set_description(obj, "secure",
 214                                     "Set on/off to enable/disable the ARM "
 215                                     "Security Extensions (TrustZone)");
 216
 217     /* Default to virt (EL2) being disabled */
 218     s->virt = false;
 219     object_property_add_bool(obj, "virtualization", zcu102_get_virt,
 220                              zcu102_set_virt);
 221     object_property_set_description(obj, "virtualization",
 222                                     "Set on/off to enable/disable emulating a "
 223                                     "guest CPU which implements the ARM "
 224                                     "Virtualization Extensions");
 225 }
 226
 227 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
 228 {
 229     MachineClass *mc = MACHINE_CLASS(oc);
 230
 231     mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
 232                "the value of smp";
 233     mc->init = xlnx_zcu102_init;
 234     mc->block_default_type = IF_IDE;
 235     mc->units_per_default_bus = 1;
 236     mc->ignore_memory_transaction_failures = true;
 237     mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
 238     mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
 239     mc->default_ram_id = "ddr-ram";
 240 }
 241
 242 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
 243     .name       = MACHINE_TYPE_NAME("xlnx-zcu102"),
 244     .parent     = TYPE_MACHINE,
 245     .class_init = xlnx_zcu102_machine_class_init,
 246     .instance_init = xlnx_zcu102_machine_instance_init,
 247     .instance_size = sizeof(XlnxZCU102),
 248 };
 249
 250 static void xlnx_zcu102_machine_init_register_types(void)
 251 {
 252     type_register_static(&xlnx_zcu102_machine_init_typeinfo);
 253 }
 254
 255 type_init(xlnx_zcu102_machine_init_register_types)