2 * QEMU Floppy disk emulator (Intel 82078)
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
30 #include "qemu/osdep.h"
32 #include "hw/block/fdc.h"
33 #include "qemu/error-report.h"
34 #include "qemu/timer.h"
35 #include "hw/isa/isa.h"
36 #include "hw/sysbus.h"
37 #include "sysemu/block-backend.h"
38 #include "sysemu/blockdev.h"
39 #include "sysemu/sysemu.h"
42 /********************************************************/
43 /* debug Floppy devices */
44 //#define DEBUG_FLOPPY
47 #define FLOPPY_DPRINTF(fmt, ...) \
48 do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
50 #define FLOPPY_DPRINTF(fmt, ...)
53 /********************************************************/
54 /* Floppy drive emulation */
56 typedef enum FDriveRate
{
57 FDRIVE_RATE_500K
= 0x00, /* 500 Kbps */
58 FDRIVE_RATE_300K
= 0x01, /* 300 Kbps */
59 FDRIVE_RATE_250K
= 0x02, /* 250 Kbps */
60 FDRIVE_RATE_1M
= 0x03, /* 1 Mbps */
63 typedef enum FDriveSize
{
69 typedef struct FDFormat
{
70 FloppyDriveType drive
;
77 /* In many cases, the total sector size of a format is enough to uniquely
78 * identify it. However, there are some total sector collisions between
79 * formats of different physical size, and these are noted below by
80 * highlighting the total sector size for entries with collisions. */
81 static const FDFormat fd_formats
[] = {
82 /* First entry is default format */
83 /* 1.44 MB 3"1/2 floppy disks */
84 { FLOPPY_DRIVE_TYPE_144
, 18, 80, 1, FDRIVE_RATE_500K
, }, /* 3.5" 2880 */
85 { FLOPPY_DRIVE_TYPE_144
, 20, 80, 1, FDRIVE_RATE_500K
, }, /* 3.5" 3200 */
86 { FLOPPY_DRIVE_TYPE_144
, 21, 80, 1, FDRIVE_RATE_500K
, },
87 { FLOPPY_DRIVE_TYPE_144
, 21, 82, 1, FDRIVE_RATE_500K
, },
88 { FLOPPY_DRIVE_TYPE_144
, 21, 83, 1, FDRIVE_RATE_500K
, },
89 { FLOPPY_DRIVE_TYPE_144
, 22, 80, 1, FDRIVE_RATE_500K
, },
90 { FLOPPY_DRIVE_TYPE_144
, 23, 80, 1, FDRIVE_RATE_500K
, },
91 { FLOPPY_DRIVE_TYPE_144
, 24, 80, 1, FDRIVE_RATE_500K
, },
92 /* 2.88 MB 3"1/2 floppy disks */
93 { FLOPPY_DRIVE_TYPE_288
, 36, 80, 1, FDRIVE_RATE_1M
, },
94 { FLOPPY_DRIVE_TYPE_288
, 39, 80, 1, FDRIVE_RATE_1M
, },
95 { FLOPPY_DRIVE_TYPE_288
, 40, 80, 1, FDRIVE_RATE_1M
, },
96 { FLOPPY_DRIVE_TYPE_288
, 44, 80, 1, FDRIVE_RATE_1M
, },
97 { FLOPPY_DRIVE_TYPE_288
, 48, 80, 1, FDRIVE_RATE_1M
, },
98 /* 720 kB 3"1/2 floppy disks */
99 { FLOPPY_DRIVE_TYPE_144
, 9, 80, 1, FDRIVE_RATE_250K
, }, /* 3.5" 1440 */
100 { FLOPPY_DRIVE_TYPE_144
, 10, 80, 1, FDRIVE_RATE_250K
, },
101 { FLOPPY_DRIVE_TYPE_144
, 10, 82, 1, FDRIVE_RATE_250K
, },
102 { FLOPPY_DRIVE_TYPE_144
, 10, 83, 1, FDRIVE_RATE_250K
, },
103 { FLOPPY_DRIVE_TYPE_144
, 13, 80, 1, FDRIVE_RATE_250K
, },
104 { FLOPPY_DRIVE_TYPE_144
, 14, 80, 1, FDRIVE_RATE_250K
, },
105 /* 1.2 MB 5"1/4 floppy disks */
106 { FLOPPY_DRIVE_TYPE_120
, 15, 80, 1, FDRIVE_RATE_500K
, },
107 { FLOPPY_DRIVE_TYPE_120
, 18, 80, 1, FDRIVE_RATE_500K
, }, /* 5.25" 2880 */
108 { FLOPPY_DRIVE_TYPE_120
, 18, 82, 1, FDRIVE_RATE_500K
, },
109 { FLOPPY_DRIVE_TYPE_120
, 18, 83, 1, FDRIVE_RATE_500K
, },
110 { FLOPPY_DRIVE_TYPE_120
, 20, 80, 1, FDRIVE_RATE_500K
, }, /* 5.25" 3200 */
111 /* 720 kB 5"1/4 floppy disks */
112 { FLOPPY_DRIVE_TYPE_120
, 9, 80, 1, FDRIVE_RATE_250K
, }, /* 5.25" 1440 */
113 { FLOPPY_DRIVE_TYPE_120
, 11, 80, 1, FDRIVE_RATE_250K
, },
114 /* 360 kB 5"1/4 floppy disks */
115 { FLOPPY_DRIVE_TYPE_120
, 9, 40, 1, FDRIVE_RATE_300K
, }, /* 5.25" 720 */
116 { FLOPPY_DRIVE_TYPE_120
, 9, 40, 0, FDRIVE_RATE_300K
, },
117 { FLOPPY_DRIVE_TYPE_120
, 10, 41, 1, FDRIVE_RATE_300K
, },
118 { FLOPPY_DRIVE_TYPE_120
, 10, 42, 1, FDRIVE_RATE_300K
, },
119 /* 320 kB 5"1/4 floppy disks */
120 { FLOPPY_DRIVE_TYPE_120
, 8, 40, 1, FDRIVE_RATE_250K
, },
121 { FLOPPY_DRIVE_TYPE_120
, 8, 40, 0, FDRIVE_RATE_250K
, },
122 /* 360 kB must match 5"1/4 better than 3"1/2... */
123 { FLOPPY_DRIVE_TYPE_144
, 9, 80, 0, FDRIVE_RATE_250K
, }, /* 3.5" 720 */
125 { FLOPPY_DRIVE_TYPE_NONE
, -1, -1, 0, 0, },
128 static FDriveSize
drive_size(FloppyDriveType drive
)
131 case FLOPPY_DRIVE_TYPE_120
:
132 return FDRIVE_SIZE_525
;
133 case FLOPPY_DRIVE_TYPE_144
:
134 case FLOPPY_DRIVE_TYPE_288
:
135 return FDRIVE_SIZE_350
;
137 return FDRIVE_SIZE_UNKNOWN
;
141 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
142 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
144 /* Will always be a fixed parameter for us */
145 #define FD_SECTOR_LEN 512
146 #define FD_SECTOR_SC 2 /* Sector size code */
147 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
149 typedef struct FDCtrl FDCtrl
;
151 /* Floppy disk drive emulation */
152 typedef enum FDiskFlags
{
153 FDISK_DBL_SIDES
= 0x01,
156 typedef struct FDrive
{
160 FloppyDriveType drive
; /* CMOS drive type */
161 uint8_t perpendicular
; /* 2.88 MB access mode */
167 FloppyDriveType disk
; /* Current disk type */
169 uint8_t last_sect
; /* Nb sector per track */
170 uint8_t max_track
; /* Nb of tracks */
171 uint16_t bps
; /* Bytes per sector */
172 uint8_t ro
; /* Is read-only */
173 uint8_t media_changed
; /* Is media changed */
174 uint8_t media_rate
; /* Data rate of medium */
176 bool media_inserted
; /* Is there a medium in the tray */
177 bool media_validated
; /* Have we validated the media? */
181 static FloppyDriveType
get_fallback_drive_type(FDrive
*drv
);
183 static void fd_init(FDrive
*drv
)
186 drv
->perpendicular
= 0;
188 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
192 drv
->media_changed
= 1;
195 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
197 static int fd_sector_calc(uint8_t head
, uint8_t track
, uint8_t sect
,
198 uint8_t last_sect
, uint8_t num_sides
)
200 return (((track
* num_sides
) + head
) * last_sect
) + sect
- 1;
203 /* Returns current position, in sectors, for given drive */
204 static int fd_sector(FDrive
*drv
)
206 return fd_sector_calc(drv
->head
, drv
->track
, drv
->sect
, drv
->last_sect
,
210 /* Seek to a new position:
211 * returns 0 if already on right track
212 * returns 1 if track changed
213 * returns 2 if track is invalid
214 * returns 3 if sector is invalid
215 * returns 4 if seek is disabled
217 static int fd_seek(FDrive
*drv
, uint8_t head
, uint8_t track
, uint8_t sect
,
223 if (track
> drv
->max_track
||
224 (head
!= 0 && (drv
->flags
& FDISK_DBL_SIDES
) == 0)) {
225 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
226 head
, track
, sect
, 1,
227 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
228 drv
->max_track
, drv
->last_sect
);
231 if (sect
> drv
->last_sect
) {
232 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
233 head
, track
, sect
, 1,
234 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
235 drv
->max_track
, drv
->last_sect
);
238 sector
= fd_sector_calc(head
, track
, sect
, drv
->last_sect
, NUM_SIDES(drv
));
240 if (sector
!= fd_sector(drv
)) {
243 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x"
244 " (max=%d %02x %02x)\n",
245 head
, track
, sect
, 1, drv
->max_track
,
251 if (drv
->track
!= track
) {
252 if (drv
->media_inserted
) {
253 drv
->media_changed
= 0;
261 if (!drv
->media_inserted
) {
268 /* Set drive back to track 0 */
269 static void fd_recalibrate(FDrive
*drv
)
271 FLOPPY_DPRINTF("recalibrate\n");
272 fd_seek(drv
, 0, 0, 1, 1);
276 * Determine geometry based on inserted diskette.
277 * Will not operate on an empty drive.
279 * @return: 0 on success, -1 if the drive is empty.
281 static int pick_geometry(FDrive
*drv
)
283 BlockBackend
*blk
= drv
->blk
;
284 const FDFormat
*parse
;
285 uint64_t nb_sectors
, size
;
287 int match
, size_match
, type_match
;
288 bool magic
= drv
->drive
== FLOPPY_DRIVE_TYPE_AUTO
;
290 /* We can only pick a geometry if we have a diskette. */
291 if (!drv
->media_inserted
|| drv
->drive
== FLOPPY_DRIVE_TYPE_NONE
) {
295 /* We need to determine the likely geometry of the inserted medium.
296 * In order of preference, we look for:
297 * (1) The same drive type and number of sectors,
298 * (2) The same diskette size and number of sectors,
299 * (3) The same drive type.
301 * In all cases, matches that occur higher in the drive table will take
302 * precedence over matches that occur later in the table.
304 blk_get_geometry(blk
, &nb_sectors
);
305 match
= size_match
= type_match
= -1;
307 parse
= &fd_formats
[i
];
308 if (parse
->drive
== FLOPPY_DRIVE_TYPE_NONE
) {
311 size
= (parse
->max_head
+ 1) * parse
->max_track
* parse
->last_sect
;
312 if (nb_sectors
== size
) {
313 if (magic
|| parse
->drive
== drv
->drive
) {
314 /* (1) perfect match -- nb_sectors and drive type */
316 } else if (drive_size(parse
->drive
) == drive_size(drv
->drive
)) {
317 /* (2) size match -- nb_sectors and physical medium size */
318 match
= (match
== -1) ? i
: match
;
320 /* This is suspicious -- Did the user misconfigure? */
321 size_match
= (size_match
== -1) ? i
: size_match
;
323 } else if (type_match
== -1) {
324 if ((parse
->drive
== drv
->drive
) ||
325 (magic
&& (parse
->drive
== get_fallback_drive_type(drv
)))) {
326 /* (3) type match -- nb_sectors mismatch, but matches the type
327 * specified explicitly by the user, or matches the fallback
328 * default type when using the drive autodetect mechanism */
334 /* No exact match found */
336 if (size_match
!= -1) {
337 parse
= &fd_formats
[size_match
];
338 FLOPPY_DPRINTF("User requested floppy drive type '%s', "
339 "but inserted medium appears to be a "
340 "%d sector '%s' type\n",
341 FloppyDriveType_lookup
[drv
->drive
],
343 FloppyDriveType_lookup
[parse
->drive
]);
348 /* No match of any kind found -- fd_format is misconfigured, abort. */
350 error_setg(&error_abort
, "No candidate geometries present in table "
351 " for floppy drive type '%s'",
352 FloppyDriveType_lookup
[drv
->drive
]);
355 parse
= &(fd_formats
[match
]);
358 if (parse
->max_head
== 0) {
359 drv
->flags
&= ~FDISK_DBL_SIDES
;
361 drv
->flags
|= FDISK_DBL_SIDES
;
363 drv
->max_track
= parse
->max_track
;
364 drv
->last_sect
= parse
->last_sect
;
365 drv
->disk
= parse
->drive
;
366 drv
->media_rate
= parse
->rate
;
370 static void pick_drive_type(FDrive
*drv
)
372 if (drv
->drive
!= FLOPPY_DRIVE_TYPE_AUTO
) {
376 if (pick_geometry(drv
) == 0) {
377 drv
->drive
= drv
->disk
;
379 drv
->drive
= get_fallback_drive_type(drv
);
382 g_assert(drv
->drive
!= FLOPPY_DRIVE_TYPE_AUTO
);
385 /* Revalidate a disk drive after a disk change */
386 static void fd_revalidate(FDrive
*drv
)
390 FLOPPY_DPRINTF("revalidate\n");
391 if (drv
->blk
!= NULL
) {
392 drv
->ro
= blk_is_read_only(drv
->blk
);
393 if (!drv
->media_inserted
) {
394 FLOPPY_DPRINTF("No disk in drive\n");
395 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
396 } else if (!drv
->media_validated
) {
397 rc
= pick_geometry(drv
);
399 FLOPPY_DPRINTF("Could not validate floppy drive media");
401 drv
->media_validated
= true;
402 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n",
403 (drv
->flags
& FDISK_DBL_SIDES
) ? 2 : 1,
404 drv
->max_track
, drv
->last_sect
,
405 drv
->ro
? "ro" : "rw");
409 FLOPPY_DPRINTF("No drive connected\n");
412 drv
->flags
&= ~FDISK_DBL_SIDES
;
413 drv
->drive
= FLOPPY_DRIVE_TYPE_NONE
;
414 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
418 /********************************************************/
419 /* Intel 82078 floppy disk controller emulation */
421 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
);
422 static void fdctrl_to_command_phase(FDCtrl
*fdctrl
);
423 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
424 int dma_pos
, int dma_len
);
425 static void fdctrl_raise_irq(FDCtrl
*fdctrl
);
426 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
);
428 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
);
429 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
);
430 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
);
431 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
);
432 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
);
433 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
);
434 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
);
435 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
);
436 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
);
437 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
);
438 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
);
439 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
);
451 FD_STATE_MULTI
= 0x01, /* multi track flag */
452 FD_STATE_FORMAT
= 0x02, /* format flag */
468 FD_CMD_READ_TRACK
= 0x02,
469 FD_CMD_SPECIFY
= 0x03,
470 FD_CMD_SENSE_DRIVE_STATUS
= 0x04,
473 FD_CMD_RECALIBRATE
= 0x07,
474 FD_CMD_SENSE_INTERRUPT_STATUS
= 0x08,
475 FD_CMD_WRITE_DELETED
= 0x09,
476 FD_CMD_READ_ID
= 0x0a,
477 FD_CMD_READ_DELETED
= 0x0c,
478 FD_CMD_FORMAT_TRACK
= 0x0d,
479 FD_CMD_DUMPREG
= 0x0e,
481 FD_CMD_VERSION
= 0x10,
482 FD_CMD_SCAN_EQUAL
= 0x11,
483 FD_CMD_PERPENDICULAR_MODE
= 0x12,
484 FD_CMD_CONFIGURE
= 0x13,
486 FD_CMD_VERIFY
= 0x16,
487 FD_CMD_POWERDOWN_MODE
= 0x17,
488 FD_CMD_PART_ID
= 0x18,
489 FD_CMD_SCAN_LOW_OR_EQUAL
= 0x19,
490 FD_CMD_SCAN_HIGH_OR_EQUAL
= 0x1d,
492 FD_CMD_OPTION
= 0x33,
493 FD_CMD_RESTORE
= 0x4e,
494 FD_CMD_DRIVE_SPECIFICATION_COMMAND
= 0x8e,
495 FD_CMD_RELATIVE_SEEK_OUT
= 0x8f,
496 FD_CMD_FORMAT_AND_WRITE
= 0xcd,
497 FD_CMD_RELATIVE_SEEK_IN
= 0xcf,
501 FD_CONFIG_PRETRK
= 0xff, /* Pre-compensation set to track 0 */
502 FD_CONFIG_FIFOTHR
= 0x0f, /* FIFO threshold set to 1 byte */
503 FD_CONFIG_POLL
= 0x10, /* Poll enabled */
504 FD_CONFIG_EFIFO
= 0x20, /* FIFO disabled */
505 FD_CONFIG_EIS
= 0x40, /* No implied seeks */
514 FD_SR0_ABNTERM
= 0x40,
515 FD_SR0_INVCMD
= 0x80,
516 FD_SR0_RDYCHG
= 0xc0,
520 FD_SR1_MA
= 0x01, /* Missing address mark */
521 FD_SR1_NW
= 0x02, /* Not writable */
522 FD_SR1_EC
= 0x80, /* End of cylinder */
526 FD_SR2_SNS
= 0x04, /* Scan not satisfied */
527 FD_SR2_SEH
= 0x08, /* Scan equal hit */
538 FD_SRA_INTPEND
= 0x80,
552 FD_DOR_SELMASK
= 0x03,
554 FD_DOR_SELMASK
= 0x01,
556 FD_DOR_nRESET
= 0x04,
558 FD_DOR_MOTEN0
= 0x10,
559 FD_DOR_MOTEN1
= 0x20,
560 FD_DOR_MOTEN2
= 0x40,
561 FD_DOR_MOTEN3
= 0x80,
566 FD_TDR_BOOTSEL
= 0x0c,
568 FD_TDR_BOOTSEL
= 0x04,
573 FD_DSR_DRATEMASK
= 0x03,
574 FD_DSR_PWRDOWN
= 0x40,
575 FD_DSR_SWRESET
= 0x80,
579 FD_MSR_DRV0BUSY
= 0x01,
580 FD_MSR_DRV1BUSY
= 0x02,
581 FD_MSR_DRV2BUSY
= 0x04,
582 FD_MSR_DRV3BUSY
= 0x08,
583 FD_MSR_CMDBUSY
= 0x10,
584 FD_MSR_NONDMA
= 0x20,
590 FD_DIR_DSKCHG
= 0x80,
594 * See chapter 5.0 "Controller phases" of the spec:
597 * The host writes a command and its parameters into the FIFO. The command
598 * phase is completed when all parameters for the command have been supplied,
599 * and execution phase is entered.
602 * Data transfers, either DMA or non-DMA. For non-DMA transfers, the FIFO
603 * contains the payload now, otherwise it's unused. When all bytes of the
604 * required data have been transferred, the state is switched to either result
605 * phase (if the command produces status bytes) or directly back into the
606 * command phase for the next command.
609 * The host reads out the FIFO, which contains one or more result bytes now.
612 /* Only for migration: reconstruct phase from registers like qemu 2.3 */
613 FD_PHASE_RECONSTRUCT
= 0,
615 FD_PHASE_COMMAND
= 1,
616 FD_PHASE_EXECUTION
= 2,
620 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
621 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
626 /* Controller state */
627 QEMUTimer
*result_timer
;
630 /* Controller's identification */
636 uint8_t dor_vmstate
; /* only used as temp during vmstate */
651 uint8_t eot
; /* last wanted sector */
652 /* States kept only to be returned back */
653 /* precompensation */
657 /* Power down config (also with status regB access mode */
660 uint8_t num_floppies
;
661 FDrive drives
[MAX_FD
];
663 uint32_t check_media_rate
;
664 FloppyDriveType fallback
; /* type=auto failure fallback */
670 static FloppyDriveType
get_fallback_drive_type(FDrive
*drv
)
672 return drv
->fdctrl
->fallback
;
675 #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
676 #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC)
678 typedef struct FDCtrlSysBus
{
680 SysBusDevice parent_obj
;
686 #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC)
688 typedef struct FDCtrlISABus
{
689 ISADevice parent_obj
;
699 static uint32_t fdctrl_read (void *opaque
, uint32_t reg
)
701 FDCtrl
*fdctrl
= opaque
;
707 retval
= fdctrl_read_statusA(fdctrl
);
710 retval
= fdctrl_read_statusB(fdctrl
);
713 retval
= fdctrl_read_dor(fdctrl
);
716 retval
= fdctrl_read_tape(fdctrl
);
719 retval
= fdctrl_read_main_status(fdctrl
);
722 retval
= fdctrl_read_data(fdctrl
);
725 retval
= fdctrl_read_dir(fdctrl
);
728 retval
= (uint32_t)(-1);
731 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg
& 7, retval
);
736 static void fdctrl_write (void *opaque
, uint32_t reg
, uint32_t value
)
738 FDCtrl
*fdctrl
= opaque
;
740 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg
& 7, value
);
745 fdctrl_write_dor(fdctrl
, value
);
748 fdctrl_write_tape(fdctrl
, value
);
751 fdctrl_write_rate(fdctrl
, value
);
754 fdctrl_write_data(fdctrl
, value
);
757 fdctrl_write_ccr(fdctrl
, value
);
764 static uint64_t fdctrl_read_mem (void *opaque
, hwaddr reg
,
767 return fdctrl_read(opaque
, (uint32_t)reg
);
770 static void fdctrl_write_mem (void *opaque
, hwaddr reg
,
771 uint64_t value
, unsigned size
)
773 fdctrl_write(opaque
, (uint32_t)reg
, value
);
776 static const MemoryRegionOps fdctrl_mem_ops
= {
777 .read
= fdctrl_read_mem
,
778 .write
= fdctrl_write_mem
,
779 .endianness
= DEVICE_NATIVE_ENDIAN
,
782 static const MemoryRegionOps fdctrl_mem_strict_ops
= {
783 .read
= fdctrl_read_mem
,
784 .write
= fdctrl_write_mem
,
785 .endianness
= DEVICE_NATIVE_ENDIAN
,
787 .min_access_size
= 1,
788 .max_access_size
= 1,
792 static bool fdrive_media_changed_needed(void *opaque
)
794 FDrive
*drive
= opaque
;
796 return (drive
->media_inserted
&& drive
->media_changed
!= 1);
799 static const VMStateDescription vmstate_fdrive_media_changed
= {
800 .name
= "fdrive/media_changed",
802 .minimum_version_id
= 1,
803 .needed
= fdrive_media_changed_needed
,
804 .fields
= (VMStateField
[]) {
805 VMSTATE_UINT8(media_changed
, FDrive
),
806 VMSTATE_END_OF_LIST()
810 static bool fdrive_media_rate_needed(void *opaque
)
812 FDrive
*drive
= opaque
;
814 return drive
->fdctrl
->check_media_rate
;
817 static const VMStateDescription vmstate_fdrive_media_rate
= {
818 .name
= "fdrive/media_rate",
820 .minimum_version_id
= 1,
821 .needed
= fdrive_media_rate_needed
,
822 .fields
= (VMStateField
[]) {
823 VMSTATE_UINT8(media_rate
, FDrive
),
824 VMSTATE_END_OF_LIST()
828 static bool fdrive_perpendicular_needed(void *opaque
)
830 FDrive
*drive
= opaque
;
832 return drive
->perpendicular
!= 0;
835 static const VMStateDescription vmstate_fdrive_perpendicular
= {
836 .name
= "fdrive/perpendicular",
838 .minimum_version_id
= 1,
839 .needed
= fdrive_perpendicular_needed
,
840 .fields
= (VMStateField
[]) {
841 VMSTATE_UINT8(perpendicular
, FDrive
),
842 VMSTATE_END_OF_LIST()
846 static int fdrive_post_load(void *opaque
, int version_id
)
848 fd_revalidate(opaque
);
852 static const VMStateDescription vmstate_fdrive
= {
855 .minimum_version_id
= 1,
856 .post_load
= fdrive_post_load
,
857 .fields
= (VMStateField
[]) {
858 VMSTATE_UINT8(head
, FDrive
),
859 VMSTATE_UINT8(track
, FDrive
),
860 VMSTATE_UINT8(sect
, FDrive
),
861 VMSTATE_END_OF_LIST()
863 .subsections
= (const VMStateDescription
*[]) {
864 &vmstate_fdrive_media_changed
,
865 &vmstate_fdrive_media_rate
,
866 &vmstate_fdrive_perpendicular
,
872 * Reconstructs the phase from register values according to the logic that was
873 * implemented in qemu 2.3. This is the default value that is used if the phase
874 * subsection is not present on migration.
876 * Don't change this function to reflect newer qemu versions, it is part of
879 static int reconstruct_phase(FDCtrl
*fdctrl
)
881 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
882 return FD_PHASE_EXECUTION
;
883 } else if ((fdctrl
->msr
& FD_MSR_RQM
) == 0) {
884 /* qemu 2.3 disabled RQM only during DMA transfers */
885 return FD_PHASE_EXECUTION
;
886 } else if (fdctrl
->msr
& FD_MSR_DIO
) {
887 return FD_PHASE_RESULT
;
889 return FD_PHASE_COMMAND
;
893 static void fdc_pre_save(void *opaque
)
897 s
->dor_vmstate
= s
->dor
| GET_CUR_DRV(s
);
900 static int fdc_pre_load(void *opaque
)
903 s
->phase
= FD_PHASE_RECONSTRUCT
;
907 static int fdc_post_load(void *opaque
, int version_id
)
911 SET_CUR_DRV(s
, s
->dor_vmstate
& FD_DOR_SELMASK
);
912 s
->dor
= s
->dor_vmstate
& ~FD_DOR_SELMASK
;
914 if (s
->phase
== FD_PHASE_RECONSTRUCT
) {
915 s
->phase
= reconstruct_phase(s
);
921 static bool fdc_reset_sensei_needed(void *opaque
)
925 return s
->reset_sensei
!= 0;
928 static const VMStateDescription vmstate_fdc_reset_sensei
= {
929 .name
= "fdc/reset_sensei",
931 .minimum_version_id
= 1,
932 .needed
= fdc_reset_sensei_needed
,
933 .fields
= (VMStateField
[]) {
934 VMSTATE_INT32(reset_sensei
, FDCtrl
),
935 VMSTATE_END_OF_LIST()
939 static bool fdc_result_timer_needed(void *opaque
)
943 return timer_pending(s
->result_timer
);
946 static const VMStateDescription vmstate_fdc_result_timer
= {
947 .name
= "fdc/result_timer",
949 .minimum_version_id
= 1,
950 .needed
= fdc_result_timer_needed
,
951 .fields
= (VMStateField
[]) {
952 VMSTATE_TIMER_PTR(result_timer
, FDCtrl
),
953 VMSTATE_END_OF_LIST()
957 static bool fdc_phase_needed(void *opaque
)
959 FDCtrl
*fdctrl
= opaque
;
961 return reconstruct_phase(fdctrl
) != fdctrl
->phase
;
964 static const VMStateDescription vmstate_fdc_phase
= {
967 .minimum_version_id
= 1,
968 .needed
= fdc_phase_needed
,
969 .fields
= (VMStateField
[]) {
970 VMSTATE_UINT8(phase
, FDCtrl
),
971 VMSTATE_END_OF_LIST()
975 static const VMStateDescription vmstate_fdc
= {
978 .minimum_version_id
= 2,
979 .pre_save
= fdc_pre_save
,
980 .pre_load
= fdc_pre_load
,
981 .post_load
= fdc_post_load
,
982 .fields
= (VMStateField
[]) {
983 /* Controller State */
984 VMSTATE_UINT8(sra
, FDCtrl
),
985 VMSTATE_UINT8(srb
, FDCtrl
),
986 VMSTATE_UINT8(dor_vmstate
, FDCtrl
),
987 VMSTATE_UINT8(tdr
, FDCtrl
),
988 VMSTATE_UINT8(dsr
, FDCtrl
),
989 VMSTATE_UINT8(msr
, FDCtrl
),
990 VMSTATE_UINT8(status0
, FDCtrl
),
991 VMSTATE_UINT8(status1
, FDCtrl
),
992 VMSTATE_UINT8(status2
, FDCtrl
),
994 VMSTATE_VARRAY_INT32(fifo
, FDCtrl
, fifo_size
, 0, vmstate_info_uint8
,
996 VMSTATE_UINT32(data_pos
, FDCtrl
),
997 VMSTATE_UINT32(data_len
, FDCtrl
),
998 VMSTATE_UINT8(data_state
, FDCtrl
),
999 VMSTATE_UINT8(data_dir
, FDCtrl
),
1000 VMSTATE_UINT8(eot
, FDCtrl
),
1001 /* States kept only to be returned back */
1002 VMSTATE_UINT8(timer0
, FDCtrl
),
1003 VMSTATE_UINT8(timer1
, FDCtrl
),
1004 VMSTATE_UINT8(precomp_trk
, FDCtrl
),
1005 VMSTATE_UINT8(config
, FDCtrl
),
1006 VMSTATE_UINT8(lock
, FDCtrl
),
1007 VMSTATE_UINT8(pwrd
, FDCtrl
),
1008 VMSTATE_UINT8_EQUAL(num_floppies
, FDCtrl
),
1009 VMSTATE_STRUCT_ARRAY(drives
, FDCtrl
, MAX_FD
, 1,
1010 vmstate_fdrive
, FDrive
),
1011 VMSTATE_END_OF_LIST()
1013 .subsections
= (const VMStateDescription
*[]) {
1014 &vmstate_fdc_reset_sensei
,
1015 &vmstate_fdc_result_timer
,
1021 static void fdctrl_external_reset_sysbus(DeviceState
*d
)
1023 FDCtrlSysBus
*sys
= SYSBUS_FDC(d
);
1024 FDCtrl
*s
= &sys
->state
;
1029 static void fdctrl_external_reset_isa(DeviceState
*d
)
1031 FDCtrlISABus
*isa
= ISA_FDC(d
);
1032 FDCtrl
*s
= &isa
->state
;
1037 static void fdctrl_handle_tc(void *opaque
, int irq
, int level
)
1039 //FDCtrl *s = opaque;
1043 FLOPPY_DPRINTF("TC pulsed\n");
1047 /* Change IRQ state */
1048 static void fdctrl_reset_irq(FDCtrl
*fdctrl
)
1050 fdctrl
->status0
= 0;
1051 if (!(fdctrl
->sra
& FD_SRA_INTPEND
))
1053 FLOPPY_DPRINTF("Reset interrupt\n");
1054 qemu_set_irq(fdctrl
->irq
, 0);
1055 fdctrl
->sra
&= ~FD_SRA_INTPEND
;
1058 static void fdctrl_raise_irq(FDCtrl
*fdctrl
)
1060 if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
1061 qemu_set_irq(fdctrl
->irq
, 1);
1062 fdctrl
->sra
|= FD_SRA_INTPEND
;
1065 fdctrl
->reset_sensei
= 0;
1066 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl
->status0
);
1069 /* Reset controller */
1070 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
)
1074 FLOPPY_DPRINTF("reset controller\n");
1075 fdctrl_reset_irq(fdctrl
);
1076 /* Initialise controller */
1079 if (!fdctrl
->drives
[1].blk
) {
1080 fdctrl
->sra
|= FD_SRA_nDRV2
;
1082 fdctrl
->cur_drv
= 0;
1083 fdctrl
->dor
= FD_DOR_nRESET
;
1084 fdctrl
->dor
|= (fdctrl
->dma_chann
!= -1) ? FD_DOR_DMAEN
: 0;
1085 fdctrl
->msr
= FD_MSR_RQM
;
1086 fdctrl
->reset_sensei
= 0;
1087 timer_del(fdctrl
->result_timer
);
1089 fdctrl
->data_pos
= 0;
1090 fdctrl
->data_len
= 0;
1091 fdctrl
->data_state
= 0;
1092 fdctrl
->data_dir
= FD_DIR_WRITE
;
1093 for (i
= 0; i
< MAX_FD
; i
++)
1094 fd_recalibrate(&fdctrl
->drives
[i
]);
1095 fdctrl_to_command_phase(fdctrl
);
1097 fdctrl
->status0
|= FD_SR0_RDYCHG
;
1098 fdctrl_raise_irq(fdctrl
);
1099 fdctrl
->reset_sensei
= FD_RESET_SENSEI_COUNT
;
1103 static inline FDrive
*drv0(FDCtrl
*fdctrl
)
1105 return &fdctrl
->drives
[(fdctrl
->tdr
& FD_TDR_BOOTSEL
) >> 2];
1108 static inline FDrive
*drv1(FDCtrl
*fdctrl
)
1110 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (1 << 2))
1111 return &fdctrl
->drives
[1];
1113 return &fdctrl
->drives
[0];
1117 static inline FDrive
*drv2(FDCtrl
*fdctrl
)
1119 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (2 << 2))
1120 return &fdctrl
->drives
[2];
1122 return &fdctrl
->drives
[1];
1125 static inline FDrive
*drv3(FDCtrl
*fdctrl
)
1127 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (3 << 2))
1128 return &fdctrl
->drives
[3];
1130 return &fdctrl
->drives
[2];
1134 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
)
1136 switch (fdctrl
->cur_drv
) {
1137 case 0: return drv0(fdctrl
);
1138 case 1: return drv1(fdctrl
);
1140 case 2: return drv2(fdctrl
);
1141 case 3: return drv3(fdctrl
);
1143 default: return NULL
;
1147 /* Status A register : 0x00 (read-only) */
1148 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
)
1150 uint32_t retval
= fdctrl
->sra
;
1152 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval
);
1157 /* Status B register : 0x01 (read-only) */
1158 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
)
1160 uint32_t retval
= fdctrl
->srb
;
1162 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval
);
1167 /* Digital output register : 0x02 */
1168 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
)
1170 uint32_t retval
= fdctrl
->dor
;
1172 /* Selected drive */
1173 retval
|= fdctrl
->cur_drv
;
1174 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval
);
1179 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
)
1181 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value
);
1184 if (value
& FD_DOR_MOTEN0
)
1185 fdctrl
->srb
|= FD_SRB_MTR0
;
1187 fdctrl
->srb
&= ~FD_SRB_MTR0
;
1188 if (value
& FD_DOR_MOTEN1
)
1189 fdctrl
->srb
|= FD_SRB_MTR1
;
1191 fdctrl
->srb
&= ~FD_SRB_MTR1
;
1195 fdctrl
->srb
|= FD_SRB_DR0
;
1197 fdctrl
->srb
&= ~FD_SRB_DR0
;
1200 if (!(value
& FD_DOR_nRESET
)) {
1201 if (fdctrl
->dor
& FD_DOR_nRESET
) {
1202 FLOPPY_DPRINTF("controller enter RESET state\n");
1205 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1206 FLOPPY_DPRINTF("controller out of RESET state\n");
1207 fdctrl_reset(fdctrl
, 1);
1208 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1211 /* Selected drive */
1212 fdctrl
->cur_drv
= value
& FD_DOR_SELMASK
;
1214 fdctrl
->dor
= value
;
1217 /* Tape drive register : 0x03 */
1218 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
)
1220 uint32_t retval
= fdctrl
->tdr
;
1222 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval
);
1227 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
)
1230 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1231 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1234 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value
);
1235 /* Disk boot selection indicator */
1236 fdctrl
->tdr
= value
& FD_TDR_BOOTSEL
;
1237 /* Tape indicators: never allow */
1240 /* Main status register : 0x04 (read) */
1241 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
)
1243 uint32_t retval
= fdctrl
->msr
;
1245 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1246 fdctrl
->dor
|= FD_DOR_nRESET
;
1248 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval
);
1253 /* Data select rate register : 0x04 (write) */
1254 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
)
1257 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1258 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1261 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value
);
1262 /* Reset: autoclear */
1263 if (value
& FD_DSR_SWRESET
) {
1264 fdctrl
->dor
&= ~FD_DOR_nRESET
;
1265 fdctrl_reset(fdctrl
, 1);
1266 fdctrl
->dor
|= FD_DOR_nRESET
;
1268 if (value
& FD_DSR_PWRDOWN
) {
1269 fdctrl_reset(fdctrl
, 1);
1271 fdctrl
->dsr
= value
;
1274 /* Configuration control register: 0x07 (write) */
1275 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
)
1278 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1279 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1282 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value
);
1284 /* Only the rate selection bits used in AT mode, and we
1285 * store those in the DSR.
1287 fdctrl
->dsr
= (fdctrl
->dsr
& ~FD_DSR_DRATEMASK
) |
1288 (value
& FD_DSR_DRATEMASK
);
1291 static int fdctrl_media_changed(FDrive
*drv
)
1293 return drv
->media_changed
;
1296 /* Digital input register : 0x07 (read-only) */
1297 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
)
1299 uint32_t retval
= 0;
1301 if (fdctrl_media_changed(get_cur_drv(fdctrl
))) {
1302 retval
|= FD_DIR_DSKCHG
;
1305 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval
);
1311 /* Clear the FIFO and update the state for receiving the next command */
1312 static void fdctrl_to_command_phase(FDCtrl
*fdctrl
)
1314 fdctrl
->phase
= FD_PHASE_COMMAND
;
1315 fdctrl
->data_dir
= FD_DIR_WRITE
;
1316 fdctrl
->data_pos
= 0;
1317 fdctrl
->data_len
= 1; /* Accept command byte, adjust for params later */
1318 fdctrl
->msr
&= ~(FD_MSR_CMDBUSY
| FD_MSR_DIO
);
1319 fdctrl
->msr
|= FD_MSR_RQM
;
1322 /* Update the state to allow the guest to read out the command status.
1323 * @fifo_len is the number of result bytes to be read out. */
1324 static void fdctrl_to_result_phase(FDCtrl
*fdctrl
, int fifo_len
)
1326 fdctrl
->phase
= FD_PHASE_RESULT
;
1327 fdctrl
->data_dir
= FD_DIR_READ
;
1328 fdctrl
->data_len
= fifo_len
;
1329 fdctrl
->data_pos
= 0;
1330 fdctrl
->msr
|= FD_MSR_CMDBUSY
| FD_MSR_RQM
| FD_MSR_DIO
;
1333 /* Set an error: unimplemented/unknown command */
1334 static void fdctrl_unimplemented(FDCtrl
*fdctrl
, int direction
)
1336 qemu_log_mask(LOG_UNIMP
, "fdc: unimplemented command 0x%02x\n",
1338 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
1339 fdctrl_to_result_phase(fdctrl
, 1);
1342 /* Seek to next sector
1343 * returns 0 when end of track reached (for DBL_SIDES on head 1)
1344 * otherwise returns 1
1346 static int fdctrl_seek_to_next_sect(FDCtrl
*fdctrl
, FDrive
*cur_drv
)
1348 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1349 cur_drv
->head
, cur_drv
->track
, cur_drv
->sect
,
1350 fd_sector(cur_drv
));
1351 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1353 uint8_t new_head
= cur_drv
->head
;
1354 uint8_t new_track
= cur_drv
->track
;
1355 uint8_t new_sect
= cur_drv
->sect
;
1359 if (new_sect
>= cur_drv
->last_sect
||
1360 new_sect
== fdctrl
->eot
) {
1362 if (FD_MULTI_TRACK(fdctrl
->data_state
)) {
1363 if (new_head
== 0 &&
1364 (cur_drv
->flags
& FDISK_DBL_SIDES
) != 0) {
1369 fdctrl
->status0
|= FD_SR0_SEEK
;
1370 if ((cur_drv
->flags
& FDISK_DBL_SIDES
) == 0) {
1375 fdctrl
->status0
|= FD_SR0_SEEK
;
1380 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1381 new_head
, new_track
, new_sect
, fd_sector(cur_drv
));
1386 fd_seek(cur_drv
, new_head
, new_track
, new_sect
, 1);
1390 /* Callback for transfer end (stop or abort) */
1391 static void fdctrl_stop_transfer(FDCtrl
*fdctrl
, uint8_t status0
,
1392 uint8_t status1
, uint8_t status2
)
1395 cur_drv
= get_cur_drv(fdctrl
);
1397 fdctrl
->status0
&= ~(FD_SR0_DS0
| FD_SR0_DS1
| FD_SR0_HEAD
);
1398 fdctrl
->status0
|= GET_CUR_DRV(fdctrl
);
1399 if (cur_drv
->head
) {
1400 fdctrl
->status0
|= FD_SR0_HEAD
;
1402 fdctrl
->status0
|= status0
;
1404 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1405 status0
, status1
, status2
, fdctrl
->status0
);
1406 fdctrl
->fifo
[0] = fdctrl
->status0
;
1407 fdctrl
->fifo
[1] = status1
;
1408 fdctrl
->fifo
[2] = status2
;
1409 fdctrl
->fifo
[3] = cur_drv
->track
;
1410 fdctrl
->fifo
[4] = cur_drv
->head
;
1411 fdctrl
->fifo
[5] = cur_drv
->sect
;
1412 fdctrl
->fifo
[6] = FD_SECTOR_SC
;
1413 fdctrl
->data_dir
= FD_DIR_READ
;
1414 if (!(fdctrl
->msr
& FD_MSR_NONDMA
)) {
1415 DMA_release_DREQ(fdctrl
->dma_chann
);
1417 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
1418 fdctrl
->msr
&= ~FD_MSR_NONDMA
;
1420 fdctrl_to_result_phase(fdctrl
, 7);
1421 fdctrl_raise_irq(fdctrl
);
1424 /* Prepare a data transfer (either DMA or FIFO) */
1425 static void fdctrl_start_transfer(FDCtrl
*fdctrl
, int direction
)
1430 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1431 cur_drv
= get_cur_drv(fdctrl
);
1432 kt
= fdctrl
->fifo
[2];
1433 kh
= fdctrl
->fifo
[3];
1434 ks
= fdctrl
->fifo
[4];
1435 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1436 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1437 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1438 NUM_SIDES(cur_drv
)));
1439 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1442 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1443 fdctrl
->fifo
[3] = kt
;
1444 fdctrl
->fifo
[4] = kh
;
1445 fdctrl
->fifo
[5] = ks
;
1449 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1450 fdctrl
->fifo
[3] = kt
;
1451 fdctrl
->fifo
[4] = kh
;
1452 fdctrl
->fifo
[5] = ks
;
1455 /* No seek enabled */
1456 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1457 fdctrl
->fifo
[3] = kt
;
1458 fdctrl
->fifo
[4] = kh
;
1459 fdctrl
->fifo
[5] = ks
;
1462 fdctrl
->status0
|= FD_SR0_SEEK
;
1468 /* Check the data rate. If the programmed data rate does not match
1469 * the currently inserted medium, the operation has to fail. */
1470 if (fdctrl
->check_media_rate
&&
1471 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
1472 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1473 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
1474 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
1475 fdctrl
->fifo
[3] = kt
;
1476 fdctrl
->fifo
[4] = kh
;
1477 fdctrl
->fifo
[5] = ks
;
1481 /* Set the FIFO state */
1482 fdctrl
->data_dir
= direction
;
1483 fdctrl
->data_pos
= 0;
1484 assert(fdctrl
->msr
& FD_MSR_CMDBUSY
);
1485 if (fdctrl
->fifo
[0] & 0x80)
1486 fdctrl
->data_state
|= FD_STATE_MULTI
;
1488 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1489 if (fdctrl
->fifo
[5] == 0) {
1490 fdctrl
->data_len
= fdctrl
->fifo
[8];
1493 fdctrl
->data_len
= 128 << (fdctrl
->fifo
[5] > 7 ? 7 : fdctrl
->fifo
[5]);
1494 tmp
= (fdctrl
->fifo
[6] - ks
+ 1);
1495 if (fdctrl
->fifo
[0] & 0x80)
1496 tmp
+= fdctrl
->fifo
[6];
1497 fdctrl
->data_len
*= tmp
;
1499 fdctrl
->eot
= fdctrl
->fifo
[6];
1500 if (fdctrl
->dor
& FD_DOR_DMAEN
) {
1502 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1503 dma_mode
= DMA_get_channel_mode(fdctrl
->dma_chann
);
1504 dma_mode
= (dma_mode
>> 2) & 3;
1505 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1506 dma_mode
, direction
,
1507 (128 << fdctrl
->fifo
[5]) *
1508 (cur_drv
->last_sect
- ks
+ 1), fdctrl
->data_len
);
1509 if (((direction
== FD_DIR_SCANE
|| direction
== FD_DIR_SCANL
||
1510 direction
== FD_DIR_SCANH
) && dma_mode
== 0) ||
1511 (direction
== FD_DIR_WRITE
&& dma_mode
== 2) ||
1512 (direction
== FD_DIR_READ
&& dma_mode
== 1) ||
1513 (direction
== FD_DIR_VERIFY
)) {
1514 /* No access is allowed until DMA transfer has completed */
1515 fdctrl
->msr
&= ~FD_MSR_RQM
;
1516 if (direction
!= FD_DIR_VERIFY
) {
1517 /* Now, we just have to wait for the DMA controller to
1520 DMA_hold_DREQ(fdctrl
->dma_chann
);
1523 /* Start transfer */
1524 fdctrl_transfer_handler(fdctrl
, fdctrl
->dma_chann
, 0,
1529 FLOPPY_DPRINTF("bad dma_mode=%d direction=%d\n", dma_mode
,
1533 FLOPPY_DPRINTF("start non-DMA transfer\n");
1534 fdctrl
->msr
|= FD_MSR_NONDMA
| FD_MSR_RQM
;
1535 if (direction
!= FD_DIR_WRITE
)
1536 fdctrl
->msr
|= FD_MSR_DIO
;
1537 /* IO based transfer: calculate len */
1538 fdctrl_raise_irq(fdctrl
);
1541 /* Prepare a transfer of deleted data */
1542 static void fdctrl_start_transfer_del(FDCtrl
*fdctrl
, int direction
)
1544 qemu_log_mask(LOG_UNIMP
, "fdctrl_start_transfer_del() unimplemented\n");
1546 /* We don't handle deleted data,
1547 * so we don't return *ANYTHING*
1549 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1552 /* handlers for DMA transfers */
1553 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
1554 int dma_pos
, int dma_len
)
1558 int len
, start_pos
, rel_pos
;
1559 uint8_t status0
= 0x00, status1
= 0x00, status2
= 0x00;
1562 if (fdctrl
->msr
& FD_MSR_RQM
) {
1563 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1566 cur_drv
= get_cur_drv(fdctrl
);
1567 if (fdctrl
->data_dir
== FD_DIR_SCANE
|| fdctrl
->data_dir
== FD_DIR_SCANL
||
1568 fdctrl
->data_dir
== FD_DIR_SCANH
)
1569 status2
= FD_SR2_SNS
;
1570 if (dma_len
> fdctrl
->data_len
)
1571 dma_len
= fdctrl
->data_len
;
1572 if (cur_drv
->blk
== NULL
) {
1573 if (fdctrl
->data_dir
== FD_DIR_WRITE
)
1574 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1576 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1578 goto transfer_error
;
1580 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1581 for (start_pos
= fdctrl
->data_pos
; fdctrl
->data_pos
< dma_len
;) {
1582 len
= dma_len
- fdctrl
->data_pos
;
1583 if (len
+ rel_pos
> FD_SECTOR_LEN
)
1584 len
= FD_SECTOR_LEN
- rel_pos
;
1585 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1586 "(%d-0x%08x 0x%08x)\n", len
, dma_len
, fdctrl
->data_pos
,
1587 fdctrl
->data_len
, GET_CUR_DRV(fdctrl
), cur_drv
->head
,
1588 cur_drv
->track
, cur_drv
->sect
, fd_sector(cur_drv
),
1589 fd_sector(cur_drv
) * FD_SECTOR_LEN
);
1590 if (fdctrl
->data_dir
!= FD_DIR_WRITE
||
1591 len
< FD_SECTOR_LEN
|| rel_pos
!= 0) {
1592 /* READ & SCAN commands and realign to a sector for WRITE */
1593 if (blk_read(cur_drv
->blk
, fd_sector(cur_drv
),
1594 fdctrl
->fifo
, 1) < 0) {
1595 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1596 fd_sector(cur_drv
));
1597 /* Sure, image size is too small... */
1598 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1601 switch (fdctrl
->data_dir
) {
1604 DMA_write_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1605 fdctrl
->data_pos
, len
);
1608 /* WRITE commands */
1610 /* Handle readonly medium early, no need to do DMA, touch the
1611 * LED or attempt any writes. A real floppy doesn't attempt
1612 * to write to readonly media either. */
1613 fdctrl_stop_transfer(fdctrl
,
1614 FD_SR0_ABNTERM
| FD_SR0_SEEK
, FD_SR1_NW
,
1616 goto transfer_error
;
1619 DMA_read_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1620 fdctrl
->data_pos
, len
);
1621 if (blk_write(cur_drv
->blk
, fd_sector(cur_drv
),
1622 fdctrl
->fifo
, 1) < 0) {
1623 FLOPPY_DPRINTF("error writing sector %d\n",
1624 fd_sector(cur_drv
));
1625 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1626 goto transfer_error
;
1630 /* VERIFY commands */
1635 uint8_t tmpbuf
[FD_SECTOR_LEN
];
1637 DMA_read_memory (nchan
, tmpbuf
, fdctrl
->data_pos
, len
);
1638 ret
= memcmp(tmpbuf
, fdctrl
->fifo
+ rel_pos
, len
);
1640 status2
= FD_SR2_SEH
;
1643 if ((ret
< 0 && fdctrl
->data_dir
== FD_DIR_SCANL
) ||
1644 (ret
> 0 && fdctrl
->data_dir
== FD_DIR_SCANH
)) {
1651 fdctrl
->data_pos
+= len
;
1652 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1654 /* Seek to next sector */
1655 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
))
1660 len
= fdctrl
->data_pos
- start_pos
;
1661 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1662 fdctrl
->data_pos
, len
, fdctrl
->data_len
);
1663 if (fdctrl
->data_dir
== FD_DIR_SCANE
||
1664 fdctrl
->data_dir
== FD_DIR_SCANL
||
1665 fdctrl
->data_dir
== FD_DIR_SCANH
)
1666 status2
= FD_SR2_SEH
;
1667 fdctrl
->data_len
-= len
;
1668 fdctrl_stop_transfer(fdctrl
, status0
, status1
, status2
);
1674 /* Data register : 0x05 */
1675 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
)
1678 uint32_t retval
= 0;
1681 cur_drv
= get_cur_drv(fdctrl
);
1682 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1683 if (!(fdctrl
->msr
& FD_MSR_RQM
) || !(fdctrl
->msr
& FD_MSR_DIO
)) {
1684 FLOPPY_DPRINTF("error: controller not ready for reading\n");
1688 /* If data_len spans multiple sectors, the current position in the FIFO
1689 * wraps around while fdctrl->data_pos is the real position in the whole
1691 pos
= fdctrl
->data_pos
;
1692 pos
%= FD_SECTOR_LEN
;
1694 switch (fdctrl
->phase
) {
1695 case FD_PHASE_EXECUTION
:
1696 assert(fdctrl
->msr
& FD_MSR_NONDMA
);
1698 if (fdctrl
->data_pos
!= 0)
1699 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1700 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1701 fd_sector(cur_drv
));
1704 if (blk_read(cur_drv
->blk
, fd_sector(cur_drv
), fdctrl
->fifo
, 1)
1706 FLOPPY_DPRINTF("error getting sector %d\n",
1707 fd_sector(cur_drv
));
1708 /* Sure, image size is too small... */
1709 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1713 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1714 fdctrl
->msr
&= ~FD_MSR_RQM
;
1715 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1719 case FD_PHASE_RESULT
:
1720 assert(!(fdctrl
->msr
& FD_MSR_NONDMA
));
1721 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1722 fdctrl
->msr
&= ~FD_MSR_RQM
;
1723 fdctrl_to_command_phase(fdctrl
);
1724 fdctrl_reset_irq(fdctrl
);
1728 case FD_PHASE_COMMAND
:
1733 retval
= fdctrl
->fifo
[pos
];
1734 FLOPPY_DPRINTF("data register: 0x%02x\n", retval
);
1739 static void fdctrl_format_sector(FDCtrl
*fdctrl
)
1744 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1745 cur_drv
= get_cur_drv(fdctrl
);
1746 kt
= fdctrl
->fifo
[6];
1747 kh
= fdctrl
->fifo
[7];
1748 ks
= fdctrl
->fifo
[8];
1749 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1750 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1751 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1752 NUM_SIDES(cur_drv
)));
1753 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1756 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1757 fdctrl
->fifo
[3] = kt
;
1758 fdctrl
->fifo
[4] = kh
;
1759 fdctrl
->fifo
[5] = ks
;
1763 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1764 fdctrl
->fifo
[3] = kt
;
1765 fdctrl
->fifo
[4] = kh
;
1766 fdctrl
->fifo
[5] = ks
;
1769 /* No seek enabled */
1770 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1771 fdctrl
->fifo
[3] = kt
;
1772 fdctrl
->fifo
[4] = kh
;
1773 fdctrl
->fifo
[5] = ks
;
1776 fdctrl
->status0
|= FD_SR0_SEEK
;
1781 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1782 if (cur_drv
->blk
== NULL
||
1783 blk_write(cur_drv
->blk
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1784 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv
));
1785 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1787 if (cur_drv
->sect
== cur_drv
->last_sect
) {
1788 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1789 /* Last sector done */
1790 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1793 fdctrl
->data_pos
= 0;
1794 fdctrl
->data_len
= 4;
1799 static void fdctrl_handle_lock(FDCtrl
*fdctrl
, int direction
)
1801 fdctrl
->lock
= (fdctrl
->fifo
[0] & 0x80) ? 1 : 0;
1802 fdctrl
->fifo
[0] = fdctrl
->lock
<< 4;
1803 fdctrl_to_result_phase(fdctrl
, 1);
1806 static void fdctrl_handle_dumpreg(FDCtrl
*fdctrl
, int direction
)
1808 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1810 /* Drives position */
1811 fdctrl
->fifo
[0] = drv0(fdctrl
)->track
;
1812 fdctrl
->fifo
[1] = drv1(fdctrl
)->track
;
1814 fdctrl
->fifo
[2] = drv2(fdctrl
)->track
;
1815 fdctrl
->fifo
[3] = drv3(fdctrl
)->track
;
1817 fdctrl
->fifo
[2] = 0;
1818 fdctrl
->fifo
[3] = 0;
1821 fdctrl
->fifo
[4] = fdctrl
->timer0
;
1822 fdctrl
->fifo
[5] = (fdctrl
->timer1
<< 1) | (fdctrl
->dor
& FD_DOR_DMAEN
? 1 : 0);
1823 fdctrl
->fifo
[6] = cur_drv
->last_sect
;
1824 fdctrl
->fifo
[7] = (fdctrl
->lock
<< 7) |
1825 (cur_drv
->perpendicular
<< 2);
1826 fdctrl
->fifo
[8] = fdctrl
->config
;
1827 fdctrl
->fifo
[9] = fdctrl
->precomp_trk
;
1828 fdctrl_to_result_phase(fdctrl
, 10);
1831 static void fdctrl_handle_version(FDCtrl
*fdctrl
, int direction
)
1833 /* Controller's version */
1834 fdctrl
->fifo
[0] = fdctrl
->version
;
1835 fdctrl_to_result_phase(fdctrl
, 1);
1838 static void fdctrl_handle_partid(FDCtrl
*fdctrl
, int direction
)
1840 fdctrl
->fifo
[0] = 0x41; /* Stepping 1 */
1841 fdctrl_to_result_phase(fdctrl
, 1);
1844 static void fdctrl_handle_restore(FDCtrl
*fdctrl
, int direction
)
1846 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1848 /* Drives position */
1849 drv0(fdctrl
)->track
= fdctrl
->fifo
[3];
1850 drv1(fdctrl
)->track
= fdctrl
->fifo
[4];
1852 drv2(fdctrl
)->track
= fdctrl
->fifo
[5];
1853 drv3(fdctrl
)->track
= fdctrl
->fifo
[6];
1856 fdctrl
->timer0
= fdctrl
->fifo
[7];
1857 fdctrl
->timer1
= fdctrl
->fifo
[8];
1858 cur_drv
->last_sect
= fdctrl
->fifo
[9];
1859 fdctrl
->lock
= fdctrl
->fifo
[10] >> 7;
1860 cur_drv
->perpendicular
= (fdctrl
->fifo
[10] >> 2) & 0xF;
1861 fdctrl
->config
= fdctrl
->fifo
[11];
1862 fdctrl
->precomp_trk
= fdctrl
->fifo
[12];
1863 fdctrl
->pwrd
= fdctrl
->fifo
[13];
1864 fdctrl_to_command_phase(fdctrl
);
1867 static void fdctrl_handle_save(FDCtrl
*fdctrl
, int direction
)
1869 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1871 fdctrl
->fifo
[0] = 0;
1872 fdctrl
->fifo
[1] = 0;
1873 /* Drives position */
1874 fdctrl
->fifo
[2] = drv0(fdctrl
)->track
;
1875 fdctrl
->fifo
[3] = drv1(fdctrl
)->track
;
1877 fdctrl
->fifo
[4] = drv2(fdctrl
)->track
;
1878 fdctrl
->fifo
[5] = drv3(fdctrl
)->track
;
1880 fdctrl
->fifo
[4] = 0;
1881 fdctrl
->fifo
[5] = 0;
1884 fdctrl
->fifo
[6] = fdctrl
->timer0
;
1885 fdctrl
->fifo
[7] = fdctrl
->timer1
;
1886 fdctrl
->fifo
[8] = cur_drv
->last_sect
;
1887 fdctrl
->fifo
[9] = (fdctrl
->lock
<< 7) |
1888 (cur_drv
->perpendicular
<< 2);
1889 fdctrl
->fifo
[10] = fdctrl
->config
;
1890 fdctrl
->fifo
[11] = fdctrl
->precomp_trk
;
1891 fdctrl
->fifo
[12] = fdctrl
->pwrd
;
1892 fdctrl
->fifo
[13] = 0;
1893 fdctrl
->fifo
[14] = 0;
1894 fdctrl_to_result_phase(fdctrl
, 15);
1897 static void fdctrl_handle_readid(FDCtrl
*fdctrl
, int direction
)
1899 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1901 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1902 timer_mod(fdctrl
->result_timer
,
1903 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) + (get_ticks_per_sec() / 50));
1906 static void fdctrl_handle_format_track(FDCtrl
*fdctrl
, int direction
)
1910 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1911 cur_drv
= get_cur_drv(fdctrl
);
1912 fdctrl
->data_state
|= FD_STATE_FORMAT
;
1913 if (fdctrl
->fifo
[0] & 0x80)
1914 fdctrl
->data_state
|= FD_STATE_MULTI
;
1916 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1918 fdctrl
->fifo
[2] > 7 ? 16384 : 128 << fdctrl
->fifo
[2];
1920 cur_drv
->last_sect
=
1921 cur_drv
->flags
& FDISK_DBL_SIDES
? fdctrl
->fifo
[3] :
1922 fdctrl
->fifo
[3] / 2;
1924 cur_drv
->last_sect
= fdctrl
->fifo
[3];
1926 /* TODO: implement format using DMA expected by the Bochs BIOS
1927 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1928 * the sector with the specified fill byte
1930 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1931 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1934 static void fdctrl_handle_specify(FDCtrl
*fdctrl
, int direction
)
1936 fdctrl
->timer0
= (fdctrl
->fifo
[1] >> 4) & 0xF;
1937 fdctrl
->timer1
= fdctrl
->fifo
[2] >> 1;
1938 if (fdctrl
->fifo
[2] & 1)
1939 fdctrl
->dor
&= ~FD_DOR_DMAEN
;
1941 fdctrl
->dor
|= FD_DOR_DMAEN
;
1942 /* No result back */
1943 fdctrl_to_command_phase(fdctrl
);
1946 static void fdctrl_handle_sense_drive_status(FDCtrl
*fdctrl
, int direction
)
1950 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1951 cur_drv
= get_cur_drv(fdctrl
);
1952 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1953 /* 1 Byte status back */
1954 fdctrl
->fifo
[0] = (cur_drv
->ro
<< 6) |
1955 (cur_drv
->track
== 0 ? 0x10 : 0x00) |
1956 (cur_drv
->head
<< 2) |
1957 GET_CUR_DRV(fdctrl
) |
1959 fdctrl_to_result_phase(fdctrl
, 1);
1962 static void fdctrl_handle_recalibrate(FDCtrl
*fdctrl
, int direction
)
1966 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1967 cur_drv
= get_cur_drv(fdctrl
);
1968 fd_recalibrate(cur_drv
);
1969 fdctrl_to_command_phase(fdctrl
);
1970 /* Raise Interrupt */
1971 fdctrl
->status0
|= FD_SR0_SEEK
;
1972 fdctrl_raise_irq(fdctrl
);
1975 static void fdctrl_handle_sense_interrupt_status(FDCtrl
*fdctrl
, int direction
)
1977 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1979 if (fdctrl
->reset_sensei
> 0) {
1981 FD_SR0_RDYCHG
+ FD_RESET_SENSEI_COUNT
- fdctrl
->reset_sensei
;
1982 fdctrl
->reset_sensei
--;
1983 } else if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
1984 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
1985 fdctrl_to_result_phase(fdctrl
, 1);
1989 (fdctrl
->status0
& ~(FD_SR0_HEAD
| FD_SR0_DS1
| FD_SR0_DS0
))
1990 | GET_CUR_DRV(fdctrl
);
1993 fdctrl
->fifo
[1] = cur_drv
->track
;
1994 fdctrl_to_result_phase(fdctrl
, 2);
1995 fdctrl_reset_irq(fdctrl
);
1996 fdctrl
->status0
= FD_SR0_RDYCHG
;
1999 static void fdctrl_handle_seek(FDCtrl
*fdctrl
, int direction
)
2003 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2004 cur_drv
= get_cur_drv(fdctrl
);
2005 fdctrl_to_command_phase(fdctrl
);
2006 /* The seek command just sends step pulses to the drive and doesn't care if
2007 * there is a medium inserted of if it's banging the head against the drive.
2009 fd_seek(cur_drv
, cur_drv
->head
, fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2010 /* Raise Interrupt */
2011 fdctrl
->status0
|= FD_SR0_SEEK
;
2012 fdctrl_raise_irq(fdctrl
);
2015 static void fdctrl_handle_perpendicular_mode(FDCtrl
*fdctrl
, int direction
)
2017 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2019 if (fdctrl
->fifo
[1] & 0x80)
2020 cur_drv
->perpendicular
= fdctrl
->fifo
[1] & 0x7;
2021 /* No result back */
2022 fdctrl_to_command_phase(fdctrl
);
2025 static void fdctrl_handle_configure(FDCtrl
*fdctrl
, int direction
)
2027 fdctrl
->config
= fdctrl
->fifo
[2];
2028 fdctrl
->precomp_trk
= fdctrl
->fifo
[3];
2029 /* No result back */
2030 fdctrl_to_command_phase(fdctrl
);
2033 static void fdctrl_handle_powerdown_mode(FDCtrl
*fdctrl
, int direction
)
2035 fdctrl
->pwrd
= fdctrl
->fifo
[1];
2036 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
2037 fdctrl_to_result_phase(fdctrl
, 1);
2040 static void fdctrl_handle_option(FDCtrl
*fdctrl
, int direction
)
2042 /* No result back */
2043 fdctrl_to_command_phase(fdctrl
);
2046 static void fdctrl_handle_drive_specification_command(FDCtrl
*fdctrl
, int direction
)
2048 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2051 pos
= fdctrl
->data_pos
- 1;
2052 pos
%= FD_SECTOR_LEN
;
2053 if (fdctrl
->fifo
[pos
] & 0x80) {
2054 /* Command parameters done */
2055 if (fdctrl
->fifo
[pos
] & 0x40) {
2056 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
2057 fdctrl
->fifo
[2] = 0;
2058 fdctrl
->fifo
[3] = 0;
2059 fdctrl_to_result_phase(fdctrl
, 4);
2061 fdctrl_to_command_phase(fdctrl
);
2063 } else if (fdctrl
->data_len
> 7) {
2065 fdctrl
->fifo
[0] = 0x80 |
2066 (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
2067 fdctrl_to_result_phase(fdctrl
, 1);
2071 static void fdctrl_handle_relative_seek_in(FDCtrl
*fdctrl
, int direction
)
2075 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2076 cur_drv
= get_cur_drv(fdctrl
);
2077 if (fdctrl
->fifo
[2] + cur_drv
->track
>= cur_drv
->max_track
) {
2078 fd_seek(cur_drv
, cur_drv
->head
, cur_drv
->max_track
- 1,
2081 fd_seek(cur_drv
, cur_drv
->head
,
2082 cur_drv
->track
+ fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2084 fdctrl_to_command_phase(fdctrl
);
2085 /* Raise Interrupt */
2086 fdctrl
->status0
|= FD_SR0_SEEK
;
2087 fdctrl_raise_irq(fdctrl
);
2090 static void fdctrl_handle_relative_seek_out(FDCtrl
*fdctrl
, int direction
)
2094 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2095 cur_drv
= get_cur_drv(fdctrl
);
2096 if (fdctrl
->fifo
[2] > cur_drv
->track
) {
2097 fd_seek(cur_drv
, cur_drv
->head
, 0, cur_drv
->sect
, 1);
2099 fd_seek(cur_drv
, cur_drv
->head
,
2100 cur_drv
->track
- fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2102 fdctrl_to_command_phase(fdctrl
);
2103 /* Raise Interrupt */
2104 fdctrl
->status0
|= FD_SR0_SEEK
;
2105 fdctrl_raise_irq(fdctrl
);
2109 * Handlers for the execution phase of each command
2111 typedef struct FDCtrlCommand
{
2116 void (*handler
)(FDCtrl
*fdctrl
, int direction
);
2120 static const FDCtrlCommand handlers
[] = {
2121 { FD_CMD_READ
, 0x1f, "READ", 8, fdctrl_start_transfer
, FD_DIR_READ
},
2122 { FD_CMD_WRITE
, 0x3f, "WRITE", 8, fdctrl_start_transfer
, FD_DIR_WRITE
},
2123 { FD_CMD_SEEK
, 0xff, "SEEK", 2, fdctrl_handle_seek
},
2124 { FD_CMD_SENSE_INTERRUPT_STATUS
, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status
},
2125 { FD_CMD_RECALIBRATE
, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate
},
2126 { FD_CMD_FORMAT_TRACK
, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track
},
2127 { FD_CMD_READ_TRACK
, 0xbf, "READ TRACK", 8, fdctrl_start_transfer
, FD_DIR_READ
},
2128 { FD_CMD_RESTORE
, 0xff, "RESTORE", 17, fdctrl_handle_restore
}, /* part of READ DELETED DATA */
2129 { FD_CMD_SAVE
, 0xff, "SAVE", 0, fdctrl_handle_save
}, /* part of READ DELETED DATA */
2130 { FD_CMD_READ_DELETED
, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_READ
},
2131 { FD_CMD_SCAN_EQUAL
, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANE
},
2132 { FD_CMD_VERIFY
, 0x1f, "VERIFY", 8, fdctrl_start_transfer
, FD_DIR_VERIFY
},
2133 { FD_CMD_SCAN_LOW_OR_EQUAL
, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANL
},
2134 { FD_CMD_SCAN_HIGH_OR_EQUAL
, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANH
},
2135 { FD_CMD_WRITE_DELETED
, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_WRITE
},
2136 { FD_CMD_READ_ID
, 0xbf, "READ ID", 1, fdctrl_handle_readid
},
2137 { FD_CMD_SPECIFY
, 0xff, "SPECIFY", 2, fdctrl_handle_specify
},
2138 { FD_CMD_SENSE_DRIVE_STATUS
, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status
},
2139 { FD_CMD_PERPENDICULAR_MODE
, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode
},
2140 { FD_CMD_CONFIGURE
, 0xff, "CONFIGURE", 3, fdctrl_handle_configure
},
2141 { FD_CMD_POWERDOWN_MODE
, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode
},
2142 { FD_CMD_OPTION
, 0xff, "OPTION", 1, fdctrl_handle_option
},
2143 { FD_CMD_DRIVE_SPECIFICATION_COMMAND
, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command
},
2144 { FD_CMD_RELATIVE_SEEK_OUT
, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out
},
2145 { FD_CMD_FORMAT_AND_WRITE
, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented
},
2146 { FD_CMD_RELATIVE_SEEK_IN
, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in
},
2147 { FD_CMD_LOCK
, 0x7f, "LOCK", 0, fdctrl_handle_lock
},
2148 { FD_CMD_DUMPREG
, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg
},
2149 { FD_CMD_VERSION
, 0xff, "VERSION", 0, fdctrl_handle_version
},
2150 { FD_CMD_PART_ID
, 0xff, "PART ID", 0, fdctrl_handle_partid
},
2151 { FD_CMD_WRITE
, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer
, FD_DIR_WRITE
}, /* not in specification ; BeOS 4.5 bug */
2152 { 0, 0, "unknown", 0, fdctrl_unimplemented
}, /* default handler */
2154 /* Associate command to an index in the 'handlers' array */
2155 static uint8_t command_to_handler
[256];
2157 static const FDCtrlCommand
*get_command(uint8_t cmd
)
2161 idx
= command_to_handler
[cmd
];
2162 FLOPPY_DPRINTF("%s command\n", handlers
[idx
].name
);
2163 return &handlers
[idx
];
2166 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
)
2169 const FDCtrlCommand
*cmd
;
2173 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
2174 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2177 if (!(fdctrl
->msr
& FD_MSR_RQM
) || (fdctrl
->msr
& FD_MSR_DIO
)) {
2178 FLOPPY_DPRINTF("error: controller not ready for writing\n");
2181 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
2183 FLOPPY_DPRINTF("%s: %02x\n", __func__
, value
);
2185 /* If data_len spans multiple sectors, the current position in the FIFO
2186 * wraps around while fdctrl->data_pos is the real position in the whole
2188 pos
= fdctrl
->data_pos
++;
2189 pos
%= FD_SECTOR_LEN
;
2190 fdctrl
->fifo
[pos
] = value
;
2192 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2193 fdctrl
->msr
&= ~FD_MSR_RQM
;
2196 switch (fdctrl
->phase
) {
2197 case FD_PHASE_EXECUTION
:
2198 /* For DMA requests, RQM should be cleared during execution phase, so
2199 * we would have errored out above. */
2200 assert(fdctrl
->msr
& FD_MSR_NONDMA
);
2202 /* FIFO data write */
2203 if (pos
== FD_SECTOR_LEN
- 1 ||
2204 fdctrl
->data_pos
== fdctrl
->data_len
) {
2205 cur_drv
= get_cur_drv(fdctrl
);
2206 if (blk_write(cur_drv
->blk
, fd_sector(cur_drv
), fdctrl
->fifo
, 1)
2208 FLOPPY_DPRINTF("error writing sector %d\n",
2209 fd_sector(cur_drv
));
2212 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
2213 FLOPPY_DPRINTF("error seeking to next sector %d\n",
2214 fd_sector(cur_drv
));
2219 /* Switch to result phase when done with the transfer */
2220 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2221 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
2225 case FD_PHASE_COMMAND
:
2226 assert(!(fdctrl
->msr
& FD_MSR_NONDMA
));
2227 assert(fdctrl
->data_pos
< FD_SECTOR_LEN
);
2230 /* The first byte specifies the command. Now we start reading
2231 * as many parameters as this command requires. */
2232 cmd
= get_command(value
);
2233 fdctrl
->data_len
= cmd
->parameters
+ 1;
2234 if (cmd
->parameters
) {
2235 fdctrl
->msr
|= FD_MSR_RQM
;
2237 fdctrl
->msr
|= FD_MSR_CMDBUSY
;
2240 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2241 /* We have all parameters now, execute the command */
2242 fdctrl
->phase
= FD_PHASE_EXECUTION
;
2244 if (fdctrl
->data_state
& FD_STATE_FORMAT
) {
2245 fdctrl_format_sector(fdctrl
);
2249 cmd
= get_command(fdctrl
->fifo
[0]);
2250 FLOPPY_DPRINTF("Calling handler for '%s'\n", cmd
->name
);
2251 cmd
->handler(fdctrl
, cmd
->direction
);
2255 case FD_PHASE_RESULT
:
2261 static void fdctrl_result_timer(void *opaque
)
2263 FDCtrl
*fdctrl
= opaque
;
2264 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2266 /* Pretend we are spinning.
2267 * This is needed for Coherent, which uses READ ID to check for
2268 * sector interleaving.
2270 if (cur_drv
->last_sect
!= 0) {
2271 cur_drv
->sect
= (cur_drv
->sect
% cur_drv
->last_sect
) + 1;
2273 /* READ_ID can't automatically succeed! */
2274 if (fdctrl
->check_media_rate
&&
2275 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
2276 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2277 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
2278 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
2280 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
2284 static void fdctrl_change_cb(void *opaque
, bool load
)
2286 FDrive
*drive
= opaque
;
2288 drive
->media_inserted
= load
&& drive
->blk
&& blk_is_inserted(drive
->blk
);
2290 drive
->media_changed
= 1;
2291 drive
->media_validated
= false;
2292 fd_revalidate(drive
);
2295 static bool fdctrl_is_tray_open(void *opaque
)
2297 FDrive
*drive
= opaque
;
2298 return !drive
->media_inserted
;
2301 static const BlockDevOps fdctrl_block_ops
= {
2302 .change_media_cb
= fdctrl_change_cb
,
2303 .is_tray_open
= fdctrl_is_tray_open
,
2306 /* Init functions */
2307 static void fdctrl_connect_drives(FDCtrl
*fdctrl
, Error
**errp
)
2312 for (i
= 0; i
< MAX_FD
; i
++) {
2313 drive
= &fdctrl
->drives
[i
];
2314 drive
->fdctrl
= fdctrl
;
2317 if (blk_get_on_error(drive
->blk
, 0) != BLOCKDEV_ON_ERROR_ENOSPC
) {
2318 error_setg(errp
, "fdc doesn't support drive option werror");
2321 if (blk_get_on_error(drive
->blk
, 1) != BLOCKDEV_ON_ERROR_REPORT
) {
2322 error_setg(errp
, "fdc doesn't support drive option rerror");
2329 blk_set_dev_ops(drive
->blk
, &fdctrl_block_ops
, drive
);
2330 drive
->media_inserted
= blk_is_inserted(drive
->blk
);
2331 pick_drive_type(drive
);
2333 fd_revalidate(drive
);
2337 ISADevice
*fdctrl_init_isa(ISABus
*bus
, DriveInfo
**fds
)
2342 isadev
= isa_try_create(bus
, TYPE_ISA_FDC
);
2346 dev
= DEVICE(isadev
);
2349 qdev_prop_set_drive(dev
, "driveA", blk_by_legacy_dinfo(fds
[0]),
2353 qdev_prop_set_drive(dev
, "driveB", blk_by_legacy_dinfo(fds
[1]),
2356 qdev_init_nofail(dev
);
2361 void fdctrl_init_sysbus(qemu_irq irq
, int dma_chann
,
2362 hwaddr mmio_base
, DriveInfo
**fds
)
2369 dev
= qdev_create(NULL
, "sysbus-fdc");
2370 sys
= SYSBUS_FDC(dev
);
2371 fdctrl
= &sys
->state
;
2372 fdctrl
->dma_chann
= dma_chann
; /* FIXME */
2374 qdev_prop_set_drive(dev
, "driveA", blk_by_legacy_dinfo(fds
[0]),
2378 qdev_prop_set_drive(dev
, "driveB", blk_by_legacy_dinfo(fds
[1]),
2381 qdev_init_nofail(dev
);
2382 sbd
= SYS_BUS_DEVICE(dev
);
2383 sysbus_connect_irq(sbd
, 0, irq
);
2384 sysbus_mmio_map(sbd
, 0, mmio_base
);
2387 void sun4m_fdctrl_init(qemu_irq irq
, hwaddr io_base
,
2388 DriveInfo
**fds
, qemu_irq
*fdc_tc
)
2393 dev
= qdev_create(NULL
, "SUNW,fdtwo");
2395 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(fds
[0]),
2398 qdev_init_nofail(dev
);
2399 sys
= SYSBUS_FDC(dev
);
2400 sysbus_connect_irq(SYS_BUS_DEVICE(sys
), 0, irq
);
2401 sysbus_mmio_map(SYS_BUS_DEVICE(sys
), 0, io_base
);
2402 *fdc_tc
= qdev_get_gpio_in(dev
, 0);
2405 static void fdctrl_realize_common(FDCtrl
*fdctrl
, Error
**errp
)
2408 static int command_tables_inited
= 0;
2410 if (fdctrl
->fallback
== FLOPPY_DRIVE_TYPE_AUTO
) {
2411 error_setg(errp
, "Cannot choose a fallback FDrive type of 'auto'");
2414 /* Fill 'command_to_handler' lookup table */
2415 if (!command_tables_inited
) {
2416 command_tables_inited
= 1;
2417 for (i
= ARRAY_SIZE(handlers
) - 1; i
>= 0; i
--) {
2418 for (j
= 0; j
< sizeof(command_to_handler
); j
++) {
2419 if ((j
& handlers
[i
].mask
) == handlers
[i
].value
) {
2420 command_to_handler
[j
] = i
;
2426 FLOPPY_DPRINTF("init controller\n");
2427 fdctrl
->fifo
= qemu_memalign(512, FD_SECTOR_LEN
);
2428 fdctrl
->fifo_size
= 512;
2429 fdctrl
->result_timer
= timer_new_ns(QEMU_CLOCK_VIRTUAL
,
2430 fdctrl_result_timer
, fdctrl
);
2432 fdctrl
->version
= 0x90; /* Intel 82078 controller */
2433 fdctrl
->config
= FD_CONFIG_EIS
| FD_CONFIG_EFIFO
; /* Implicit seek, polling & FIFO enabled */
2434 fdctrl
->num_floppies
= MAX_FD
;
2436 if (fdctrl
->dma_chann
!= -1) {
2437 DMA_register_channel(fdctrl
->dma_chann
, &fdctrl_transfer_handler
, fdctrl
);
2439 fdctrl_connect_drives(fdctrl
, errp
);
2442 static const MemoryRegionPortio fdc_portio_list
[] = {
2443 { 1, 5, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2444 { 7, 1, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2445 PORTIO_END_OF_LIST(),
2448 static void isabus_fdc_realize(DeviceState
*dev
, Error
**errp
)
2450 ISADevice
*isadev
= ISA_DEVICE(dev
);
2451 FDCtrlISABus
*isa
= ISA_FDC(dev
);
2452 FDCtrl
*fdctrl
= &isa
->state
;
2455 isa_register_portio_list(isadev
, isa
->iobase
, fdc_portio_list
, fdctrl
,
2458 isa_init_irq(isadev
, &fdctrl
->irq
, isa
->irq
);
2459 fdctrl
->dma_chann
= isa
->dma
;
2461 qdev_set_legacy_instance_id(dev
, isa
->iobase
, 2);
2462 fdctrl_realize_common(fdctrl
, &err
);
2464 error_propagate(errp
, err
);
2469 static void sysbus_fdc_initfn(Object
*obj
)
2471 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
2472 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2473 FDCtrl
*fdctrl
= &sys
->state
;
2475 fdctrl
->dma_chann
= -1;
2477 memory_region_init_io(&fdctrl
->iomem
, obj
, &fdctrl_mem_ops
, fdctrl
,
2479 sysbus_init_mmio(sbd
, &fdctrl
->iomem
);
2482 static void sun4m_fdc_initfn(Object
*obj
)
2484 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
2485 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2486 FDCtrl
*fdctrl
= &sys
->state
;
2488 memory_region_init_io(&fdctrl
->iomem
, obj
, &fdctrl_mem_strict_ops
,
2489 fdctrl
, "fdctrl", 0x08);
2490 sysbus_init_mmio(sbd
, &fdctrl
->iomem
);
2493 static void sysbus_fdc_common_initfn(Object
*obj
)
2495 DeviceState
*dev
= DEVICE(obj
);
2496 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
2497 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2498 FDCtrl
*fdctrl
= &sys
->state
;
2500 qdev_set_legacy_instance_id(dev
, 0 /* io */, 2); /* FIXME */
2502 sysbus_init_irq(sbd
, &fdctrl
->irq
);
2503 qdev_init_gpio_in(dev
, fdctrl_handle_tc
, 1);
2506 static void sysbus_fdc_common_realize(DeviceState
*dev
, Error
**errp
)
2508 FDCtrlSysBus
*sys
= SYSBUS_FDC(dev
);
2509 FDCtrl
*fdctrl
= &sys
->state
;
2511 fdctrl_realize_common(fdctrl
, errp
);
2514 FloppyDriveType
isa_fdc_get_drive_type(ISADevice
*fdc
, int i
)
2516 FDCtrlISABus
*isa
= ISA_FDC(fdc
);
2518 return isa
->state
.drives
[i
].drive
;
2521 static const VMStateDescription vmstate_isa_fdc
={
2524 .minimum_version_id
= 2,
2525 .fields
= (VMStateField
[]) {
2526 VMSTATE_STRUCT(state
, FDCtrlISABus
, 0, vmstate_fdc
, FDCtrl
),
2527 VMSTATE_END_OF_LIST()
2531 static Property isa_fdc_properties
[] = {
2532 DEFINE_PROP_UINT32("iobase", FDCtrlISABus
, iobase
, 0x3f0),
2533 DEFINE_PROP_UINT32("irq", FDCtrlISABus
, irq
, 6),
2534 DEFINE_PROP_UINT32("dma", FDCtrlISABus
, dma
, 2),
2535 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus
, state
.drives
[0].blk
),
2536 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus
, state
.drives
[1].blk
),
2537 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus
, state
.check_media_rate
,
2539 DEFINE_PROP_DEFAULT("fdtypeA", FDCtrlISABus
, state
.drives
[0].drive
,
2540 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2542 DEFINE_PROP_DEFAULT("fdtypeB", FDCtrlISABus
, state
.drives
[1].drive
,
2543 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2545 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2546 FLOPPY_DRIVE_TYPE_144
, qdev_prop_fdc_drive_type
,
2548 DEFINE_PROP_END_OF_LIST(),
2551 static void isabus_fdc_class_init(ObjectClass
*klass
, void *data
)
2553 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2555 dc
->realize
= isabus_fdc_realize
;
2556 dc
->fw_name
= "fdc";
2557 dc
->reset
= fdctrl_external_reset_isa
;
2558 dc
->vmsd
= &vmstate_isa_fdc
;
2559 dc
->props
= isa_fdc_properties
;
2560 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2563 static void isabus_fdc_instance_init(Object
*obj
)
2565 FDCtrlISABus
*isa
= ISA_FDC(obj
);
2567 device_add_bootindex_property(obj
, &isa
->bootindexA
,
2568 "bootindexA", "/floppy@0",
2570 device_add_bootindex_property(obj
, &isa
->bootindexB
,
2571 "bootindexB", "/floppy@1",
2575 static const TypeInfo isa_fdc_info
= {
2576 .name
= TYPE_ISA_FDC
,
2577 .parent
= TYPE_ISA_DEVICE
,
2578 .instance_size
= sizeof(FDCtrlISABus
),
2579 .class_init
= isabus_fdc_class_init
,
2580 .instance_init
= isabus_fdc_instance_init
,
2583 static const VMStateDescription vmstate_sysbus_fdc
={
2586 .minimum_version_id
= 2,
2587 .fields
= (VMStateField
[]) {
2588 VMSTATE_STRUCT(state
, FDCtrlSysBus
, 0, vmstate_fdc
, FDCtrl
),
2589 VMSTATE_END_OF_LIST()
2593 static Property sysbus_fdc_properties
[] = {
2594 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus
, state
.drives
[0].blk
),
2595 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus
, state
.drives
[1].blk
),
2596 DEFINE_PROP_DEFAULT("fdtypeA", FDCtrlSysBus
, state
.drives
[0].drive
,
2597 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2599 DEFINE_PROP_DEFAULT("fdtypeB", FDCtrlSysBus
, state
.drives
[1].drive
,
2600 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2602 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2603 FLOPPY_DRIVE_TYPE_144
, qdev_prop_fdc_drive_type
,
2605 DEFINE_PROP_END_OF_LIST(),
2608 static void sysbus_fdc_class_init(ObjectClass
*klass
, void *data
)
2610 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2612 dc
->props
= sysbus_fdc_properties
;
2613 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2616 static const TypeInfo sysbus_fdc_info
= {
2617 .name
= "sysbus-fdc",
2618 .parent
= TYPE_SYSBUS_FDC
,
2619 .instance_init
= sysbus_fdc_initfn
,
2620 .class_init
= sysbus_fdc_class_init
,
2623 static Property sun4m_fdc_properties
[] = {
2624 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus
, state
.drives
[0].blk
),
2625 DEFINE_PROP_DEFAULT("fdtype", FDCtrlSysBus
, state
.drives
[0].drive
,
2626 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2628 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2629 FLOPPY_DRIVE_TYPE_144
, qdev_prop_fdc_drive_type
,
2631 DEFINE_PROP_END_OF_LIST(),
2634 static void sun4m_fdc_class_init(ObjectClass
*klass
, void *data
)
2636 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2638 dc
->props
= sun4m_fdc_properties
;
2639 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2642 static const TypeInfo sun4m_fdc_info
= {
2643 .name
= "SUNW,fdtwo",
2644 .parent
= TYPE_SYSBUS_FDC
,
2645 .instance_init
= sun4m_fdc_initfn
,
2646 .class_init
= sun4m_fdc_class_init
,
2649 static void sysbus_fdc_common_class_init(ObjectClass
*klass
, void *data
)
2651 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2653 dc
->realize
= sysbus_fdc_common_realize
;
2654 dc
->reset
= fdctrl_external_reset_sysbus
;
2655 dc
->vmsd
= &vmstate_sysbus_fdc
;
2658 static const TypeInfo sysbus_fdc_type_info
= {
2659 .name
= TYPE_SYSBUS_FDC
,
2660 .parent
= TYPE_SYS_BUS_DEVICE
,
2661 .instance_size
= sizeof(FDCtrlSysBus
),
2662 .instance_init
= sysbus_fdc_common_initfn
,
2664 .class_init
= sysbus_fdc_common_class_init
,
2667 static void fdc_register_types(void)
2669 type_register_static(&isa_fdc_info
);
2670 type_register_static(&sysbus_fdc_type_info
);
2671 type_register_static(&sysbus_fdc_info
);
2672 type_register_static(&sun4m_fdc_info
);
2675 type_init(fdc_register_types
)