2 * QEMU RISC-V Host Target Interface (HTIF) Emulation
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
7 * This provides HTIF device emulation for QEMU. At the moment this allows
8 * for identical copies of bbl/linux to run on both spike and QEMU.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2 or later, as published by the Free Software Foundation.
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #include "qemu/osdep.h"
24 #include "qapi/error.h"
26 #include "hw/char/riscv_htif.h"
27 #include "hw/char/serial.h"
28 #include "chardev/char.h"
29 #include "chardev/char-fe.h"
30 #include "qemu/timer.h"
31 #include "qemu/error-report.h"
33 #define RISCV_DEBUG_HTIF 0
34 #define HTIF_DEBUG(fmt, ...) \
36 if (RISCV_DEBUG_HTIF) { \
37 qemu_log_mask(LOG_TRACE, "%s: " fmt "\n", __func__, ##__VA_ARGS__);\
41 #define HTIF_DEV_SHIFT 56
42 #define HTIF_CMD_SHIFT 48
44 #define HTIF_DEV_SYSTEM 0
45 #define HTIF_DEV_CONSOLE 1
47 #define HTIF_SYSTEM_CMD_SYSCALL 0
48 #define HTIF_CONSOLE_CMD_GETC 0
49 #define HTIF_CONSOLE_CMD_PUTC 1
51 /* PK system call number */
52 #define PK_SYS_WRITE 64
54 static uint64_t fromhost_addr
, tohost_addr
;
55 static int address_symbol_set
;
57 void htif_symbol_callback(const char *st_name
, int st_info
, uint64_t st_value
,
60 if (strcmp("fromhost", st_name
) == 0) {
61 address_symbol_set
|= 1;
62 fromhost_addr
= st_value
;
64 error_report("HTIF fromhost must be 8 bytes");
67 } else if (strcmp("tohost", st_name
) == 0) {
68 address_symbol_set
|= 2;
69 tohost_addr
= st_value
;
71 error_report("HTIF tohost must be 8 bytes");
78 * Called by the char dev to see if HTIF is ready to accept input.
80 static int htif_can_recv(void *opaque
)
86 * Called by the char dev to supply input to HTIF console.
87 * We assume that we will receive one character at a time.
89 static void htif_recv(void *opaque
, const uint8_t *buf
, int size
)
91 HTIFState
*s
= opaque
;
98 * TODO - we need to check whether mfromhost is zero which indicates
99 * the device is ready to receive. The current implementation
100 * will drop characters
103 uint64_t val_written
= s
->pending_read
;
104 uint64_t resp
= 0x100 | *buf
;
106 s
->fromhost
= (val_written
>> 48 << 48) | (resp
<< 16 >> 16);
110 * Called by the char dev to supply special events to the HTIF console.
113 static void htif_event(void *opaque
, QEMUChrEvent event
)
118 static int htif_be_change(void *opaque
)
120 HTIFState
*s
= opaque
;
122 qemu_chr_fe_set_handlers(&s
->chr
, htif_can_recv
, htif_recv
, htif_event
,
123 htif_be_change
, s
, NULL
, true);
129 * See below the tohost register format.
131 * Bits 63:56 indicate the "device".
132 * Bits 55:48 indicate the "command".
134 * Device 0 is the syscall device, which is used to emulate Unixy syscalls.
135 * It only implements command 0, which has two subfunctions:
136 * - If bit 0 is clear, then bits 47:0 represent a pointer to a struct
137 * describing the syscall.
138 * - If bit 1 is set, then bits 47:1 represent an exit code, with a zero
139 * value indicating success and other values indicating failure.
141 * Device 1 is the blocking character device.
142 * - Command 0 reads a character
143 * - Command 1 writes a character from the 8 LSBs of tohost
145 * For RV32, the tohost register is zero-extended, so only device=0 and
146 * command=0 (i.e. HTIF syscalls/exit codes) are supported.
148 static void htif_handle_tohost_write(HTIFState
*s
, uint64_t val_written
)
150 uint8_t device
= val_written
>> HTIF_DEV_SHIFT
;
151 uint8_t cmd
= val_written
>> HTIF_CMD_SHIFT
;
152 uint64_t payload
= val_written
& 0xFFFFFFFFFFFFULL
;
155 HTIF_DEBUG("mtohost write: device: %d cmd: %d what: %02" PRIx64
156 " -payload: %016" PRIx64
"\n", device
, cmd
, payload
& 0xFF, payload
);
159 * Currently, there is a fixed mapping of devices:
160 * 0: riscv-tests Pass/Fail Reporting Only (no syscall proxy)
163 if (unlikely(device
== HTIF_DEV_SYSTEM
)) {
164 /* frontend syscall handler, shutdown and exit code support */
165 if (cmd
== HTIF_SYSTEM_CMD_SYSCALL
) {
168 int exit_code
= payload
>> 1;
172 cpu_physical_memory_read(payload
, syscall
, sizeof(syscall
));
173 if (syscall
[0] == PK_SYS_WRITE
&&
174 syscall
[1] == HTIF_DEV_CONSOLE
&&
175 syscall
[3] == HTIF_CONSOLE_CMD_PUTC
) {
177 cpu_physical_memory_read(syscall
[2], &ch
, 1);
178 qemu_chr_fe_write(&s
->chr
, &ch
, 1);
179 resp
= 0x100 | (uint8_t)payload
;
181 qemu_log_mask(LOG_UNIMP
,
182 "pk syscall proxy not supported\n");
186 qemu_log("HTIF device %d: unknown command\n", device
);
188 } else if (likely(device
== HTIF_DEV_CONSOLE
)) {
190 if (cmd
== HTIF_CONSOLE_CMD_GETC
) {
191 /* this should be a queue, but not yet implemented as such */
192 s
->pending_read
= val_written
;
193 s
->tohost
= 0; /* clear to indicate we read */
195 } else if (cmd
== HTIF_CONSOLE_CMD_PUTC
) {
196 qemu_chr_fe_write(&s
->chr
, (uint8_t *)&payload
, 1);
197 resp
= 0x100 | (uint8_t)payload
;
199 qemu_log("HTIF device %d: unknown command\n", device
);
202 qemu_log("HTIF unknown device or command\n");
203 HTIF_DEBUG("device: %d cmd: %d what: %02" PRIx64
204 " payload: %016" PRIx64
, device
, cmd
, payload
& 0xFF, payload
);
207 * Latest bbl does not set fromhost to 0 if there is a value in tohost.
208 * With this code enabled, qemu hangs waiting for fromhost to go to 0.
209 * With this code disabled, qemu works with bbl priv v1.9.1 and v1.10.
210 * HTIF needs protocol documentation and a more complete state machine.
212 * while (!s->fromhost_inprogress &&
213 * s->fromhost != 0x0) {
216 s
->fromhost
= (val_written
>> 48 << 48) | (resp
<< 16 >> 16);
217 s
->tohost
= 0; /* clear to indicate we read */
220 #define TOHOST_OFFSET1 (s->tohost_offset)
221 #define TOHOST_OFFSET2 (s->tohost_offset + 4)
222 #define FROMHOST_OFFSET1 (s->fromhost_offset)
223 #define FROMHOST_OFFSET2 (s->fromhost_offset + 4)
225 /* CPU wants to read an HTIF register */
226 static uint64_t htif_mm_read(void *opaque
, hwaddr addr
, unsigned size
)
228 HTIFState
*s
= opaque
;
229 if (addr
== TOHOST_OFFSET1
) {
230 return s
->tohost
& 0xFFFFFFFF;
231 } else if (addr
== TOHOST_OFFSET2
) {
232 return (s
->tohost
>> 32) & 0xFFFFFFFF;
233 } else if (addr
== FROMHOST_OFFSET1
) {
234 return s
->fromhost
& 0xFFFFFFFF;
235 } else if (addr
== FROMHOST_OFFSET2
) {
236 return (s
->fromhost
>> 32) & 0xFFFFFFFF;
238 qemu_log("Invalid htif read: address %016" PRIx64
"\n",
244 /* CPU wrote to an HTIF register */
245 static void htif_mm_write(void *opaque
, hwaddr addr
,
246 uint64_t value
, unsigned size
)
248 HTIFState
*s
= opaque
;
249 if (addr
== TOHOST_OFFSET1
) {
250 if (s
->tohost
== 0x0) {
252 s
->tohost
= value
& 0xFFFFFFFF;
256 } else if (addr
== TOHOST_OFFSET2
) {
257 if (s
->allow_tohost
) {
258 s
->tohost
|= value
<< 32;
259 htif_handle_tohost_write(s
, s
->tohost
);
261 } else if (addr
== FROMHOST_OFFSET1
) {
262 s
->fromhost_inprogress
= 1;
263 s
->fromhost
= value
& 0xFFFFFFFF;
264 } else if (addr
== FROMHOST_OFFSET2
) {
265 s
->fromhost
|= value
<< 32;
266 s
->fromhost_inprogress
= 0;
268 qemu_log("Invalid htif write: address %016" PRIx64
"\n",
273 static const MemoryRegionOps htif_mm_ops
= {
274 .read
= htif_mm_read
,
275 .write
= htif_mm_write
,
278 bool htif_uses_elf_symbols(void)
280 return (address_symbol_set
== 3) ? true : false;
283 HTIFState
*htif_mm_init(MemoryRegion
*address_space
, Chardev
*chr
,
284 uint64_t nonelf_base
)
286 uint64_t base
, size
, tohost_offset
, fromhost_offset
;
288 if (!htif_uses_elf_symbols()) {
289 fromhost_addr
= nonelf_base
;
290 tohost_addr
= nonelf_base
+ 8;
293 base
= MIN(tohost_addr
, fromhost_addr
);
294 size
= MAX(tohost_addr
+ 8, fromhost_addr
+ 8) - base
;
295 tohost_offset
= tohost_addr
- base
;
296 fromhost_offset
= fromhost_addr
- base
;
298 HTIFState
*s
= g_new0(HTIFState
, 1);
299 s
->tohost_offset
= tohost_offset
;
300 s
->fromhost_offset
= fromhost_offset
;
303 s
->fromhost_inprogress
= 0;
304 qemu_chr_fe_init(&s
->chr
, chr
, &error_abort
);
305 qemu_chr_fe_set_handlers(&s
->chr
, htif_can_recv
, htif_recv
, htif_event
,
306 htif_be_change
, s
, NULL
, true);
308 memory_region_init_io(&s
->mmio
, NULL
, &htif_mm_ops
, s
,
309 TYPE_HTIF_UART
, size
);
310 memory_region_add_subregion_overlap(address_space
, base
,