4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/accel.h"
15 #include "sysemu/replay.h"
16 #include "hw/boards.h"
17 #include "hw/loader.h"
18 #include "qapi/error.h"
19 #include "qapi/qapi-visit-machine.h"
20 #include "qom/object_interfaces.h"
21 #include "sysemu/cpus.h"
22 #include "sysemu/sysemu.h"
23 #include "sysemu/reset.h"
24 #include "sysemu/runstate.h"
25 #include "sysemu/xen.h"
26 #include "sysemu/qtest.h"
27 #include "hw/pci/pci_bridge.h"
28 #include "hw/mem/nvdimm.h"
29 #include "migration/global_state.h"
30 #include "exec/confidential-guest-support.h"
31 #include "hw/virtio/virtio-pci.h"
32 #include "hw/virtio/virtio-net.h"
33 #include "audio/audio.h"
35 GlobalProperty hw_compat_8_1
[] = {
36 { TYPE_PCI_BRIDGE
, "x-pci-express-writeable-slt-bug", "true" },
37 { "ramfb", "x-migrate", "off" },
38 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" },
39 { "igb", "x-pcie-flr-init", "off" },
41 const size_t hw_compat_8_1_len
= G_N_ELEMENTS(hw_compat_8_1
);
43 GlobalProperty hw_compat_8_0
[] = {
44 { "migration", "multifd-flush-after-each-section", "on"},
45 { TYPE_PCI_DEVICE
, "x-pcie-ari-nextfn-1", "on" },
46 { TYPE_VIRTIO_NET
, "host_uso", "off"},
47 { TYPE_VIRTIO_NET
, "guest_uso4", "off"},
48 { TYPE_VIRTIO_NET
, "guest_uso6", "off"},
50 const size_t hw_compat_8_0_len
= G_N_ELEMENTS(hw_compat_8_0
);
52 GlobalProperty hw_compat_7_2
[] = {
53 { "e1000e", "migrate-timadj", "off" },
54 { "virtio-mem", "x-early-migration", "false" },
55 { "migration", "x-preempt-pre-7-2", "true" },
56 { TYPE_PCI_DEVICE
, "x-pcie-err-unc-mask", "off" },
58 const size_t hw_compat_7_2_len
= G_N_ELEMENTS(hw_compat_7_2
);
60 GlobalProperty hw_compat_7_1
[] = {
61 { "virtio-device", "queue_reset", "false" },
62 { "virtio-rng-pci", "vectors", "0" },
63 { "virtio-rng-pci-transitional", "vectors", "0" },
64 { "virtio-rng-pci-non-transitional", "vectors", "0" },
66 const size_t hw_compat_7_1_len
= G_N_ELEMENTS(hw_compat_7_1
);
68 GlobalProperty hw_compat_7_0
[] = {
69 { "arm-gicv3-common", "force-8-bit-prio", "on" },
70 { "nvme-ns", "eui64-default", "on"},
72 const size_t hw_compat_7_0_len
= G_N_ELEMENTS(hw_compat_7_0
);
74 GlobalProperty hw_compat_6_2
[] = {
75 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
77 const size_t hw_compat_6_2_len
= G_N_ELEMENTS(hw_compat_6_2
);
79 GlobalProperty hw_compat_6_1
[] = {
80 { "vhost-user-vsock-device", "seqpacket", "off" },
81 { "nvme-ns", "shared", "off" },
83 const size_t hw_compat_6_1_len
= G_N_ELEMENTS(hw_compat_6_1
);
85 GlobalProperty hw_compat_6_0
[] = {
86 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
87 { "i8042", "extended-state", "false"},
88 { "nvme-ns", "eui64-default", "off"},
89 { "e1000", "init-vet", "off" },
90 { "e1000e", "init-vet", "off" },
91 { "vhost-vsock-device", "seqpacket", "off" },
93 const size_t hw_compat_6_0_len
= G_N_ELEMENTS(hw_compat_6_0
);
95 GlobalProperty hw_compat_5_2
[] = {
96 { "ICH9-LPC", "smm-compat", "on"},
97 { "PIIX4_PM", "smm-compat", "on"},
98 { "virtio-blk-device", "report-discard-granularity", "off" },
99 { "virtio-net-pci-base", "vectors", "3"},
101 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
103 GlobalProperty hw_compat_5_1
[] = {
104 { "vhost-scsi", "num_queues", "1"},
105 { "vhost-user-blk", "num-queues", "1"},
106 { "vhost-user-scsi", "num_queues", "1"},
107 { "virtio-blk-device", "num-queues", "1"},
108 { "virtio-scsi-device", "num_queues", "1"},
109 { "nvme", "use-intel-id", "on"},
110 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
111 { "pl011", "migrate-clk", "off" },
112 { "virtio-pci", "x-ats-page-aligned", "off"},
114 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
116 GlobalProperty hw_compat_5_0
[] = {
117 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
118 { "virtio-balloon-device", "page-poison", "false" },
119 { "vmport", "x-read-set-eax", "off" },
120 { "vmport", "x-signal-unsupported-cmd", "off" },
121 { "vmport", "x-report-vmx-type", "off" },
122 { "vmport", "x-cmds-v2", "off" },
123 { "virtio-device", "x-disable-legacy-check", "true" },
125 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
127 GlobalProperty hw_compat_4_2
[] = {
128 { "virtio-blk-device", "queue-size", "128"},
129 { "virtio-scsi-device", "virtqueue_size", "128"},
130 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
131 { "virtio-blk-device", "seg-max-adjust", "off"},
132 { "virtio-scsi-device", "seg_max_adjust", "off"},
133 { "vhost-blk-device", "seg_max_adjust", "off"},
134 { "usb-host", "suppress-remote-wake", "off" },
135 { "usb-redir", "suppress-remote-wake", "off" },
136 { "qxl", "revision", "4" },
137 { "qxl-vga", "revision", "4" },
138 { "fw_cfg", "acpi-mr-restore", "false" },
139 { "virtio-device", "use-disabled-flag", "false" },
141 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
143 GlobalProperty hw_compat_4_1
[] = {
144 { "virtio-pci", "x-pcie-flr-init", "off" },
146 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
148 GlobalProperty hw_compat_4_0
[] = {
149 { "VGA", "edid", "false" },
150 { "secondary-vga", "edid", "false" },
151 { "bochs-display", "edid", "false" },
152 { "virtio-vga", "edid", "false" },
153 { "virtio-gpu-device", "edid", "false" },
154 { "virtio-device", "use-started", "false" },
155 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
156 { "pl031", "migrate-tick-offset", "false" },
158 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
160 GlobalProperty hw_compat_3_1
[] = {
161 { "pcie-root-port", "x-speed", "2_5" },
162 { "pcie-root-port", "x-width", "1" },
163 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
164 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
165 { "tpm-crb", "ppi", "false" },
166 { "tpm-tis", "ppi", "false" },
167 { "usb-kbd", "serial", "42" },
168 { "usb-mouse", "serial", "42" },
169 { "usb-tablet", "serial", "42" },
170 { "virtio-blk-device", "discard", "false" },
171 { "virtio-blk-device", "write-zeroes", "false" },
172 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
173 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
175 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
177 GlobalProperty hw_compat_3_0
[] = {};
178 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
180 GlobalProperty hw_compat_2_12
[] = {
181 { "migration", "decompress-error-check", "off" },
182 { "hda-audio", "use-timer", "false" },
183 { "cirrus-vga", "global-vmstate", "true" },
184 { "VGA", "global-vmstate", "true" },
185 { "vmware-svga", "global-vmstate", "true" },
186 { "qxl-vga", "global-vmstate", "true" },
188 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
190 GlobalProperty hw_compat_2_11
[] = {
191 { "hpet", "hpet-offset-saved", "false" },
192 { "virtio-blk-pci", "vectors", "2" },
193 { "vhost-user-blk-pci", "vectors", "2" },
194 { "e1000", "migrate_tso_props", "off" },
196 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
198 GlobalProperty hw_compat_2_10
[] = {
199 { "virtio-mouse-device", "wheel-axis", "false" },
200 { "virtio-tablet-device", "wheel-axis", "false" },
202 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
204 GlobalProperty hw_compat_2_9
[] = {
205 { "pci-bridge", "shpc", "off" },
206 { "intel-iommu", "pt", "off" },
207 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
208 { "pcie-root-port", "x-migrate-msix", "false" },
210 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
212 GlobalProperty hw_compat_2_8
[] = {
213 { "fw_cfg_mem", "x-file-slots", "0x10" },
214 { "fw_cfg_io", "x-file-slots", "0x10" },
215 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
216 { "pci-bridge", "shpc", "on" },
217 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
218 { "virtio-pci", "x-pcie-deverr-init", "off" },
219 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
220 { "virtio-pci", "x-pcie-pm-init", "off" },
221 { "cirrus-vga", "vgamem_mb", "8" },
222 { "isa-cirrus-vga", "vgamem_mb", "8" },
224 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
226 GlobalProperty hw_compat_2_7
[] = {
227 { "virtio-pci", "page-per-vq", "on" },
228 { "virtio-serial-device", "emergency-write", "off" },
229 { "ioapic", "version", "0x11" },
230 { "intel-iommu", "x-buggy-eim", "true" },
231 { "virtio-pci", "x-ignore-backend-features", "on" },
233 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
235 GlobalProperty hw_compat_2_6
[] = {
236 { "virtio-mmio", "format_transport_address", "off" },
237 /* Optional because not all virtio-pci devices support legacy mode */
238 { "virtio-pci", "disable-modern", "on", .optional
= true },
239 { "virtio-pci", "disable-legacy", "off", .optional
= true },
241 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
243 GlobalProperty hw_compat_2_5
[] = {
244 { "isa-fdc", "fallback", "144" },
245 { "pvscsi", "x-old-pci-configuration", "on" },
246 { "pvscsi", "x-disable-pcie", "on" },
247 { "vmxnet3", "x-old-msi-offsets", "on" },
248 { "vmxnet3", "x-disable-pcie", "on" },
250 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
252 GlobalProperty hw_compat_2_4
[] = {
253 /* Optional because the 'scsi' property is Linux-only */
254 { "virtio-blk-device", "scsi", "true", .optional
= true },
255 { "e1000", "extra_mac_registers", "off" },
256 { "virtio-pci", "x-disable-pcie", "on" },
257 { "virtio-pci", "migrate-extra", "off" },
258 { "fw_cfg_mem", "dma_enabled", "off" },
259 { "fw_cfg_io", "dma_enabled", "off" }
261 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
263 GlobalProperty hw_compat_2_3
[] = {
264 { "virtio-blk-pci", "any_layout", "off" },
265 { "virtio-balloon-pci", "any_layout", "off" },
266 { "virtio-serial-pci", "any_layout", "off" },
267 { "virtio-9p-pci", "any_layout", "off" },
268 { "virtio-rng-pci", "any_layout", "off" },
269 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
270 { "migration", "send-configuration", "off" },
271 { "migration", "send-section-footer", "off" },
272 { "migration", "store-global-state", "off" },
274 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
276 GlobalProperty hw_compat_2_2
[] = {};
277 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
279 GlobalProperty hw_compat_2_1
[] = {
280 { "intel-hda", "old_msi_addr", "on" },
281 { "VGA", "qemu-extended-regs", "off" },
282 { "secondary-vga", "qemu-extended-regs", "off" },
283 { "virtio-scsi-pci", "any_layout", "off" },
284 { "usb-mouse", "usb_version", "1" },
285 { "usb-kbd", "usb_version", "1" },
286 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
288 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
290 MachineState
*current_machine
;
292 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
294 MachineState
*ms
= MACHINE(obj
);
296 return g_strdup(ms
->kernel_filename
);
299 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
301 MachineState
*ms
= MACHINE(obj
);
303 g_free(ms
->kernel_filename
);
304 ms
->kernel_filename
= g_strdup(value
);
307 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
309 MachineState
*ms
= MACHINE(obj
);
311 return g_strdup(ms
->initrd_filename
);
314 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
316 MachineState
*ms
= MACHINE(obj
);
318 g_free(ms
->initrd_filename
);
319 ms
->initrd_filename
= g_strdup(value
);
322 static char *machine_get_append(Object
*obj
, Error
**errp
)
324 MachineState
*ms
= MACHINE(obj
);
326 return g_strdup(ms
->kernel_cmdline
);
329 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
331 MachineState
*ms
= MACHINE(obj
);
333 g_free(ms
->kernel_cmdline
);
334 ms
->kernel_cmdline
= g_strdup(value
);
337 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
339 MachineState
*ms
= MACHINE(obj
);
341 return g_strdup(ms
->dtb
);
344 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
346 MachineState
*ms
= MACHINE(obj
);
349 ms
->dtb
= g_strdup(value
);
352 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
354 MachineState
*ms
= MACHINE(obj
);
356 return g_strdup(ms
->dumpdtb
);
359 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
361 MachineState
*ms
= MACHINE(obj
);
364 ms
->dumpdtb
= g_strdup(value
);
367 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
368 const char *name
, void *opaque
,
371 MachineState
*ms
= MACHINE(obj
);
372 int64_t value
= ms
->phandle_start
;
374 visit_type_int(v
, name
, &value
, errp
);
377 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
378 const char *name
, void *opaque
,
381 MachineState
*ms
= MACHINE(obj
);
384 if (!visit_type_int(v
, name
, &value
, errp
)) {
388 ms
->phandle_start
= value
;
391 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
393 MachineState
*ms
= MACHINE(obj
);
395 return g_strdup(ms
->dt_compatible
);
398 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
400 MachineState
*ms
= MACHINE(obj
);
402 g_free(ms
->dt_compatible
);
403 ms
->dt_compatible
= g_strdup(value
);
406 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
408 MachineState
*ms
= MACHINE(obj
);
410 return ms
->dump_guest_core
;
413 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
415 MachineState
*ms
= MACHINE(obj
);
417 ms
->dump_guest_core
= value
;
420 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
422 MachineState
*ms
= MACHINE(obj
);
424 return ms
->mem_merge
;
427 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
429 MachineState
*ms
= MACHINE(obj
);
431 ms
->mem_merge
= value
;
434 static bool machine_get_usb(Object
*obj
, Error
**errp
)
436 MachineState
*ms
= MACHINE(obj
);
441 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
443 MachineState
*ms
= MACHINE(obj
);
446 ms
->usb_disabled
= !value
;
449 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
451 MachineState
*ms
= MACHINE(obj
);
453 return ms
->enable_graphics
;
456 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
458 MachineState
*ms
= MACHINE(obj
);
460 ms
->enable_graphics
= value
;
463 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
465 MachineState
*ms
= MACHINE(obj
);
467 return g_strdup(ms
->firmware
);
470 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
472 MachineState
*ms
= MACHINE(obj
);
474 g_free(ms
->firmware
);
475 ms
->firmware
= g_strdup(value
);
478 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
480 MachineState
*ms
= MACHINE(obj
);
482 ms
->suppress_vmdesc
= value
;
485 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
487 MachineState
*ms
= MACHINE(obj
);
489 return ms
->suppress_vmdesc
;
492 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
494 MachineState
*ms
= MACHINE(obj
);
497 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
503 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
507 object_resolve_path_component(object_get_objects_root(), value
);
510 error_setg(errp
, "No such memory encryption object '%s'", value
);
514 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
517 static void machine_check_confidential_guest_support(const Object
*obj
,
523 * So far the only constraint is that the target has the
524 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
529 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
531 MachineState
*ms
= MACHINE(obj
);
533 return ms
->nvdimms_state
->is_enabled
;
536 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
538 MachineState
*ms
= MACHINE(obj
);
540 ms
->nvdimms_state
->is_enabled
= value
;
543 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
545 MachineState
*ms
= MACHINE(obj
);
547 return ms
->numa_state
->hmat_enabled
;
550 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
552 MachineState
*ms
= MACHINE(obj
);
554 ms
->numa_state
->hmat_enabled
= value
;
557 static void machine_get_mem(Object
*obj
, Visitor
*v
, const char *name
,
558 void *opaque
, Error
**errp
)
560 MachineState
*ms
= MACHINE(obj
);
561 MemorySizeConfiguration mem
= {
563 .size
= ms
->ram_size
,
564 .has_max_size
= !!ms
->ram_slots
,
565 .max_size
= ms
->maxram_size
,
566 .has_slots
= !!ms
->ram_slots
,
567 .slots
= ms
->ram_slots
,
569 MemorySizeConfiguration
*p_mem
= &mem
;
571 visit_type_MemorySizeConfiguration(v
, name
, &p_mem
, &error_abort
);
574 static void machine_set_mem(Object
*obj
, Visitor
*v
, const char *name
,
575 void *opaque
, Error
**errp
)
578 MachineState
*ms
= MACHINE(obj
);
579 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
580 MemorySizeConfiguration
*mem
;
582 if (!visit_type_MemorySizeConfiguration(v
, name
, &mem
, errp
)) {
586 if (!mem
->has_size
) {
587 mem
->has_size
= true;
588 mem
->size
= mc
->default_ram_size
;
590 mem
->size
= QEMU_ALIGN_UP(mem
->size
, 8192);
591 if (mc
->fixup_ram_size
) {
592 mem
->size
= mc
->fixup_ram_size(mem
->size
);
594 if ((ram_addr_t
)mem
->size
!= mem
->size
) {
595 error_setg(errp
, "ram size too large");
599 if (mem
->has_max_size
) {
600 if (mem
->max_size
< mem
->size
) {
601 error_setg(errp
, "invalid value of maxmem: "
602 "maximum memory size (0x%" PRIx64
") must be at least "
603 "the initial memory size (0x%" PRIx64
")",
604 mem
->max_size
, mem
->size
);
607 if (mem
->has_slots
&& mem
->slots
&& mem
->max_size
== mem
->size
) {
608 error_setg(errp
, "invalid value of maxmem: "
609 "memory slots were specified but maximum memory size "
610 "(0x%" PRIx64
") is equal to the initial memory size "
611 "(0x%" PRIx64
")", mem
->max_size
, mem
->size
);
614 ms
->maxram_size
= mem
->max_size
;
616 if (mem
->has_slots
) {
617 error_setg(errp
, "slots specified but no max-size");
620 ms
->maxram_size
= mem
->size
;
622 ms
->ram_size
= mem
->size
;
623 ms
->ram_slots
= mem
->has_slots
? mem
->slots
: 0;
625 qapi_free_MemorySizeConfiguration(mem
);
628 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
630 MachineState
*ms
= MACHINE(obj
);
632 return g_strdup(ms
->nvdimms_state
->persistence_string
);
635 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
638 MachineState
*ms
= MACHINE(obj
);
639 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
641 if (strcmp(value
, "cpu") == 0) {
642 nvdimms_state
->persistence
= 3;
643 } else if (strcmp(value
, "mem-ctrl") == 0) {
644 nvdimms_state
->persistence
= 2;
646 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
651 g_free(nvdimms_state
->persistence_string
);
652 nvdimms_state
->persistence_string
= g_strdup(value
);
655 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
657 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
660 bool device_is_dynamic_sysbus(MachineClass
*mc
, DeviceState
*dev
)
662 Object
*obj
= OBJECT(dev
);
664 if (!object_dynamic_cast(obj
, TYPE_SYS_BUS_DEVICE
)) {
668 return device_type_is_dynamic_sysbus(mc
, object_get_typename(obj
));
671 bool device_type_is_dynamic_sysbus(MachineClass
*mc
, const char *type
)
673 bool allowed
= false;
675 ObjectClass
*klass
= object_class_by_name(type
);
677 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
680 allowed
|= !!object_class_dynamic_cast(klass
, wl
->value
);
686 static char *machine_get_audiodev(Object
*obj
, Error
**errp
)
688 MachineState
*ms
= MACHINE(obj
);
690 return g_strdup(ms
->audiodev
);
693 static void machine_set_audiodev(Object
*obj
, const char *value
,
696 MachineState
*ms
= MACHINE(obj
);
698 if (!audio_state_by_name(value
, errp
)) {
702 g_free(ms
->audiodev
);
703 ms
->audiodev
= g_strdup(value
);
706 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
709 HotpluggableCPUList
*head
= NULL
;
710 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
712 /* force board to initialize possible_cpus if it hasn't been done yet */
713 mc
->possible_cpu_arch_ids(machine
);
715 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
717 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
719 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
720 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
721 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
722 sizeof(*cpu_item
->props
));
724 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
726 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
728 QAPI_LIST_PREPEND(head
, cpu_item
);
734 * machine_set_cpu_numa_node:
735 * @machine: machine object to modify
736 * @props: specifies which cpu objects to assign to
737 * numa node specified by @props.node_id
738 * @errp: if an error occurs, a pointer to an area to store the error
740 * Associate NUMA node specified by @props.node_id with cpu slots that
741 * match socket/core/thread-ids specified by @props. It's recommended to use
742 * query-hotpluggable-cpus.props values to specify affected cpu slots,
743 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
745 * However for CLI convenience it's possible to pass in subset of properties,
746 * which would affect all cpu slots that match it.
748 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
749 * -numa cpu,node-id=0,socket_id=0 \
750 * -numa cpu,node-id=1,socket_id=1
751 * will assign all child cores of socket 0 to node 0 and
752 * of socket 1 to node 1.
754 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
756 * Empty subset is disallowed and function will return with error in this case.
758 void machine_set_cpu_numa_node(MachineState
*machine
,
759 const CpuInstanceProperties
*props
, Error
**errp
)
761 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
762 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
766 if (!mc
->possible_cpu_arch_ids
) {
767 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
771 /* disabling node mapping is not supported, forbid it */
772 assert(props
->has_node_id
);
774 /* force board to initialize possible_cpus if it hasn't been done yet */
775 mc
->possible_cpu_arch_ids(machine
);
777 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
778 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
780 /* reject unsupported by board properties */
781 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
782 error_setg(errp
, "thread-id is not supported");
786 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
787 error_setg(errp
, "core-id is not supported");
791 if (props
->has_cluster_id
&& !slot
->props
.has_cluster_id
) {
792 error_setg(errp
, "cluster-id is not supported");
796 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
797 error_setg(errp
, "socket-id is not supported");
801 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
802 error_setg(errp
, "die-id is not supported");
806 /* skip slots with explicit mismatch */
807 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
811 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
815 if (props
->has_cluster_id
&&
816 props
->cluster_id
!= slot
->props
.cluster_id
) {
820 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
824 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
828 /* reject assignment if slot is already assigned, for compatibility
829 * of legacy cpu_index mapping with SPAPR core based mapping do not
830 * error out if cpu thread and matched core have the same node-id */
831 if (slot
->props
.has_node_id
&&
832 slot
->props
.node_id
!= props
->node_id
) {
833 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
834 slot
->props
.node_id
);
838 /* assign slot to node as it's matched '-numa cpu' key */
840 slot
->props
.node_id
= props
->node_id
;
841 slot
->props
.has_node_id
= props
->has_node_id
;
843 if (machine
->numa_state
->hmat_enabled
) {
844 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
845 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
846 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
847 " should be itself (got %" PRIu16
")",
848 props
->node_id
, numa_info
[props
->node_id
].initiator
);
851 numa_info
[props
->node_id
].has_cpu
= true;
852 numa_info
[props
->node_id
].initiator
= props
->node_id
;
857 error_setg(errp
, "no match found");
861 static void machine_get_smp(Object
*obj
, Visitor
*v
, const char *name
,
862 void *opaque
, Error
**errp
)
864 MachineState
*ms
= MACHINE(obj
);
865 SMPConfiguration
*config
= &(SMPConfiguration
){
866 .has_cpus
= true, .cpus
= ms
->smp
.cpus
,
867 .has_drawers
= true, .drawers
= ms
->smp
.drawers
,
868 .has_books
= true, .books
= ms
->smp
.books
,
869 .has_sockets
= true, .sockets
= ms
->smp
.sockets
,
870 .has_dies
= true, .dies
= ms
->smp
.dies
,
871 .has_clusters
= true, .clusters
= ms
->smp
.clusters
,
872 .has_cores
= true, .cores
= ms
->smp
.cores
,
873 .has_threads
= true, .threads
= ms
->smp
.threads
,
874 .has_maxcpus
= true, .maxcpus
= ms
->smp
.max_cpus
,
877 if (!visit_type_SMPConfiguration(v
, name
, &config
, &error_abort
)) {
882 static void machine_set_smp(Object
*obj
, Visitor
*v
, const char *name
,
883 void *opaque
, Error
**errp
)
885 MachineState
*ms
= MACHINE(obj
);
886 g_autoptr(SMPConfiguration
) config
= NULL
;
888 if (!visit_type_SMPConfiguration(v
, name
, &config
, errp
)) {
892 machine_parse_smp_config(ms
, config
, errp
);
895 static void machine_get_boot(Object
*obj
, Visitor
*v
, const char *name
,
896 void *opaque
, Error
**errp
)
898 MachineState
*ms
= MACHINE(obj
);
899 BootConfiguration
*config
= &ms
->boot_config
;
900 visit_type_BootConfiguration(v
, name
, &config
, &error_abort
);
903 static void machine_free_boot_config(MachineState
*ms
)
905 g_free(ms
->boot_config
.order
);
906 g_free(ms
->boot_config
.once
);
907 g_free(ms
->boot_config
.splash
);
910 static void machine_copy_boot_config(MachineState
*ms
, BootConfiguration
*config
)
912 MachineClass
*machine_class
= MACHINE_GET_CLASS(ms
);
914 machine_free_boot_config(ms
);
915 ms
->boot_config
= *config
;
916 if (!config
->order
) {
917 ms
->boot_config
.order
= g_strdup(machine_class
->default_boot_order
);
921 static void machine_set_boot(Object
*obj
, Visitor
*v
, const char *name
,
922 void *opaque
, Error
**errp
)
925 MachineState
*ms
= MACHINE(obj
);
926 BootConfiguration
*config
= NULL
;
928 if (!visit_type_BootConfiguration(v
, name
, &config
, errp
)) {
932 validate_bootdevices(config
->order
, errp
);
938 validate_bootdevices(config
->once
, errp
);
944 machine_copy_boot_config(ms
, config
);
945 /* Strings live in ms->boot_config. */
950 qapi_free_BootConfiguration(config
);
953 void machine_add_audiodev_property(MachineClass
*mc
)
955 ObjectClass
*oc
= OBJECT_CLASS(mc
);
957 object_class_property_add_str(oc
, "audiodev",
958 machine_get_audiodev
,
959 machine_set_audiodev
);
960 object_class_property_set_description(oc
, "audiodev",
961 "Audiodev to use for default machine devices");
964 static void machine_class_init(ObjectClass
*oc
, void *data
)
966 MachineClass
*mc
= MACHINE_CLASS(oc
);
968 /* Default 128 MB as guest ram size */
969 mc
->default_ram_size
= 128 * MiB
;
970 mc
->rom_file_has_mr
= true;
972 /* numa node memory size aligned on 8MB by default.
973 * On Linux, each node's border has to be 8MB aligned
975 mc
->numa_mem_align_shift
= 23;
977 object_class_property_add_str(oc
, "kernel",
978 machine_get_kernel
, machine_set_kernel
);
979 object_class_property_set_description(oc
, "kernel",
980 "Linux kernel image file");
982 object_class_property_add_str(oc
, "initrd",
983 machine_get_initrd
, machine_set_initrd
);
984 object_class_property_set_description(oc
, "initrd",
985 "Linux initial ramdisk file");
987 object_class_property_add_str(oc
, "append",
988 machine_get_append
, machine_set_append
);
989 object_class_property_set_description(oc
, "append",
990 "Linux kernel command line");
992 object_class_property_add_str(oc
, "dtb",
993 machine_get_dtb
, machine_set_dtb
);
994 object_class_property_set_description(oc
, "dtb",
995 "Linux kernel device tree file");
997 object_class_property_add_str(oc
, "dumpdtb",
998 machine_get_dumpdtb
, machine_set_dumpdtb
);
999 object_class_property_set_description(oc
, "dumpdtb",
1000 "Dump current dtb to a file and quit");
1002 object_class_property_add(oc
, "boot", "BootConfiguration",
1003 machine_get_boot
, machine_set_boot
,
1005 object_class_property_set_description(oc
, "boot",
1006 "Boot configuration");
1008 object_class_property_add(oc
, "smp", "SMPConfiguration",
1009 machine_get_smp
, machine_set_smp
,
1011 object_class_property_set_description(oc
, "smp",
1014 object_class_property_add(oc
, "phandle-start", "int",
1015 machine_get_phandle_start
, machine_set_phandle_start
,
1017 object_class_property_set_description(oc
, "phandle-start",
1018 "The first phandle ID we may generate dynamically");
1020 object_class_property_add_str(oc
, "dt-compatible",
1021 machine_get_dt_compatible
, machine_set_dt_compatible
);
1022 object_class_property_set_description(oc
, "dt-compatible",
1023 "Overrides the \"compatible\" property of the dt root node");
1025 object_class_property_add_bool(oc
, "dump-guest-core",
1026 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
1027 object_class_property_set_description(oc
, "dump-guest-core",
1028 "Include guest memory in a core dump");
1030 object_class_property_add_bool(oc
, "mem-merge",
1031 machine_get_mem_merge
, machine_set_mem_merge
);
1032 object_class_property_set_description(oc
, "mem-merge",
1033 "Enable/disable memory merge support");
1035 object_class_property_add_bool(oc
, "usb",
1036 machine_get_usb
, machine_set_usb
);
1037 object_class_property_set_description(oc
, "usb",
1038 "Set on/off to enable/disable usb");
1040 object_class_property_add_bool(oc
, "graphics",
1041 machine_get_graphics
, machine_set_graphics
);
1042 object_class_property_set_description(oc
, "graphics",
1043 "Set on/off to enable/disable graphics emulation");
1045 object_class_property_add_str(oc
, "firmware",
1046 machine_get_firmware
, machine_set_firmware
);
1047 object_class_property_set_description(oc
, "firmware",
1050 object_class_property_add_bool(oc
, "suppress-vmdesc",
1051 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
1052 object_class_property_set_description(oc
, "suppress-vmdesc",
1053 "Set on to disable self-describing migration");
1055 object_class_property_add_link(oc
, "confidential-guest-support",
1056 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
1057 offsetof(MachineState
, cgs
),
1058 machine_check_confidential_guest_support
,
1059 OBJ_PROP_LINK_STRONG
);
1060 object_class_property_set_description(oc
, "confidential-guest-support",
1061 "Set confidential guest scheme to support");
1063 /* For compatibility */
1064 object_class_property_add_str(oc
, "memory-encryption",
1065 machine_get_memory_encryption
, machine_set_memory_encryption
);
1066 object_class_property_set_description(oc
, "memory-encryption",
1067 "Set memory encryption object to use");
1069 object_class_property_add_link(oc
, "memory-backend", TYPE_MEMORY_BACKEND
,
1070 offsetof(MachineState
, memdev
), object_property_allow_set_link
,
1071 OBJ_PROP_LINK_STRONG
);
1072 object_class_property_set_description(oc
, "memory-backend",
1074 "Valid value is ID of hostmem based backend");
1076 object_class_property_add(oc
, "memory", "MemorySizeConfiguration",
1077 machine_get_mem
, machine_set_mem
,
1079 object_class_property_set_description(oc
, "memory",
1080 "Memory size configuration");
1083 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
1085 MachineClass
*mc
= MACHINE_CLASS(oc
);
1086 mc
->max_cpus
= mc
->max_cpus
?: 1;
1087 mc
->min_cpus
= mc
->min_cpus
?: 1;
1088 mc
->default_cpus
= mc
->default_cpus
?: 1;
1090 if (!object_class_is_abstract(oc
)) {
1091 const char *cname
= object_class_get_name(oc
);
1092 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
1093 mc
->name
= g_strndup(cname
,
1094 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
1095 mc
->compat_props
= g_ptr_array_new();
1099 static void machine_initfn(Object
*obj
)
1101 MachineState
*ms
= MACHINE(obj
);
1102 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
1104 container_get(obj
, "/peripheral");
1105 container_get(obj
, "/peripheral-anon");
1107 ms
->dump_guest_core
= true;
1108 ms
->mem_merge
= true;
1109 ms
->enable_graphics
= true;
1110 ms
->kernel_cmdline
= g_strdup("");
1111 ms
->ram_size
= mc
->default_ram_size
;
1112 ms
->maxram_size
= mc
->default_ram_size
;
1114 if (mc
->nvdimm_supported
) {
1115 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
1116 object_property_add_bool(obj
, "nvdimm",
1117 machine_get_nvdimm
, machine_set_nvdimm
);
1118 object_property_set_description(obj
, "nvdimm",
1119 "Set on/off to enable/disable "
1120 "NVDIMM instantiation");
1122 object_property_add_str(obj
, "nvdimm-persistence",
1123 machine_get_nvdimm_persistence
,
1124 machine_set_nvdimm_persistence
);
1125 object_property_set_description(obj
, "nvdimm-persistence",
1126 "Set NVDIMM persistence"
1127 "Valid values are cpu, mem-ctrl");
1130 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
1131 ms
->numa_state
= g_new0(NumaState
, 1);
1132 object_property_add_bool(obj
, "hmat",
1133 machine_get_hmat
, machine_set_hmat
);
1134 object_property_set_description(obj
, "hmat",
1135 "Set on/off to enable/disable "
1136 "ACPI Heterogeneous Memory Attribute "
1140 /* default to mc->default_cpus */
1141 ms
->smp
.cpus
= mc
->default_cpus
;
1142 ms
->smp
.max_cpus
= mc
->default_cpus
;
1143 ms
->smp
.drawers
= 1;
1145 ms
->smp
.sockets
= 1;
1147 ms
->smp
.clusters
= 1;
1149 ms
->smp
.threads
= 1;
1151 machine_copy_boot_config(ms
, &(BootConfiguration
){ 0 });
1154 static void machine_finalize(Object
*obj
)
1156 MachineState
*ms
= MACHINE(obj
);
1158 machine_free_boot_config(ms
);
1159 g_free(ms
->kernel_filename
);
1160 g_free(ms
->initrd_filename
);
1161 g_free(ms
->kernel_cmdline
);
1163 g_free(ms
->dumpdtb
);
1164 g_free(ms
->dt_compatible
);
1165 g_free(ms
->firmware
);
1166 g_free(ms
->device_memory
);
1167 g_free(ms
->nvdimms_state
);
1168 g_free(ms
->numa_state
);
1169 g_free(ms
->audiodev
);
1172 bool machine_usb(MachineState
*machine
)
1174 return machine
->usb
;
1177 int machine_phandle_start(MachineState
*machine
)
1179 return machine
->phandle_start
;
1182 bool machine_dump_guest_core(MachineState
*machine
)
1184 return machine
->dump_guest_core
;
1187 bool machine_mem_merge(MachineState
*machine
)
1189 return machine
->mem_merge
;
1192 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
1194 GString
*s
= g_string_new(NULL
);
1195 if (cpu
->props
.has_socket_id
) {
1196 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1198 if (cpu
->props
.has_die_id
) {
1200 g_string_append_printf(s
, ", ");
1202 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1204 if (cpu
->props
.has_cluster_id
) {
1206 g_string_append_printf(s
, ", ");
1208 g_string_append_printf(s
, "cluster-id: %"PRId64
, cpu
->props
.cluster_id
);
1210 if (cpu
->props
.has_core_id
) {
1212 g_string_append_printf(s
, ", ");
1214 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1216 if (cpu
->props
.has_thread_id
) {
1218 g_string_append_printf(s
, ", ");
1220 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1222 return g_string_free(s
, false);
1225 static void numa_validate_initiator(NumaState
*numa_state
)
1228 NodeInfo
*numa_info
= numa_state
->nodes
;
1230 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1231 if (numa_info
[i
].initiator
== MAX_NODES
) {
1235 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1236 error_report("NUMA node %" PRIu16
" is missing, use "
1237 "'-numa node' option to declare it first",
1238 numa_info
[i
].initiator
);
1242 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1243 error_report("The initiator of NUMA node %d is invalid", i
);
1249 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1252 bool default_mapping
;
1253 GString
*s
= g_string_new(NULL
);
1254 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1255 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1257 assert(machine
->numa_state
->num_nodes
);
1258 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1259 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1263 default_mapping
= (i
== possible_cpus
->len
);
1265 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1266 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1268 if (!cpu_slot
->props
.has_node_id
) {
1269 /* fetch default mapping from board and enable it */
1270 CpuInstanceProperties props
= cpu_slot
->props
;
1272 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1273 if (!default_mapping
) {
1274 /* record slots with not set mapping,
1275 * TODO: make it hard error in future */
1276 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1277 g_string_append_printf(s
, "%sCPU %d [%s]",
1278 s
->len
? ", " : "", i
, cpu_str
);
1281 /* non mapped cpus used to fallback to node 0 */
1285 props
.has_node_id
= true;
1286 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1290 if (machine
->numa_state
->hmat_enabled
) {
1291 numa_validate_initiator(machine
->numa_state
);
1294 if (s
->len
&& !qtest_enabled()) {
1295 warn_report("CPU(s) not present in any NUMA nodes: %s",
1297 warn_report("All CPU(s) up to maxcpus should be described "
1298 "in NUMA config, ability to start up with partial NUMA "
1299 "mappings is obsoleted and will be removed in future");
1301 g_string_free(s
, true);
1304 static void validate_cpu_cluster_to_numa_boundary(MachineState
*ms
)
1306 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1307 NumaState
*state
= ms
->numa_state
;
1308 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
1309 const CPUArchId
*cpus
= possible_cpus
->cpus
;
1312 if (state
->num_nodes
<= 1 || possible_cpus
->len
<= 1) {
1317 * The Linux scheduling domain can't be parsed when the multiple CPUs
1318 * in one cluster have been associated with different NUMA nodes. However,
1319 * it's fine to associate one NUMA node with CPUs in different clusters.
1321 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1322 for (j
= i
+ 1; j
< possible_cpus
->len
; j
++) {
1323 if (cpus
[i
].props
.has_socket_id
&&
1324 cpus
[i
].props
.has_cluster_id
&&
1325 cpus
[i
].props
.has_node_id
&&
1326 cpus
[j
].props
.has_socket_id
&&
1327 cpus
[j
].props
.has_cluster_id
&&
1328 cpus
[j
].props
.has_node_id
&&
1329 cpus
[i
].props
.socket_id
== cpus
[j
].props
.socket_id
&&
1330 cpus
[i
].props
.cluster_id
== cpus
[j
].props
.cluster_id
&&
1331 cpus
[i
].props
.node_id
!= cpus
[j
].props
.node_id
) {
1332 warn_report("CPU-%d and CPU-%d in socket-%" PRId64
"-cluster-%" PRId64
1333 " have been associated with node-%" PRId64
" and node-%" PRId64
1334 " respectively. It can cause OSes like Linux to"
1335 " misbehave", i
, j
, cpus
[i
].props
.socket_id
,
1336 cpus
[i
].props
.cluster_id
, cpus
[i
].props
.node_id
,
1337 cpus
[j
].props
.node_id
);
1343 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1344 HostMemoryBackend
*backend
)
1346 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1348 if (host_memory_backend_is_mapped(backend
)) {
1349 error_report("memory backend %s can't be used multiple times.",
1350 object_get_canonical_path_component(OBJECT(backend
)));
1353 host_memory_backend_set_mapped(backend
, true);
1354 vmstate_register_ram_global(ret
);
1358 static bool create_default_memdev(MachineState
*ms
, const char *path
, Error
**errp
)
1361 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1364 obj
= object_new(path
? TYPE_MEMORY_BACKEND_FILE
: TYPE_MEMORY_BACKEND_RAM
);
1366 if (!object_property_set_str(obj
, "mem-path", path
, errp
)) {
1370 if (!object_property_set_int(obj
, "size", ms
->ram_size
, errp
)) {
1373 object_property_add_child(object_get_objects_root(), mc
->default_ram_id
,
1375 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1376 if (!object_property_set_bool(obj
, "x-use-canonical-path-for-ramblock-id",
1380 if (!user_creatable_complete(USER_CREATABLE(obj
), errp
)) {
1383 r
= object_property_set_link(OBJECT(ms
), "memory-backend", obj
, errp
);
1391 void machine_run_board_init(MachineState
*machine
, const char *mem_path
, Error
**errp
)
1394 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1395 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1398 /* This checkpoint is required by replay to separate prior clock
1399 reading from the other reads, because timer polling functions query
1400 clock values from the log. */
1401 replay_checkpoint(CHECKPOINT_INIT
);
1403 if (!xen_enabled()) {
1404 /* On 32-bit hosts, QEMU is limited by virtual address space */
1405 if (machine
->ram_size
> (2047 << 20) && HOST_LONG_BITS
== 32) {
1406 error_setg(errp
, "at most 2047 MB RAM can be simulated");
1411 if (machine
->memdev
) {
1412 ram_addr_t backend_size
= object_property_get_uint(OBJECT(machine
->memdev
),
1413 "size", &error_abort
);
1414 if (backend_size
!= machine
->ram_size
) {
1415 error_setg(errp
, "Machine memory size does not match the size of the memory backend");
1418 } else if (machine_class
->default_ram_id
&& machine
->ram_size
&&
1419 numa_uses_legacy_mem()) {
1420 if (object_property_find(object_get_objects_root(),
1421 machine_class
->default_ram_id
)) {
1422 error_setg(errp
, "object's id '%s' is reserved for the default"
1423 " RAM backend, it can't be used for any other purposes",
1424 machine_class
->default_ram_id
);
1425 error_append_hint(errp
,
1426 "Change the object's 'id' to something else or disable"
1427 " automatic creation of the default RAM backend by setting"
1428 " 'memory-backend=%s' with '-machine'.\n",
1429 machine_class
->default_ram_id
);
1432 if (!create_default_memdev(current_machine
, mem_path
, errp
)) {
1437 if (machine
->numa_state
) {
1438 numa_complete_configuration(machine
);
1439 if (machine
->numa_state
->num_nodes
) {
1440 machine_numa_finish_cpu_init(machine
);
1441 if (machine_class
->cpu_cluster_has_numa_boundary
) {
1442 validate_cpu_cluster_to_numa_boundary(machine
);
1447 if (!machine
->ram
&& machine
->memdev
) {
1448 machine
->ram
= machine_consume_memdev(machine
, machine
->memdev
);
1451 /* If the machine supports the valid_cpu_types check and the user
1452 * specified a CPU with -cpu check here that the user CPU is supported.
1454 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1457 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1458 if (object_class_dynamic_cast(oc
,
1459 machine_class
->valid_cpu_types
[i
])) {
1460 /* The user specified CPU is in the valid field, we are
1467 if (!machine_class
->valid_cpu_types
[i
]) {
1468 /* The user specified CPU is not valid */
1469 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1470 error_printf("The valid types are: %s",
1471 machine_class
->valid_cpu_types
[0]);
1472 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1473 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1481 /* Check if CPU type is deprecated and warn if so */
1483 if (cc
&& cc
->deprecation_note
) {
1484 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1485 cc
->deprecation_note
);
1490 * With confidential guests, the host can't see the real
1491 * contents of RAM, so there's no point in it trying to merge
1494 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1497 * Virtio devices can't count on directly accessing guest
1498 * memory, so they need iommu_platform=on to use normal DMA
1499 * mechanisms. That requires also disabling legacy virtio
1500 * support for those virtio pci devices which allow it.
1502 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1504 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1508 accel_init_interfaces(ACCEL_GET_CLASS(machine
->accelerator
));
1509 machine_class
->init(machine
);
1510 phase_advance(PHASE_MACHINE_INITIALIZED
);
1513 static NotifierList machine_init_done_notifiers
=
1514 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1516 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1518 notifier_list_add(&machine_init_done_notifiers
, notify
);
1519 if (phase_check(PHASE_MACHINE_READY
)) {
1520 notify
->notify(notify
, NULL
);
1524 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1526 notifier_remove(notify
);
1529 void qdev_machine_creation_done(void)
1531 cpu_synchronize_all_post_init();
1533 if (current_machine
->boot_config
.once
) {
1534 qemu_boot_set(current_machine
->boot_config
.once
, &error_fatal
);
1535 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_config
.order
));
1539 * ok, initial machine setup is done, starting from now we can
1540 * only create hotpluggable devices
1542 phase_advance(PHASE_MACHINE_READY
);
1543 qdev_assert_realized_properly();
1545 /* TODO: once all bus devices are qdevified, this should be done
1546 * when bus is created by qdev.c */
1548 * TODO: If we had a main 'reset container' that the whole system
1549 * lived in, we could reset that using the multi-phase reset
1550 * APIs. For the moment, we just reset the sysbus, which will cause
1551 * all devices hanging off it (and all their child buses, recursively)
1552 * to be reset. Note that this will *not* reset any Device objects
1553 * which are not attached to some part of the qbus tree!
1555 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1557 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1559 if (rom_check_and_register_reset() != 0) {
1565 /* This checkpoint is required by replay to separate prior clock
1566 reading from the other reads, because timer polling functions query
1567 clock values from the log. */
1568 replay_checkpoint(CHECKPOINT_RESET
);
1569 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1570 register_global_state();
1573 static const TypeInfo machine_info
= {
1574 .name
= TYPE_MACHINE
,
1575 .parent
= TYPE_OBJECT
,
1577 .class_size
= sizeof(MachineClass
),
1578 .class_init
= machine_class_init
,
1579 .class_base_init
= machine_class_base_init
,
1580 .instance_size
= sizeof(MachineState
),
1581 .instance_init
= machine_initfn
,
1582 .instance_finalize
= machine_finalize
,
1585 static void machine_register_types(void)
1587 type_register_static(&machine_info
);
1590 type_init(machine_register_types
)