4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/accel.h"
15 #include "sysemu/replay.h"
16 #include "hw/boards.h"
17 #include "hw/loader.h"
18 #include "qapi/error.h"
19 #include "qapi/qapi-visit-machine.h"
20 #include "qom/object_interfaces.h"
21 #include "sysemu/cpus.h"
22 #include "sysemu/sysemu.h"
23 #include "sysemu/reset.h"
24 #include "sysemu/runstate.h"
25 #include "sysemu/xen.h"
26 #include "sysemu/qtest.h"
27 #include "hw/pci/pci_bridge.h"
28 #include "hw/mem/nvdimm.h"
29 #include "migration/global_state.h"
30 #include "exec/confidential-guest-support.h"
31 #include "hw/virtio/virtio-pci.h"
32 #include "hw/virtio/virtio-net.h"
33 #include "audio/audio.h"
35 GlobalProperty hw_compat_8_1
[] = {
36 { TYPE_PCI_BRIDGE
, "x-pci-express-writeable-slt-bug", "true" },
37 { "ramfb", "x-migrate", "off" },
38 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" }
40 const size_t hw_compat_8_1_len
= G_N_ELEMENTS(hw_compat_8_1
);
42 GlobalProperty hw_compat_8_0
[] = {
43 { "migration", "multifd-flush-after-each-section", "on"},
44 { TYPE_PCI_DEVICE
, "x-pcie-ari-nextfn-1", "on" },
45 { TYPE_VIRTIO_NET
, "host_uso", "off"},
46 { TYPE_VIRTIO_NET
, "guest_uso4", "off"},
47 { TYPE_VIRTIO_NET
, "guest_uso6", "off"},
49 const size_t hw_compat_8_0_len
= G_N_ELEMENTS(hw_compat_8_0
);
51 GlobalProperty hw_compat_7_2
[] = {
52 { "e1000e", "migrate-timadj", "off" },
53 { "virtio-mem", "x-early-migration", "false" },
54 { "migration", "x-preempt-pre-7-2", "true" },
55 { TYPE_PCI_DEVICE
, "x-pcie-err-unc-mask", "off" },
57 const size_t hw_compat_7_2_len
= G_N_ELEMENTS(hw_compat_7_2
);
59 GlobalProperty hw_compat_7_1
[] = {
60 { "virtio-device", "queue_reset", "false" },
61 { "virtio-rng-pci", "vectors", "0" },
62 { "virtio-rng-pci-transitional", "vectors", "0" },
63 { "virtio-rng-pci-non-transitional", "vectors", "0" },
65 const size_t hw_compat_7_1_len
= G_N_ELEMENTS(hw_compat_7_1
);
67 GlobalProperty hw_compat_7_0
[] = {
68 { "arm-gicv3-common", "force-8-bit-prio", "on" },
69 { "nvme-ns", "eui64-default", "on"},
71 const size_t hw_compat_7_0_len
= G_N_ELEMENTS(hw_compat_7_0
);
73 GlobalProperty hw_compat_6_2
[] = {
74 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
76 const size_t hw_compat_6_2_len
= G_N_ELEMENTS(hw_compat_6_2
);
78 GlobalProperty hw_compat_6_1
[] = {
79 { "vhost-user-vsock-device", "seqpacket", "off" },
80 { "nvme-ns", "shared", "off" },
82 const size_t hw_compat_6_1_len
= G_N_ELEMENTS(hw_compat_6_1
);
84 GlobalProperty hw_compat_6_0
[] = {
85 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
86 { "i8042", "extended-state", "false"},
87 { "nvme-ns", "eui64-default", "off"},
88 { "e1000", "init-vet", "off" },
89 { "e1000e", "init-vet", "off" },
90 { "vhost-vsock-device", "seqpacket", "off" },
92 const size_t hw_compat_6_0_len
= G_N_ELEMENTS(hw_compat_6_0
);
94 GlobalProperty hw_compat_5_2
[] = {
95 { "ICH9-LPC", "smm-compat", "on"},
96 { "PIIX4_PM", "smm-compat", "on"},
97 { "virtio-blk-device", "report-discard-granularity", "off" },
98 { "virtio-net-pci-base", "vectors", "3"},
100 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
102 GlobalProperty hw_compat_5_1
[] = {
103 { "vhost-scsi", "num_queues", "1"},
104 { "vhost-user-blk", "num-queues", "1"},
105 { "vhost-user-scsi", "num_queues", "1"},
106 { "virtio-blk-device", "num-queues", "1"},
107 { "virtio-scsi-device", "num_queues", "1"},
108 { "nvme", "use-intel-id", "on"},
109 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
110 { "pl011", "migrate-clk", "off" },
111 { "virtio-pci", "x-ats-page-aligned", "off"},
113 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
115 GlobalProperty hw_compat_5_0
[] = {
116 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
117 { "virtio-balloon-device", "page-poison", "false" },
118 { "vmport", "x-read-set-eax", "off" },
119 { "vmport", "x-signal-unsupported-cmd", "off" },
120 { "vmport", "x-report-vmx-type", "off" },
121 { "vmport", "x-cmds-v2", "off" },
122 { "virtio-device", "x-disable-legacy-check", "true" },
124 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
126 GlobalProperty hw_compat_4_2
[] = {
127 { "virtio-blk-device", "queue-size", "128"},
128 { "virtio-scsi-device", "virtqueue_size", "128"},
129 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
130 { "virtio-blk-device", "seg-max-adjust", "off"},
131 { "virtio-scsi-device", "seg_max_adjust", "off"},
132 { "vhost-blk-device", "seg_max_adjust", "off"},
133 { "usb-host", "suppress-remote-wake", "off" },
134 { "usb-redir", "suppress-remote-wake", "off" },
135 { "qxl", "revision", "4" },
136 { "qxl-vga", "revision", "4" },
137 { "fw_cfg", "acpi-mr-restore", "false" },
138 { "virtio-device", "use-disabled-flag", "false" },
140 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
142 GlobalProperty hw_compat_4_1
[] = {
143 { "virtio-pci", "x-pcie-flr-init", "off" },
145 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
147 GlobalProperty hw_compat_4_0
[] = {
148 { "VGA", "edid", "false" },
149 { "secondary-vga", "edid", "false" },
150 { "bochs-display", "edid", "false" },
151 { "virtio-vga", "edid", "false" },
152 { "virtio-gpu-device", "edid", "false" },
153 { "virtio-device", "use-started", "false" },
154 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
155 { "pl031", "migrate-tick-offset", "false" },
157 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
159 GlobalProperty hw_compat_3_1
[] = {
160 { "pcie-root-port", "x-speed", "2_5" },
161 { "pcie-root-port", "x-width", "1" },
162 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
163 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
164 { "tpm-crb", "ppi", "false" },
165 { "tpm-tis", "ppi", "false" },
166 { "usb-kbd", "serial", "42" },
167 { "usb-mouse", "serial", "42" },
168 { "usb-tablet", "serial", "42" },
169 { "virtio-blk-device", "discard", "false" },
170 { "virtio-blk-device", "write-zeroes", "false" },
171 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
172 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
174 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
176 GlobalProperty hw_compat_3_0
[] = {};
177 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
179 GlobalProperty hw_compat_2_12
[] = {
180 { "migration", "decompress-error-check", "off" },
181 { "hda-audio", "use-timer", "false" },
182 { "cirrus-vga", "global-vmstate", "true" },
183 { "VGA", "global-vmstate", "true" },
184 { "vmware-svga", "global-vmstate", "true" },
185 { "qxl-vga", "global-vmstate", "true" },
187 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
189 GlobalProperty hw_compat_2_11
[] = {
190 { "hpet", "hpet-offset-saved", "false" },
191 { "virtio-blk-pci", "vectors", "2" },
192 { "vhost-user-blk-pci", "vectors", "2" },
193 { "e1000", "migrate_tso_props", "off" },
195 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
197 GlobalProperty hw_compat_2_10
[] = {
198 { "virtio-mouse-device", "wheel-axis", "false" },
199 { "virtio-tablet-device", "wheel-axis", "false" },
201 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
203 GlobalProperty hw_compat_2_9
[] = {
204 { "pci-bridge", "shpc", "off" },
205 { "intel-iommu", "pt", "off" },
206 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
207 { "pcie-root-port", "x-migrate-msix", "false" },
209 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
211 GlobalProperty hw_compat_2_8
[] = {
212 { "fw_cfg_mem", "x-file-slots", "0x10" },
213 { "fw_cfg_io", "x-file-slots", "0x10" },
214 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
215 { "pci-bridge", "shpc", "on" },
216 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
217 { "virtio-pci", "x-pcie-deverr-init", "off" },
218 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
219 { "virtio-pci", "x-pcie-pm-init", "off" },
220 { "cirrus-vga", "vgamem_mb", "8" },
221 { "isa-cirrus-vga", "vgamem_mb", "8" },
223 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
225 GlobalProperty hw_compat_2_7
[] = {
226 { "virtio-pci", "page-per-vq", "on" },
227 { "virtio-serial-device", "emergency-write", "off" },
228 { "ioapic", "version", "0x11" },
229 { "intel-iommu", "x-buggy-eim", "true" },
230 { "virtio-pci", "x-ignore-backend-features", "on" },
232 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
234 GlobalProperty hw_compat_2_6
[] = {
235 { "virtio-mmio", "format_transport_address", "off" },
236 /* Optional because not all virtio-pci devices support legacy mode */
237 { "virtio-pci", "disable-modern", "on", .optional
= true },
238 { "virtio-pci", "disable-legacy", "off", .optional
= true },
240 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
242 GlobalProperty hw_compat_2_5
[] = {
243 { "isa-fdc", "fallback", "144" },
244 { "pvscsi", "x-old-pci-configuration", "on" },
245 { "pvscsi", "x-disable-pcie", "on" },
246 { "vmxnet3", "x-old-msi-offsets", "on" },
247 { "vmxnet3", "x-disable-pcie", "on" },
249 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
251 GlobalProperty hw_compat_2_4
[] = {
252 /* Optional because the 'scsi' property is Linux-only */
253 { "virtio-blk-device", "scsi", "true", .optional
= true },
254 { "e1000", "extra_mac_registers", "off" },
255 { "virtio-pci", "x-disable-pcie", "on" },
256 { "virtio-pci", "migrate-extra", "off" },
257 { "fw_cfg_mem", "dma_enabled", "off" },
258 { "fw_cfg_io", "dma_enabled", "off" }
260 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
262 GlobalProperty hw_compat_2_3
[] = {
263 { "virtio-blk-pci", "any_layout", "off" },
264 { "virtio-balloon-pci", "any_layout", "off" },
265 { "virtio-serial-pci", "any_layout", "off" },
266 { "virtio-9p-pci", "any_layout", "off" },
267 { "virtio-rng-pci", "any_layout", "off" },
268 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
269 { "migration", "send-configuration", "off" },
270 { "migration", "send-section-footer", "off" },
271 { "migration", "store-global-state", "off" },
273 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
275 GlobalProperty hw_compat_2_2
[] = {};
276 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
278 GlobalProperty hw_compat_2_1
[] = {
279 { "intel-hda", "old_msi_addr", "on" },
280 { "VGA", "qemu-extended-regs", "off" },
281 { "secondary-vga", "qemu-extended-regs", "off" },
282 { "virtio-scsi-pci", "any_layout", "off" },
283 { "usb-mouse", "usb_version", "1" },
284 { "usb-kbd", "usb_version", "1" },
285 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
287 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
289 MachineState
*current_machine
;
291 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
293 MachineState
*ms
= MACHINE(obj
);
295 return g_strdup(ms
->kernel_filename
);
298 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
300 MachineState
*ms
= MACHINE(obj
);
302 g_free(ms
->kernel_filename
);
303 ms
->kernel_filename
= g_strdup(value
);
306 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
308 MachineState
*ms
= MACHINE(obj
);
310 return g_strdup(ms
->initrd_filename
);
313 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
315 MachineState
*ms
= MACHINE(obj
);
317 g_free(ms
->initrd_filename
);
318 ms
->initrd_filename
= g_strdup(value
);
321 static char *machine_get_append(Object
*obj
, Error
**errp
)
323 MachineState
*ms
= MACHINE(obj
);
325 return g_strdup(ms
->kernel_cmdline
);
328 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
330 MachineState
*ms
= MACHINE(obj
);
332 g_free(ms
->kernel_cmdline
);
333 ms
->kernel_cmdline
= g_strdup(value
);
336 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
338 MachineState
*ms
= MACHINE(obj
);
340 return g_strdup(ms
->dtb
);
343 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
345 MachineState
*ms
= MACHINE(obj
);
348 ms
->dtb
= g_strdup(value
);
351 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
353 MachineState
*ms
= MACHINE(obj
);
355 return g_strdup(ms
->dumpdtb
);
358 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
360 MachineState
*ms
= MACHINE(obj
);
363 ms
->dumpdtb
= g_strdup(value
);
366 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
367 const char *name
, void *opaque
,
370 MachineState
*ms
= MACHINE(obj
);
371 int64_t value
= ms
->phandle_start
;
373 visit_type_int(v
, name
, &value
, errp
);
376 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
377 const char *name
, void *opaque
,
380 MachineState
*ms
= MACHINE(obj
);
383 if (!visit_type_int(v
, name
, &value
, errp
)) {
387 ms
->phandle_start
= value
;
390 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
392 MachineState
*ms
= MACHINE(obj
);
394 return g_strdup(ms
->dt_compatible
);
397 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
399 MachineState
*ms
= MACHINE(obj
);
401 g_free(ms
->dt_compatible
);
402 ms
->dt_compatible
= g_strdup(value
);
405 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
407 MachineState
*ms
= MACHINE(obj
);
409 return ms
->dump_guest_core
;
412 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
414 MachineState
*ms
= MACHINE(obj
);
416 ms
->dump_guest_core
= value
;
419 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
421 MachineState
*ms
= MACHINE(obj
);
423 return ms
->mem_merge
;
426 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
428 MachineState
*ms
= MACHINE(obj
);
430 ms
->mem_merge
= value
;
433 static bool machine_get_usb(Object
*obj
, Error
**errp
)
435 MachineState
*ms
= MACHINE(obj
);
440 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
442 MachineState
*ms
= MACHINE(obj
);
445 ms
->usb_disabled
= !value
;
448 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
450 MachineState
*ms
= MACHINE(obj
);
452 return ms
->enable_graphics
;
455 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
457 MachineState
*ms
= MACHINE(obj
);
459 ms
->enable_graphics
= value
;
462 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
464 MachineState
*ms
= MACHINE(obj
);
466 return g_strdup(ms
->firmware
);
469 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
471 MachineState
*ms
= MACHINE(obj
);
473 g_free(ms
->firmware
);
474 ms
->firmware
= g_strdup(value
);
477 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
479 MachineState
*ms
= MACHINE(obj
);
481 ms
->suppress_vmdesc
= value
;
484 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
486 MachineState
*ms
= MACHINE(obj
);
488 return ms
->suppress_vmdesc
;
491 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
493 MachineState
*ms
= MACHINE(obj
);
496 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
502 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
506 object_resolve_path_component(object_get_objects_root(), value
);
509 error_setg(errp
, "No such memory encryption object '%s'", value
);
513 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
516 static void machine_check_confidential_guest_support(const Object
*obj
,
522 * So far the only constraint is that the target has the
523 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
528 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
530 MachineState
*ms
= MACHINE(obj
);
532 return ms
->nvdimms_state
->is_enabled
;
535 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
537 MachineState
*ms
= MACHINE(obj
);
539 ms
->nvdimms_state
->is_enabled
= value
;
542 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
544 MachineState
*ms
= MACHINE(obj
);
546 return ms
->numa_state
->hmat_enabled
;
549 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
551 MachineState
*ms
= MACHINE(obj
);
553 ms
->numa_state
->hmat_enabled
= value
;
556 static void machine_get_mem(Object
*obj
, Visitor
*v
, const char *name
,
557 void *opaque
, Error
**errp
)
559 MachineState
*ms
= MACHINE(obj
);
560 MemorySizeConfiguration mem
= {
562 .size
= ms
->ram_size
,
563 .has_max_size
= !!ms
->ram_slots
,
564 .max_size
= ms
->maxram_size
,
565 .has_slots
= !!ms
->ram_slots
,
566 .slots
= ms
->ram_slots
,
568 MemorySizeConfiguration
*p_mem
= &mem
;
570 visit_type_MemorySizeConfiguration(v
, name
, &p_mem
, &error_abort
);
573 static void machine_set_mem(Object
*obj
, Visitor
*v
, const char *name
,
574 void *opaque
, Error
**errp
)
577 MachineState
*ms
= MACHINE(obj
);
578 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
579 MemorySizeConfiguration
*mem
;
581 if (!visit_type_MemorySizeConfiguration(v
, name
, &mem
, errp
)) {
585 if (!mem
->has_size
) {
586 mem
->has_size
= true;
587 mem
->size
= mc
->default_ram_size
;
589 mem
->size
= QEMU_ALIGN_UP(mem
->size
, 8192);
590 if (mc
->fixup_ram_size
) {
591 mem
->size
= mc
->fixup_ram_size(mem
->size
);
593 if ((ram_addr_t
)mem
->size
!= mem
->size
) {
594 error_setg(errp
, "ram size too large");
598 if (mem
->has_max_size
) {
599 if (mem
->max_size
< mem
->size
) {
600 error_setg(errp
, "invalid value of maxmem: "
601 "maximum memory size (0x%" PRIx64
") must be at least "
602 "the initial memory size (0x%" PRIx64
")",
603 mem
->max_size
, mem
->size
);
606 if (mem
->has_slots
&& mem
->slots
&& mem
->max_size
== mem
->size
) {
607 error_setg(errp
, "invalid value of maxmem: "
608 "memory slots were specified but maximum memory size "
609 "(0x%" PRIx64
") is equal to the initial memory size "
610 "(0x%" PRIx64
")", mem
->max_size
, mem
->size
);
613 ms
->maxram_size
= mem
->max_size
;
615 if (mem
->has_slots
) {
616 error_setg(errp
, "slots specified but no max-size");
619 ms
->maxram_size
= mem
->size
;
621 ms
->ram_size
= mem
->size
;
622 ms
->ram_slots
= mem
->has_slots
? mem
->slots
: 0;
624 qapi_free_MemorySizeConfiguration(mem
);
627 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
629 MachineState
*ms
= MACHINE(obj
);
631 return g_strdup(ms
->nvdimms_state
->persistence_string
);
634 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
637 MachineState
*ms
= MACHINE(obj
);
638 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
640 if (strcmp(value
, "cpu") == 0) {
641 nvdimms_state
->persistence
= 3;
642 } else if (strcmp(value
, "mem-ctrl") == 0) {
643 nvdimms_state
->persistence
= 2;
645 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
650 g_free(nvdimms_state
->persistence_string
);
651 nvdimms_state
->persistence_string
= g_strdup(value
);
654 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
656 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
659 bool device_is_dynamic_sysbus(MachineClass
*mc
, DeviceState
*dev
)
661 Object
*obj
= OBJECT(dev
);
663 if (!object_dynamic_cast(obj
, TYPE_SYS_BUS_DEVICE
)) {
667 return device_type_is_dynamic_sysbus(mc
, object_get_typename(obj
));
670 bool device_type_is_dynamic_sysbus(MachineClass
*mc
, const char *type
)
672 bool allowed
= false;
674 ObjectClass
*klass
= object_class_by_name(type
);
676 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
679 allowed
|= !!object_class_dynamic_cast(klass
, wl
->value
);
685 static char *machine_get_audiodev(Object
*obj
, Error
**errp
)
687 MachineState
*ms
= MACHINE(obj
);
689 return g_strdup(ms
->audiodev
);
692 static void machine_set_audiodev(Object
*obj
, const char *value
,
695 MachineState
*ms
= MACHINE(obj
);
697 if (!audio_state_by_name(value
, errp
)) {
701 g_free(ms
->audiodev
);
702 ms
->audiodev
= g_strdup(value
);
705 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
708 HotpluggableCPUList
*head
= NULL
;
709 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
711 /* force board to initialize possible_cpus if it hasn't been done yet */
712 mc
->possible_cpu_arch_ids(machine
);
714 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
716 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
718 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
719 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
720 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
721 sizeof(*cpu_item
->props
));
723 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
725 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
727 QAPI_LIST_PREPEND(head
, cpu_item
);
733 * machine_set_cpu_numa_node:
734 * @machine: machine object to modify
735 * @props: specifies which cpu objects to assign to
736 * numa node specified by @props.node_id
737 * @errp: if an error occurs, a pointer to an area to store the error
739 * Associate NUMA node specified by @props.node_id with cpu slots that
740 * match socket/core/thread-ids specified by @props. It's recommended to use
741 * query-hotpluggable-cpus.props values to specify affected cpu slots,
742 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
744 * However for CLI convenience it's possible to pass in subset of properties,
745 * which would affect all cpu slots that match it.
747 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
748 * -numa cpu,node-id=0,socket_id=0 \
749 * -numa cpu,node-id=1,socket_id=1
750 * will assign all child cores of socket 0 to node 0 and
751 * of socket 1 to node 1.
753 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
755 * Empty subset is disallowed and function will return with error in this case.
757 void machine_set_cpu_numa_node(MachineState
*machine
,
758 const CpuInstanceProperties
*props
, Error
**errp
)
760 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
761 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
765 if (!mc
->possible_cpu_arch_ids
) {
766 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
770 /* disabling node mapping is not supported, forbid it */
771 assert(props
->has_node_id
);
773 /* force board to initialize possible_cpus if it hasn't been done yet */
774 mc
->possible_cpu_arch_ids(machine
);
776 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
777 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
779 /* reject unsupported by board properties */
780 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
781 error_setg(errp
, "thread-id is not supported");
785 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
786 error_setg(errp
, "core-id is not supported");
790 if (props
->has_cluster_id
&& !slot
->props
.has_cluster_id
) {
791 error_setg(errp
, "cluster-id is not supported");
795 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
796 error_setg(errp
, "socket-id is not supported");
800 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
801 error_setg(errp
, "die-id is not supported");
805 /* skip slots with explicit mismatch */
806 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
810 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
814 if (props
->has_cluster_id
&&
815 props
->cluster_id
!= slot
->props
.cluster_id
) {
819 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
823 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
827 /* reject assignment if slot is already assigned, for compatibility
828 * of legacy cpu_index mapping with SPAPR core based mapping do not
829 * error out if cpu thread and matched core have the same node-id */
830 if (slot
->props
.has_node_id
&&
831 slot
->props
.node_id
!= props
->node_id
) {
832 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
833 slot
->props
.node_id
);
837 /* assign slot to node as it's matched '-numa cpu' key */
839 slot
->props
.node_id
= props
->node_id
;
840 slot
->props
.has_node_id
= props
->has_node_id
;
842 if (machine
->numa_state
->hmat_enabled
) {
843 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
844 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
845 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
846 " should be itself (got %" PRIu16
")",
847 props
->node_id
, numa_info
[props
->node_id
].initiator
);
850 numa_info
[props
->node_id
].has_cpu
= true;
851 numa_info
[props
->node_id
].initiator
= props
->node_id
;
856 error_setg(errp
, "no match found");
860 static void machine_get_smp(Object
*obj
, Visitor
*v
, const char *name
,
861 void *opaque
, Error
**errp
)
863 MachineState
*ms
= MACHINE(obj
);
864 SMPConfiguration
*config
= &(SMPConfiguration
){
865 .has_cpus
= true, .cpus
= ms
->smp
.cpus
,
866 .has_drawers
= true, .drawers
= ms
->smp
.drawers
,
867 .has_books
= true, .books
= ms
->smp
.books
,
868 .has_sockets
= true, .sockets
= ms
->smp
.sockets
,
869 .has_dies
= true, .dies
= ms
->smp
.dies
,
870 .has_clusters
= true, .clusters
= ms
->smp
.clusters
,
871 .has_cores
= true, .cores
= ms
->smp
.cores
,
872 .has_threads
= true, .threads
= ms
->smp
.threads
,
873 .has_maxcpus
= true, .maxcpus
= ms
->smp
.max_cpus
,
876 if (!visit_type_SMPConfiguration(v
, name
, &config
, &error_abort
)) {
881 static void machine_set_smp(Object
*obj
, Visitor
*v
, const char *name
,
882 void *opaque
, Error
**errp
)
884 MachineState
*ms
= MACHINE(obj
);
885 g_autoptr(SMPConfiguration
) config
= NULL
;
887 if (!visit_type_SMPConfiguration(v
, name
, &config
, errp
)) {
891 machine_parse_smp_config(ms
, config
, errp
);
894 static void machine_get_boot(Object
*obj
, Visitor
*v
, const char *name
,
895 void *opaque
, Error
**errp
)
897 MachineState
*ms
= MACHINE(obj
);
898 BootConfiguration
*config
= &ms
->boot_config
;
899 visit_type_BootConfiguration(v
, name
, &config
, &error_abort
);
902 static void machine_free_boot_config(MachineState
*ms
)
904 g_free(ms
->boot_config
.order
);
905 g_free(ms
->boot_config
.once
);
906 g_free(ms
->boot_config
.splash
);
909 static void machine_copy_boot_config(MachineState
*ms
, BootConfiguration
*config
)
911 MachineClass
*machine_class
= MACHINE_GET_CLASS(ms
);
913 machine_free_boot_config(ms
);
914 ms
->boot_config
= *config
;
915 if (!config
->order
) {
916 ms
->boot_config
.order
= g_strdup(machine_class
->default_boot_order
);
920 static void machine_set_boot(Object
*obj
, Visitor
*v
, const char *name
,
921 void *opaque
, Error
**errp
)
924 MachineState
*ms
= MACHINE(obj
);
925 BootConfiguration
*config
= NULL
;
927 if (!visit_type_BootConfiguration(v
, name
, &config
, errp
)) {
931 validate_bootdevices(config
->order
, errp
);
937 validate_bootdevices(config
->once
, errp
);
943 machine_copy_boot_config(ms
, config
);
944 /* Strings live in ms->boot_config. */
949 qapi_free_BootConfiguration(config
);
952 void machine_add_audiodev_property(MachineClass
*mc
)
954 ObjectClass
*oc
= OBJECT_CLASS(mc
);
956 object_class_property_add_str(oc
, "audiodev",
957 machine_get_audiodev
,
958 machine_set_audiodev
);
959 object_class_property_set_description(oc
, "audiodev",
960 "Audiodev to use for default machine devices");
963 static void machine_class_init(ObjectClass
*oc
, void *data
)
965 MachineClass
*mc
= MACHINE_CLASS(oc
);
967 /* Default 128 MB as guest ram size */
968 mc
->default_ram_size
= 128 * MiB
;
969 mc
->rom_file_has_mr
= true;
971 /* numa node memory size aligned on 8MB by default.
972 * On Linux, each node's border has to be 8MB aligned
974 mc
->numa_mem_align_shift
= 23;
976 object_class_property_add_str(oc
, "kernel",
977 machine_get_kernel
, machine_set_kernel
);
978 object_class_property_set_description(oc
, "kernel",
979 "Linux kernel image file");
981 object_class_property_add_str(oc
, "initrd",
982 machine_get_initrd
, machine_set_initrd
);
983 object_class_property_set_description(oc
, "initrd",
984 "Linux initial ramdisk file");
986 object_class_property_add_str(oc
, "append",
987 machine_get_append
, machine_set_append
);
988 object_class_property_set_description(oc
, "append",
989 "Linux kernel command line");
991 object_class_property_add_str(oc
, "dtb",
992 machine_get_dtb
, machine_set_dtb
);
993 object_class_property_set_description(oc
, "dtb",
994 "Linux kernel device tree file");
996 object_class_property_add_str(oc
, "dumpdtb",
997 machine_get_dumpdtb
, machine_set_dumpdtb
);
998 object_class_property_set_description(oc
, "dumpdtb",
999 "Dump current dtb to a file and quit");
1001 object_class_property_add(oc
, "boot", "BootConfiguration",
1002 machine_get_boot
, machine_set_boot
,
1004 object_class_property_set_description(oc
, "boot",
1005 "Boot configuration");
1007 object_class_property_add(oc
, "smp", "SMPConfiguration",
1008 machine_get_smp
, machine_set_smp
,
1010 object_class_property_set_description(oc
, "smp",
1013 object_class_property_add(oc
, "phandle-start", "int",
1014 machine_get_phandle_start
, machine_set_phandle_start
,
1016 object_class_property_set_description(oc
, "phandle-start",
1017 "The first phandle ID we may generate dynamically");
1019 object_class_property_add_str(oc
, "dt-compatible",
1020 machine_get_dt_compatible
, machine_set_dt_compatible
);
1021 object_class_property_set_description(oc
, "dt-compatible",
1022 "Overrides the \"compatible\" property of the dt root node");
1024 object_class_property_add_bool(oc
, "dump-guest-core",
1025 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
1026 object_class_property_set_description(oc
, "dump-guest-core",
1027 "Include guest memory in a core dump");
1029 object_class_property_add_bool(oc
, "mem-merge",
1030 machine_get_mem_merge
, machine_set_mem_merge
);
1031 object_class_property_set_description(oc
, "mem-merge",
1032 "Enable/disable memory merge support");
1034 object_class_property_add_bool(oc
, "usb",
1035 machine_get_usb
, machine_set_usb
);
1036 object_class_property_set_description(oc
, "usb",
1037 "Set on/off to enable/disable usb");
1039 object_class_property_add_bool(oc
, "graphics",
1040 machine_get_graphics
, machine_set_graphics
);
1041 object_class_property_set_description(oc
, "graphics",
1042 "Set on/off to enable/disable graphics emulation");
1044 object_class_property_add_str(oc
, "firmware",
1045 machine_get_firmware
, machine_set_firmware
);
1046 object_class_property_set_description(oc
, "firmware",
1049 object_class_property_add_bool(oc
, "suppress-vmdesc",
1050 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
1051 object_class_property_set_description(oc
, "suppress-vmdesc",
1052 "Set on to disable self-describing migration");
1054 object_class_property_add_link(oc
, "confidential-guest-support",
1055 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
1056 offsetof(MachineState
, cgs
),
1057 machine_check_confidential_guest_support
,
1058 OBJ_PROP_LINK_STRONG
);
1059 object_class_property_set_description(oc
, "confidential-guest-support",
1060 "Set confidential guest scheme to support");
1062 /* For compatibility */
1063 object_class_property_add_str(oc
, "memory-encryption",
1064 machine_get_memory_encryption
, machine_set_memory_encryption
);
1065 object_class_property_set_description(oc
, "memory-encryption",
1066 "Set memory encryption object to use");
1068 object_class_property_add_link(oc
, "memory-backend", TYPE_MEMORY_BACKEND
,
1069 offsetof(MachineState
, memdev
), object_property_allow_set_link
,
1070 OBJ_PROP_LINK_STRONG
);
1071 object_class_property_set_description(oc
, "memory-backend",
1073 "Valid value is ID of hostmem based backend");
1075 object_class_property_add(oc
, "memory", "MemorySizeConfiguration",
1076 machine_get_mem
, machine_set_mem
,
1078 object_class_property_set_description(oc
, "memory",
1079 "Memory size configuration");
1082 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
1084 MachineClass
*mc
= MACHINE_CLASS(oc
);
1085 mc
->max_cpus
= mc
->max_cpus
?: 1;
1086 mc
->min_cpus
= mc
->min_cpus
?: 1;
1087 mc
->default_cpus
= mc
->default_cpus
?: 1;
1089 if (!object_class_is_abstract(oc
)) {
1090 const char *cname
= object_class_get_name(oc
);
1091 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
1092 mc
->name
= g_strndup(cname
,
1093 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
1094 mc
->compat_props
= g_ptr_array_new();
1098 static void machine_initfn(Object
*obj
)
1100 MachineState
*ms
= MACHINE(obj
);
1101 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
1103 container_get(obj
, "/peripheral");
1104 container_get(obj
, "/peripheral-anon");
1106 ms
->dump_guest_core
= true;
1107 ms
->mem_merge
= true;
1108 ms
->enable_graphics
= true;
1109 ms
->kernel_cmdline
= g_strdup("");
1110 ms
->ram_size
= mc
->default_ram_size
;
1111 ms
->maxram_size
= mc
->default_ram_size
;
1113 if (mc
->nvdimm_supported
) {
1114 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
1115 object_property_add_bool(obj
, "nvdimm",
1116 machine_get_nvdimm
, machine_set_nvdimm
);
1117 object_property_set_description(obj
, "nvdimm",
1118 "Set on/off to enable/disable "
1119 "NVDIMM instantiation");
1121 object_property_add_str(obj
, "nvdimm-persistence",
1122 machine_get_nvdimm_persistence
,
1123 machine_set_nvdimm_persistence
);
1124 object_property_set_description(obj
, "nvdimm-persistence",
1125 "Set NVDIMM persistence"
1126 "Valid values are cpu, mem-ctrl");
1129 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
1130 ms
->numa_state
= g_new0(NumaState
, 1);
1131 object_property_add_bool(obj
, "hmat",
1132 machine_get_hmat
, machine_set_hmat
);
1133 object_property_set_description(obj
, "hmat",
1134 "Set on/off to enable/disable "
1135 "ACPI Heterogeneous Memory Attribute "
1139 /* default to mc->default_cpus */
1140 ms
->smp
.cpus
= mc
->default_cpus
;
1141 ms
->smp
.max_cpus
= mc
->default_cpus
;
1142 ms
->smp
.drawers
= 1;
1144 ms
->smp
.sockets
= 1;
1146 ms
->smp
.clusters
= 1;
1148 ms
->smp
.threads
= 1;
1150 machine_copy_boot_config(ms
, &(BootConfiguration
){ 0 });
1153 static void machine_finalize(Object
*obj
)
1155 MachineState
*ms
= MACHINE(obj
);
1157 machine_free_boot_config(ms
);
1158 g_free(ms
->kernel_filename
);
1159 g_free(ms
->initrd_filename
);
1160 g_free(ms
->kernel_cmdline
);
1162 g_free(ms
->dumpdtb
);
1163 g_free(ms
->dt_compatible
);
1164 g_free(ms
->firmware
);
1165 g_free(ms
->device_memory
);
1166 g_free(ms
->nvdimms_state
);
1167 g_free(ms
->numa_state
);
1168 g_free(ms
->audiodev
);
1171 bool machine_usb(MachineState
*machine
)
1173 return machine
->usb
;
1176 int machine_phandle_start(MachineState
*machine
)
1178 return machine
->phandle_start
;
1181 bool machine_dump_guest_core(MachineState
*machine
)
1183 return machine
->dump_guest_core
;
1186 bool machine_mem_merge(MachineState
*machine
)
1188 return machine
->mem_merge
;
1191 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
1193 GString
*s
= g_string_new(NULL
);
1194 if (cpu
->props
.has_socket_id
) {
1195 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1197 if (cpu
->props
.has_die_id
) {
1199 g_string_append_printf(s
, ", ");
1201 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1203 if (cpu
->props
.has_cluster_id
) {
1205 g_string_append_printf(s
, ", ");
1207 g_string_append_printf(s
, "cluster-id: %"PRId64
, cpu
->props
.cluster_id
);
1209 if (cpu
->props
.has_core_id
) {
1211 g_string_append_printf(s
, ", ");
1213 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1215 if (cpu
->props
.has_thread_id
) {
1217 g_string_append_printf(s
, ", ");
1219 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1221 return g_string_free(s
, false);
1224 static void numa_validate_initiator(NumaState
*numa_state
)
1227 NodeInfo
*numa_info
= numa_state
->nodes
;
1229 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1230 if (numa_info
[i
].initiator
== MAX_NODES
) {
1234 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1235 error_report("NUMA node %" PRIu16
" is missing, use "
1236 "'-numa node' option to declare it first",
1237 numa_info
[i
].initiator
);
1241 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1242 error_report("The initiator of NUMA node %d is invalid", i
);
1248 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1251 bool default_mapping
;
1252 GString
*s
= g_string_new(NULL
);
1253 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1254 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1256 assert(machine
->numa_state
->num_nodes
);
1257 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1258 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1262 default_mapping
= (i
== possible_cpus
->len
);
1264 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1265 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1267 if (!cpu_slot
->props
.has_node_id
) {
1268 /* fetch default mapping from board and enable it */
1269 CpuInstanceProperties props
= cpu_slot
->props
;
1271 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1272 if (!default_mapping
) {
1273 /* record slots with not set mapping,
1274 * TODO: make it hard error in future */
1275 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1276 g_string_append_printf(s
, "%sCPU %d [%s]",
1277 s
->len
? ", " : "", i
, cpu_str
);
1280 /* non mapped cpus used to fallback to node 0 */
1284 props
.has_node_id
= true;
1285 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1289 if (machine
->numa_state
->hmat_enabled
) {
1290 numa_validate_initiator(machine
->numa_state
);
1293 if (s
->len
&& !qtest_enabled()) {
1294 warn_report("CPU(s) not present in any NUMA nodes: %s",
1296 warn_report("All CPU(s) up to maxcpus should be described "
1297 "in NUMA config, ability to start up with partial NUMA "
1298 "mappings is obsoleted and will be removed in future");
1300 g_string_free(s
, true);
1303 static void validate_cpu_cluster_to_numa_boundary(MachineState
*ms
)
1305 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1306 NumaState
*state
= ms
->numa_state
;
1307 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
1308 const CPUArchId
*cpus
= possible_cpus
->cpus
;
1311 if (state
->num_nodes
<= 1 || possible_cpus
->len
<= 1) {
1316 * The Linux scheduling domain can't be parsed when the multiple CPUs
1317 * in one cluster have been associated with different NUMA nodes. However,
1318 * it's fine to associate one NUMA node with CPUs in different clusters.
1320 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1321 for (j
= i
+ 1; j
< possible_cpus
->len
; j
++) {
1322 if (cpus
[i
].props
.has_socket_id
&&
1323 cpus
[i
].props
.has_cluster_id
&&
1324 cpus
[i
].props
.has_node_id
&&
1325 cpus
[j
].props
.has_socket_id
&&
1326 cpus
[j
].props
.has_cluster_id
&&
1327 cpus
[j
].props
.has_node_id
&&
1328 cpus
[i
].props
.socket_id
== cpus
[j
].props
.socket_id
&&
1329 cpus
[i
].props
.cluster_id
== cpus
[j
].props
.cluster_id
&&
1330 cpus
[i
].props
.node_id
!= cpus
[j
].props
.node_id
) {
1331 warn_report("CPU-%d and CPU-%d in socket-%" PRId64
"-cluster-%" PRId64
1332 " have been associated with node-%" PRId64
" and node-%" PRId64
1333 " respectively. It can cause OSes like Linux to"
1334 " misbehave", i
, j
, cpus
[i
].props
.socket_id
,
1335 cpus
[i
].props
.cluster_id
, cpus
[i
].props
.node_id
,
1336 cpus
[j
].props
.node_id
);
1342 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1343 HostMemoryBackend
*backend
)
1345 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1347 if (host_memory_backend_is_mapped(backend
)) {
1348 error_report("memory backend %s can't be used multiple times.",
1349 object_get_canonical_path_component(OBJECT(backend
)));
1352 host_memory_backend_set_mapped(backend
, true);
1353 vmstate_register_ram_global(ret
);
1357 static bool create_default_memdev(MachineState
*ms
, const char *path
, Error
**errp
)
1360 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1363 obj
= object_new(path
? TYPE_MEMORY_BACKEND_FILE
: TYPE_MEMORY_BACKEND_RAM
);
1365 if (!object_property_set_str(obj
, "mem-path", path
, errp
)) {
1369 if (!object_property_set_int(obj
, "size", ms
->ram_size
, errp
)) {
1372 object_property_add_child(object_get_objects_root(), mc
->default_ram_id
,
1374 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1375 if (!object_property_set_bool(obj
, "x-use-canonical-path-for-ramblock-id",
1379 if (!user_creatable_complete(USER_CREATABLE(obj
), errp
)) {
1382 r
= object_property_set_link(OBJECT(ms
), "memory-backend", obj
, errp
);
1390 void machine_run_board_init(MachineState
*machine
, const char *mem_path
, Error
**errp
)
1393 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1394 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1397 /* This checkpoint is required by replay to separate prior clock
1398 reading from the other reads, because timer polling functions query
1399 clock values from the log. */
1400 replay_checkpoint(CHECKPOINT_INIT
);
1402 if (!xen_enabled()) {
1403 /* On 32-bit hosts, QEMU is limited by virtual address space */
1404 if (machine
->ram_size
> (2047 << 20) && HOST_LONG_BITS
== 32) {
1405 error_setg(errp
, "at most 2047 MB RAM can be simulated");
1410 if (machine
->memdev
) {
1411 ram_addr_t backend_size
= object_property_get_uint(OBJECT(machine
->memdev
),
1412 "size", &error_abort
);
1413 if (backend_size
!= machine
->ram_size
) {
1414 error_setg(errp
, "Machine memory size does not match the size of the memory backend");
1417 } else if (machine_class
->default_ram_id
&& machine
->ram_size
&&
1418 numa_uses_legacy_mem()) {
1419 if (object_property_find(object_get_objects_root(),
1420 machine_class
->default_ram_id
)) {
1421 error_setg(errp
, "object's id '%s' is reserved for the default"
1422 " RAM backend, it can't be used for any other purposes",
1423 machine_class
->default_ram_id
);
1424 error_append_hint(errp
,
1425 "Change the object's 'id' to something else or disable"
1426 " automatic creation of the default RAM backend by setting"
1427 " 'memory-backend=%s' with '-machine'.\n",
1428 machine_class
->default_ram_id
);
1431 if (!create_default_memdev(current_machine
, mem_path
, errp
)) {
1436 if (machine
->numa_state
) {
1437 numa_complete_configuration(machine
);
1438 if (machine
->numa_state
->num_nodes
) {
1439 machine_numa_finish_cpu_init(machine
);
1440 if (machine_class
->cpu_cluster_has_numa_boundary
) {
1441 validate_cpu_cluster_to_numa_boundary(machine
);
1446 if (!machine
->ram
&& machine
->memdev
) {
1447 machine
->ram
= machine_consume_memdev(machine
, machine
->memdev
);
1450 /* If the machine supports the valid_cpu_types check and the user
1451 * specified a CPU with -cpu check here that the user CPU is supported.
1453 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1456 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1457 if (object_class_dynamic_cast(oc
,
1458 machine_class
->valid_cpu_types
[i
])) {
1459 /* The user specified CPU is in the valid field, we are
1466 if (!machine_class
->valid_cpu_types
[i
]) {
1467 /* The user specified CPU is not valid */
1468 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1469 error_printf("The valid types are: %s",
1470 machine_class
->valid_cpu_types
[0]);
1471 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1472 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1480 /* Check if CPU type is deprecated and warn if so */
1482 if (cc
&& cc
->deprecation_note
) {
1483 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1484 cc
->deprecation_note
);
1489 * With confidential guests, the host can't see the real
1490 * contents of RAM, so there's no point in it trying to merge
1493 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1496 * Virtio devices can't count on directly accessing guest
1497 * memory, so they need iommu_platform=on to use normal DMA
1498 * mechanisms. That requires also disabling legacy virtio
1499 * support for those virtio pci devices which allow it.
1501 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1503 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1507 accel_init_interfaces(ACCEL_GET_CLASS(machine
->accelerator
));
1508 machine_class
->init(machine
);
1509 phase_advance(PHASE_MACHINE_INITIALIZED
);
1512 static NotifierList machine_init_done_notifiers
=
1513 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1515 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1517 notifier_list_add(&machine_init_done_notifiers
, notify
);
1518 if (phase_check(PHASE_MACHINE_READY
)) {
1519 notify
->notify(notify
, NULL
);
1523 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1525 notifier_remove(notify
);
1528 void qdev_machine_creation_done(void)
1530 cpu_synchronize_all_post_init();
1532 if (current_machine
->boot_config
.once
) {
1533 qemu_boot_set(current_machine
->boot_config
.once
, &error_fatal
);
1534 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_config
.order
));
1538 * ok, initial machine setup is done, starting from now we can
1539 * only create hotpluggable devices
1541 phase_advance(PHASE_MACHINE_READY
);
1542 qdev_assert_realized_properly();
1544 /* TODO: once all bus devices are qdevified, this should be done
1545 * when bus is created by qdev.c */
1547 * TODO: If we had a main 'reset container' that the whole system
1548 * lived in, we could reset that using the multi-phase reset
1549 * APIs. For the moment, we just reset the sysbus, which will cause
1550 * all devices hanging off it (and all their child buses, recursively)
1551 * to be reset. Note that this will *not* reset any Device objects
1552 * which are not attached to some part of the qbus tree!
1554 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1556 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1558 if (rom_check_and_register_reset() != 0) {
1564 /* This checkpoint is required by replay to separate prior clock
1565 reading from the other reads, because timer polling functions query
1566 clock values from the log. */
1567 replay_checkpoint(CHECKPOINT_RESET
);
1568 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1569 register_global_state();
1572 static const TypeInfo machine_info
= {
1573 .name
= TYPE_MACHINE
,
1574 .parent
= TYPE_OBJECT
,
1576 .class_size
= sizeof(MachineClass
),
1577 .class_init
= machine_class_init
,
1578 .class_base_init
= machine_class_base_init
,
1579 .instance_size
= sizeof(MachineState
),
1580 .instance_init
= machine_initfn
,
1581 .instance_finalize
= machine_finalize
,
1584 static void machine_register_types(void)
1586 type_register_static(&machine_info
);
1589 type_init(machine_register_types
)