4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "qom/object_interfaces.h"
25 #include "hw/sysbus.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "sysemu/numa.h"
31 #include "sysemu/xen.h"
32 #include "qemu/error-report.h"
33 #include "sysemu/qtest.h"
34 #include "hw/pci/pci.h"
35 #include "hw/mem/nvdimm.h"
36 #include "migration/global_state.h"
37 #include "migration/vmstate.h"
38 #include "exec/confidential-guest-support.h"
39 #include "hw/virtio/virtio.h"
40 #include "hw/virtio/virtio-pci.h"
41 #include "qom/object_interfaces.h"
43 GlobalProperty hw_compat_7_1
[] = {
44 { "virtio-device", "queue_reset", "false" },
46 const size_t hw_compat_7_1_len
= G_N_ELEMENTS(hw_compat_7_1
);
48 GlobalProperty hw_compat_7_0
[] = {
49 { "arm-gicv3-common", "force-8-bit-prio", "on" },
50 { "nvme-ns", "eui64-default", "on"},
52 const size_t hw_compat_7_0_len
= G_N_ELEMENTS(hw_compat_7_0
);
54 GlobalProperty hw_compat_6_2
[] = {
55 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
57 const size_t hw_compat_6_2_len
= G_N_ELEMENTS(hw_compat_6_2
);
59 GlobalProperty hw_compat_6_1
[] = {
60 { "vhost-user-vsock-device", "seqpacket", "off" },
61 { "nvme-ns", "shared", "off" },
63 const size_t hw_compat_6_1_len
= G_N_ELEMENTS(hw_compat_6_1
);
65 GlobalProperty hw_compat_6_0
[] = {
66 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
67 { "i8042", "extended-state", "false"},
68 { "nvme-ns", "eui64-default", "off"},
69 { "e1000", "init-vet", "off" },
70 { "e1000e", "init-vet", "off" },
71 { "vhost-vsock-device", "seqpacket", "off" },
73 const size_t hw_compat_6_0_len
= G_N_ELEMENTS(hw_compat_6_0
);
75 GlobalProperty hw_compat_5_2
[] = {
76 { "ICH9-LPC", "smm-compat", "on"},
77 { "PIIX4_PM", "smm-compat", "on"},
78 { "virtio-blk-device", "report-discard-granularity", "off" },
79 { "virtio-net-pci-base", "vectors", "3"},
81 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
83 GlobalProperty hw_compat_5_1
[] = {
84 { "vhost-scsi", "num_queues", "1"},
85 { "vhost-user-blk", "num-queues", "1"},
86 { "vhost-user-scsi", "num_queues", "1"},
87 { "virtio-blk-device", "num-queues", "1"},
88 { "virtio-scsi-device", "num_queues", "1"},
89 { "nvme", "use-intel-id", "on"},
90 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
91 { "pl011", "migrate-clk", "off" },
92 { "virtio-pci", "x-ats-page-aligned", "off"},
94 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
96 GlobalProperty hw_compat_5_0
[] = {
97 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
98 { "virtio-balloon-device", "page-poison", "false" },
99 { "vmport", "x-read-set-eax", "off" },
100 { "vmport", "x-signal-unsupported-cmd", "off" },
101 { "vmport", "x-report-vmx-type", "off" },
102 { "vmport", "x-cmds-v2", "off" },
103 { "virtio-device", "x-disable-legacy-check", "true" },
105 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
107 GlobalProperty hw_compat_4_2
[] = {
108 { "virtio-blk-device", "queue-size", "128"},
109 { "virtio-scsi-device", "virtqueue_size", "128"},
110 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
111 { "virtio-blk-device", "seg-max-adjust", "off"},
112 { "virtio-scsi-device", "seg_max_adjust", "off"},
113 { "vhost-blk-device", "seg_max_adjust", "off"},
114 { "usb-host", "suppress-remote-wake", "off" },
115 { "usb-redir", "suppress-remote-wake", "off" },
116 { "qxl", "revision", "4" },
117 { "qxl-vga", "revision", "4" },
118 { "fw_cfg", "acpi-mr-restore", "false" },
119 { "virtio-device", "use-disabled-flag", "false" },
121 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
123 GlobalProperty hw_compat_4_1
[] = {
124 { "virtio-pci", "x-pcie-flr-init", "off" },
126 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
128 GlobalProperty hw_compat_4_0
[] = {
129 { "VGA", "edid", "false" },
130 { "secondary-vga", "edid", "false" },
131 { "bochs-display", "edid", "false" },
132 { "virtio-vga", "edid", "false" },
133 { "virtio-gpu-device", "edid", "false" },
134 { "virtio-device", "use-started", "false" },
135 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
136 { "pl031", "migrate-tick-offset", "false" },
138 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
140 GlobalProperty hw_compat_3_1
[] = {
141 { "pcie-root-port", "x-speed", "2_5" },
142 { "pcie-root-port", "x-width", "1" },
143 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
144 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
145 { "tpm-crb", "ppi", "false" },
146 { "tpm-tis", "ppi", "false" },
147 { "usb-kbd", "serial", "42" },
148 { "usb-mouse", "serial", "42" },
149 { "usb-tablet", "serial", "42" },
150 { "virtio-blk-device", "discard", "false" },
151 { "virtio-blk-device", "write-zeroes", "false" },
152 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
153 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
155 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
157 GlobalProperty hw_compat_3_0
[] = {};
158 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
160 GlobalProperty hw_compat_2_12
[] = {
161 { "migration", "decompress-error-check", "off" },
162 { "hda-audio", "use-timer", "false" },
163 { "cirrus-vga", "global-vmstate", "true" },
164 { "VGA", "global-vmstate", "true" },
165 { "vmware-svga", "global-vmstate", "true" },
166 { "qxl-vga", "global-vmstate", "true" },
168 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
170 GlobalProperty hw_compat_2_11
[] = {
171 { "hpet", "hpet-offset-saved", "false" },
172 { "virtio-blk-pci", "vectors", "2" },
173 { "vhost-user-blk-pci", "vectors", "2" },
174 { "e1000", "migrate_tso_props", "off" },
176 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
178 GlobalProperty hw_compat_2_10
[] = {
179 { "virtio-mouse-device", "wheel-axis", "false" },
180 { "virtio-tablet-device", "wheel-axis", "false" },
182 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
184 GlobalProperty hw_compat_2_9
[] = {
185 { "pci-bridge", "shpc", "off" },
186 { "intel-iommu", "pt", "off" },
187 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
188 { "pcie-root-port", "x-migrate-msix", "false" },
190 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
192 GlobalProperty hw_compat_2_8
[] = {
193 { "fw_cfg_mem", "x-file-slots", "0x10" },
194 { "fw_cfg_io", "x-file-slots", "0x10" },
195 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
196 { "pci-bridge", "shpc", "on" },
197 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
198 { "virtio-pci", "x-pcie-deverr-init", "off" },
199 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
200 { "virtio-pci", "x-pcie-pm-init", "off" },
201 { "cirrus-vga", "vgamem_mb", "8" },
202 { "isa-cirrus-vga", "vgamem_mb", "8" },
204 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
206 GlobalProperty hw_compat_2_7
[] = {
207 { "virtio-pci", "page-per-vq", "on" },
208 { "virtio-serial-device", "emergency-write", "off" },
209 { "ioapic", "version", "0x11" },
210 { "intel-iommu", "x-buggy-eim", "true" },
211 { "virtio-pci", "x-ignore-backend-features", "on" },
213 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
215 GlobalProperty hw_compat_2_6
[] = {
216 { "virtio-mmio", "format_transport_address", "off" },
217 /* Optional because not all virtio-pci devices support legacy mode */
218 { "virtio-pci", "disable-modern", "on", .optional
= true },
219 { "virtio-pci", "disable-legacy", "off", .optional
= true },
221 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
223 GlobalProperty hw_compat_2_5
[] = {
224 { "isa-fdc", "fallback", "144" },
225 { "pvscsi", "x-old-pci-configuration", "on" },
226 { "pvscsi", "x-disable-pcie", "on" },
227 { "vmxnet3", "x-old-msi-offsets", "on" },
228 { "vmxnet3", "x-disable-pcie", "on" },
230 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
232 GlobalProperty hw_compat_2_4
[] = {
233 /* Optional because the 'scsi' property is Linux-only */
234 { "virtio-blk-device", "scsi", "true", .optional
= true },
235 { "e1000", "extra_mac_registers", "off" },
236 { "virtio-pci", "x-disable-pcie", "on" },
237 { "virtio-pci", "migrate-extra", "off" },
238 { "fw_cfg_mem", "dma_enabled", "off" },
239 { "fw_cfg_io", "dma_enabled", "off" }
241 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
243 GlobalProperty hw_compat_2_3
[] = {
244 { "virtio-blk-pci", "any_layout", "off" },
245 { "virtio-balloon-pci", "any_layout", "off" },
246 { "virtio-serial-pci", "any_layout", "off" },
247 { "virtio-9p-pci", "any_layout", "off" },
248 { "virtio-rng-pci", "any_layout", "off" },
249 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
250 { "migration", "send-configuration", "off" },
251 { "migration", "send-section-footer", "off" },
252 { "migration", "store-global-state", "off" },
254 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
256 GlobalProperty hw_compat_2_2
[] = {};
257 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
259 GlobalProperty hw_compat_2_1
[] = {
260 { "intel-hda", "old_msi_addr", "on" },
261 { "VGA", "qemu-extended-regs", "off" },
262 { "secondary-vga", "qemu-extended-regs", "off" },
263 { "virtio-scsi-pci", "any_layout", "off" },
264 { "usb-mouse", "usb_version", "1" },
265 { "usb-kbd", "usb_version", "1" },
266 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
268 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
270 MachineState
*current_machine
;
272 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
274 MachineState
*ms
= MACHINE(obj
);
276 return g_strdup(ms
->kernel_filename
);
279 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
281 MachineState
*ms
= MACHINE(obj
);
283 g_free(ms
->kernel_filename
);
284 ms
->kernel_filename
= g_strdup(value
);
287 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
289 MachineState
*ms
= MACHINE(obj
);
291 return g_strdup(ms
->initrd_filename
);
294 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
296 MachineState
*ms
= MACHINE(obj
);
298 g_free(ms
->initrd_filename
);
299 ms
->initrd_filename
= g_strdup(value
);
302 static char *machine_get_append(Object
*obj
, Error
**errp
)
304 MachineState
*ms
= MACHINE(obj
);
306 return g_strdup(ms
->kernel_cmdline
);
309 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
311 MachineState
*ms
= MACHINE(obj
);
313 g_free(ms
->kernel_cmdline
);
314 ms
->kernel_cmdline
= g_strdup(value
);
317 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
319 MachineState
*ms
= MACHINE(obj
);
321 return g_strdup(ms
->dtb
);
324 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
326 MachineState
*ms
= MACHINE(obj
);
329 ms
->dtb
= g_strdup(value
);
332 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
334 MachineState
*ms
= MACHINE(obj
);
336 return g_strdup(ms
->dumpdtb
);
339 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
341 MachineState
*ms
= MACHINE(obj
);
344 ms
->dumpdtb
= g_strdup(value
);
347 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
348 const char *name
, void *opaque
,
351 MachineState
*ms
= MACHINE(obj
);
352 int64_t value
= ms
->phandle_start
;
354 visit_type_int(v
, name
, &value
, errp
);
357 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
358 const char *name
, void *opaque
,
361 MachineState
*ms
= MACHINE(obj
);
364 if (!visit_type_int(v
, name
, &value
, errp
)) {
368 ms
->phandle_start
= value
;
371 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
373 MachineState
*ms
= MACHINE(obj
);
375 return g_strdup(ms
->dt_compatible
);
378 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
380 MachineState
*ms
= MACHINE(obj
);
382 g_free(ms
->dt_compatible
);
383 ms
->dt_compatible
= g_strdup(value
);
386 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
388 MachineState
*ms
= MACHINE(obj
);
390 return ms
->dump_guest_core
;
393 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
395 MachineState
*ms
= MACHINE(obj
);
397 ms
->dump_guest_core
= value
;
400 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
402 MachineState
*ms
= MACHINE(obj
);
404 return ms
->mem_merge
;
407 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
409 MachineState
*ms
= MACHINE(obj
);
411 ms
->mem_merge
= value
;
414 static bool machine_get_usb(Object
*obj
, Error
**errp
)
416 MachineState
*ms
= MACHINE(obj
);
421 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
423 MachineState
*ms
= MACHINE(obj
);
426 ms
->usb_disabled
= !value
;
429 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
431 MachineState
*ms
= MACHINE(obj
);
433 return ms
->enable_graphics
;
436 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
438 MachineState
*ms
= MACHINE(obj
);
440 ms
->enable_graphics
= value
;
443 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
445 MachineState
*ms
= MACHINE(obj
);
447 return g_strdup(ms
->firmware
);
450 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
452 MachineState
*ms
= MACHINE(obj
);
454 g_free(ms
->firmware
);
455 ms
->firmware
= g_strdup(value
);
458 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
460 MachineState
*ms
= MACHINE(obj
);
462 ms
->suppress_vmdesc
= value
;
465 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
467 MachineState
*ms
= MACHINE(obj
);
469 return ms
->suppress_vmdesc
;
472 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
474 MachineState
*ms
= MACHINE(obj
);
477 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
483 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
487 object_resolve_path_component(object_get_objects_root(), value
);
490 error_setg(errp
, "No such memory encryption object '%s'", value
);
494 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
497 static void machine_check_confidential_guest_support(const Object
*obj
,
503 * So far the only constraint is that the target has the
504 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
509 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
511 MachineState
*ms
= MACHINE(obj
);
513 return ms
->nvdimms_state
->is_enabled
;
516 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
518 MachineState
*ms
= MACHINE(obj
);
520 ms
->nvdimms_state
->is_enabled
= value
;
523 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
525 MachineState
*ms
= MACHINE(obj
);
527 return ms
->numa_state
->hmat_enabled
;
530 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
532 MachineState
*ms
= MACHINE(obj
);
534 ms
->numa_state
->hmat_enabled
= value
;
537 static void machine_get_mem(Object
*obj
, Visitor
*v
, const char *name
,
538 void *opaque
, Error
**errp
)
540 MachineState
*ms
= MACHINE(obj
);
541 MemorySizeConfiguration mem
= {
543 .size
= ms
->ram_size
,
544 .has_max_size
= !!ms
->ram_slots
,
545 .max_size
= ms
->maxram_size
,
546 .has_slots
= !!ms
->ram_slots
,
547 .slots
= ms
->ram_slots
,
549 MemorySizeConfiguration
*p_mem
= &mem
;
551 visit_type_MemorySizeConfiguration(v
, name
, &p_mem
, &error_abort
);
554 static void machine_set_mem(Object
*obj
, Visitor
*v
, const char *name
,
555 void *opaque
, Error
**errp
)
558 MachineState
*ms
= MACHINE(obj
);
559 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
560 MemorySizeConfiguration
*mem
;
562 if (!visit_type_MemorySizeConfiguration(v
, name
, &mem
, errp
)) {
566 if (!mem
->has_size
) {
567 mem
->has_size
= true;
568 mem
->size
= mc
->default_ram_size
;
570 mem
->size
= QEMU_ALIGN_UP(mem
->size
, 8192);
571 if (mc
->fixup_ram_size
) {
572 mem
->size
= mc
->fixup_ram_size(mem
->size
);
574 if ((ram_addr_t
)mem
->size
!= mem
->size
) {
575 error_setg(errp
, "ram size too large");
579 if (mem
->has_max_size
) {
580 if (mem
->max_size
< mem
->size
) {
581 error_setg(errp
, "invalid value of maxmem: "
582 "maximum memory size (0x%" PRIx64
") must be at least "
583 "the initial memory size (0x%" PRIx64
")",
584 mem
->max_size
, mem
->size
);
587 if (mem
->has_slots
&& mem
->slots
&& mem
->max_size
== mem
->size
) {
588 error_setg(errp
, "invalid value of maxmem: "
589 "memory slots were specified but maximum memory size "
590 "(0x%" PRIx64
") is equal to the initial memory size "
591 "(0x%" PRIx64
")", mem
->max_size
, mem
->size
);
594 ms
->maxram_size
= mem
->max_size
;
596 if (mem
->has_slots
) {
597 error_setg(errp
, "slots specified but no max-size");
600 ms
->maxram_size
= mem
->size
;
602 ms
->ram_size
= mem
->size
;
603 ms
->ram_slots
= mem
->has_slots
? mem
->slots
: 0;
605 qapi_free_MemorySizeConfiguration(mem
);
608 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
610 MachineState
*ms
= MACHINE(obj
);
612 return g_strdup(ms
->nvdimms_state
->persistence_string
);
615 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
618 MachineState
*ms
= MACHINE(obj
);
619 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
621 if (strcmp(value
, "cpu") == 0) {
622 nvdimms_state
->persistence
= 3;
623 } else if (strcmp(value
, "mem-ctrl") == 0) {
624 nvdimms_state
->persistence
= 2;
626 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
631 g_free(nvdimms_state
->persistence_string
);
632 nvdimms_state
->persistence_string
= g_strdup(value
);
635 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
637 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
640 bool device_is_dynamic_sysbus(MachineClass
*mc
, DeviceState
*dev
)
642 Object
*obj
= OBJECT(dev
);
644 if (!object_dynamic_cast(obj
, TYPE_SYS_BUS_DEVICE
)) {
648 return device_type_is_dynamic_sysbus(mc
, object_get_typename(obj
));
651 bool device_type_is_dynamic_sysbus(MachineClass
*mc
, const char *type
)
653 bool allowed
= false;
655 ObjectClass
*klass
= object_class_by_name(type
);
657 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
660 allowed
|= !!object_class_dynamic_cast(klass
, wl
->value
);
666 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
669 HotpluggableCPUList
*head
= NULL
;
670 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
672 /* force board to initialize possible_cpus if it hasn't been done yet */
673 mc
->possible_cpu_arch_ids(machine
);
675 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
677 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
679 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
680 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
681 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
682 sizeof(*cpu_item
->props
));
684 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
686 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
688 QAPI_LIST_PREPEND(head
, cpu_item
);
694 * machine_set_cpu_numa_node:
695 * @machine: machine object to modify
696 * @props: specifies which cpu objects to assign to
697 * numa node specified by @props.node_id
698 * @errp: if an error occurs, a pointer to an area to store the error
700 * Associate NUMA node specified by @props.node_id with cpu slots that
701 * match socket/core/thread-ids specified by @props. It's recommended to use
702 * query-hotpluggable-cpus.props values to specify affected cpu slots,
703 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
705 * However for CLI convenience it's possible to pass in subset of properties,
706 * which would affect all cpu slots that match it.
708 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
709 * -numa cpu,node-id=0,socket_id=0 \
710 * -numa cpu,node-id=1,socket_id=1
711 * will assign all child cores of socket 0 to node 0 and
712 * of socket 1 to node 1.
714 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
716 * Empty subset is disallowed and function will return with error in this case.
718 void machine_set_cpu_numa_node(MachineState
*machine
,
719 const CpuInstanceProperties
*props
, Error
**errp
)
721 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
722 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
726 if (!mc
->possible_cpu_arch_ids
) {
727 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
731 /* disabling node mapping is not supported, forbid it */
732 assert(props
->has_node_id
);
734 /* force board to initialize possible_cpus if it hasn't been done yet */
735 mc
->possible_cpu_arch_ids(machine
);
737 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
738 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
740 /* reject unsupported by board properties */
741 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
742 error_setg(errp
, "thread-id is not supported");
746 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
747 error_setg(errp
, "core-id is not supported");
751 if (props
->has_cluster_id
&& !slot
->props
.has_cluster_id
) {
752 error_setg(errp
, "cluster-id is not supported");
756 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
757 error_setg(errp
, "socket-id is not supported");
761 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
762 error_setg(errp
, "die-id is not supported");
766 /* skip slots with explicit mismatch */
767 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
771 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
775 if (props
->has_cluster_id
&&
776 props
->cluster_id
!= slot
->props
.cluster_id
) {
780 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
784 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
788 /* reject assignment if slot is already assigned, for compatibility
789 * of legacy cpu_index mapping with SPAPR core based mapping do not
790 * error out if cpu thread and matched core have the same node-id */
791 if (slot
->props
.has_node_id
&&
792 slot
->props
.node_id
!= props
->node_id
) {
793 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
794 slot
->props
.node_id
);
798 /* assign slot to node as it's matched '-numa cpu' key */
800 slot
->props
.node_id
= props
->node_id
;
801 slot
->props
.has_node_id
= props
->has_node_id
;
803 if (machine
->numa_state
->hmat_enabled
) {
804 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
805 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
806 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
807 " should be itself (got %" PRIu16
")",
808 props
->node_id
, numa_info
[props
->node_id
].initiator
);
811 numa_info
[props
->node_id
].has_cpu
= true;
812 numa_info
[props
->node_id
].initiator
= props
->node_id
;
817 error_setg(errp
, "no match found");
821 static void machine_get_smp(Object
*obj
, Visitor
*v
, const char *name
,
822 void *opaque
, Error
**errp
)
824 MachineState
*ms
= MACHINE(obj
);
825 SMPConfiguration
*config
= &(SMPConfiguration
){
826 .has_cpus
= true, .cpus
= ms
->smp
.cpus
,
827 .has_sockets
= true, .sockets
= ms
->smp
.sockets
,
828 .has_dies
= true, .dies
= ms
->smp
.dies
,
829 .has_clusters
= true, .clusters
= ms
->smp
.clusters
,
830 .has_cores
= true, .cores
= ms
->smp
.cores
,
831 .has_threads
= true, .threads
= ms
->smp
.threads
,
832 .has_maxcpus
= true, .maxcpus
= ms
->smp
.max_cpus
,
835 if (!visit_type_SMPConfiguration(v
, name
, &config
, &error_abort
)) {
840 static void machine_set_smp(Object
*obj
, Visitor
*v
, const char *name
,
841 void *opaque
, Error
**errp
)
843 MachineState
*ms
= MACHINE(obj
);
844 g_autoptr(SMPConfiguration
) config
= NULL
;
846 if (!visit_type_SMPConfiguration(v
, name
, &config
, errp
)) {
850 machine_parse_smp_config(ms
, config
, errp
);
853 static void machine_get_boot(Object
*obj
, Visitor
*v
, const char *name
,
854 void *opaque
, Error
**errp
)
856 MachineState
*ms
= MACHINE(obj
);
857 BootConfiguration
*config
= &ms
->boot_config
;
858 visit_type_BootConfiguration(v
, name
, &config
, &error_abort
);
861 static void machine_free_boot_config(MachineState
*ms
)
863 g_free(ms
->boot_config
.order
);
864 g_free(ms
->boot_config
.once
);
865 g_free(ms
->boot_config
.splash
);
868 static void machine_copy_boot_config(MachineState
*ms
, BootConfiguration
*config
)
870 MachineClass
*machine_class
= MACHINE_GET_CLASS(ms
);
872 machine_free_boot_config(ms
);
873 ms
->boot_config
= *config
;
874 if (!config
->order
) {
875 ms
->boot_config
.order
= g_strdup(machine_class
->default_boot_order
);
879 static void machine_set_boot(Object
*obj
, Visitor
*v
, const char *name
,
880 void *opaque
, Error
**errp
)
883 MachineState
*ms
= MACHINE(obj
);
884 BootConfiguration
*config
= NULL
;
886 if (!visit_type_BootConfiguration(v
, name
, &config
, errp
)) {
890 validate_bootdevices(config
->order
, errp
);
896 validate_bootdevices(config
->once
, errp
);
902 machine_copy_boot_config(ms
, config
);
903 /* Strings live in ms->boot_config. */
908 qapi_free_BootConfiguration(config
);
911 static void machine_class_init(ObjectClass
*oc
, void *data
)
913 MachineClass
*mc
= MACHINE_CLASS(oc
);
915 /* Default 128 MB as guest ram size */
916 mc
->default_ram_size
= 128 * MiB
;
917 mc
->rom_file_has_mr
= true;
919 /* numa node memory size aligned on 8MB by default.
920 * On Linux, each node's border has to be 8MB aligned
922 mc
->numa_mem_align_shift
= 23;
924 object_class_property_add_str(oc
, "kernel",
925 machine_get_kernel
, machine_set_kernel
);
926 object_class_property_set_description(oc
, "kernel",
927 "Linux kernel image file");
929 object_class_property_add_str(oc
, "initrd",
930 machine_get_initrd
, machine_set_initrd
);
931 object_class_property_set_description(oc
, "initrd",
932 "Linux initial ramdisk file");
934 object_class_property_add_str(oc
, "append",
935 machine_get_append
, machine_set_append
);
936 object_class_property_set_description(oc
, "append",
937 "Linux kernel command line");
939 object_class_property_add_str(oc
, "dtb",
940 machine_get_dtb
, machine_set_dtb
);
941 object_class_property_set_description(oc
, "dtb",
942 "Linux kernel device tree file");
944 object_class_property_add_str(oc
, "dumpdtb",
945 machine_get_dumpdtb
, machine_set_dumpdtb
);
946 object_class_property_set_description(oc
, "dumpdtb",
947 "Dump current dtb to a file and quit");
949 object_class_property_add(oc
, "boot", "BootConfiguration",
950 machine_get_boot
, machine_set_boot
,
952 object_class_property_set_description(oc
, "boot",
953 "Boot configuration");
955 object_class_property_add(oc
, "smp", "SMPConfiguration",
956 machine_get_smp
, machine_set_smp
,
958 object_class_property_set_description(oc
, "smp",
961 object_class_property_add(oc
, "phandle-start", "int",
962 machine_get_phandle_start
, machine_set_phandle_start
,
964 object_class_property_set_description(oc
, "phandle-start",
965 "The first phandle ID we may generate dynamically");
967 object_class_property_add_str(oc
, "dt-compatible",
968 machine_get_dt_compatible
, machine_set_dt_compatible
);
969 object_class_property_set_description(oc
, "dt-compatible",
970 "Overrides the \"compatible\" property of the dt root node");
972 object_class_property_add_bool(oc
, "dump-guest-core",
973 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
974 object_class_property_set_description(oc
, "dump-guest-core",
975 "Include guest memory in a core dump");
977 object_class_property_add_bool(oc
, "mem-merge",
978 machine_get_mem_merge
, machine_set_mem_merge
);
979 object_class_property_set_description(oc
, "mem-merge",
980 "Enable/disable memory merge support");
982 object_class_property_add_bool(oc
, "usb",
983 machine_get_usb
, machine_set_usb
);
984 object_class_property_set_description(oc
, "usb",
985 "Set on/off to enable/disable usb");
987 object_class_property_add_bool(oc
, "graphics",
988 machine_get_graphics
, machine_set_graphics
);
989 object_class_property_set_description(oc
, "graphics",
990 "Set on/off to enable/disable graphics emulation");
992 object_class_property_add_str(oc
, "firmware",
993 machine_get_firmware
, machine_set_firmware
);
994 object_class_property_set_description(oc
, "firmware",
997 object_class_property_add_bool(oc
, "suppress-vmdesc",
998 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
999 object_class_property_set_description(oc
, "suppress-vmdesc",
1000 "Set on to disable self-describing migration");
1002 object_class_property_add_link(oc
, "confidential-guest-support",
1003 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
1004 offsetof(MachineState
, cgs
),
1005 machine_check_confidential_guest_support
,
1006 OBJ_PROP_LINK_STRONG
);
1007 object_class_property_set_description(oc
, "confidential-guest-support",
1008 "Set confidential guest scheme to support");
1010 /* For compatibility */
1011 object_class_property_add_str(oc
, "memory-encryption",
1012 machine_get_memory_encryption
, machine_set_memory_encryption
);
1013 object_class_property_set_description(oc
, "memory-encryption",
1014 "Set memory encryption object to use");
1016 object_class_property_add_link(oc
, "memory-backend", TYPE_MEMORY_BACKEND
,
1017 offsetof(MachineState
, memdev
), object_property_allow_set_link
,
1018 OBJ_PROP_LINK_STRONG
);
1019 object_class_property_set_description(oc
, "memory-backend",
1021 "Valid value is ID of hostmem based backend");
1023 object_class_property_add(oc
, "memory", "MemorySizeConfiguration",
1024 machine_get_mem
, machine_set_mem
,
1026 object_class_property_set_description(oc
, "memory",
1027 "Memory size configuration");
1030 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
1032 MachineClass
*mc
= MACHINE_CLASS(oc
);
1033 mc
->max_cpus
= mc
->max_cpus
?: 1;
1034 mc
->min_cpus
= mc
->min_cpus
?: 1;
1035 mc
->default_cpus
= mc
->default_cpus
?: 1;
1037 if (!object_class_is_abstract(oc
)) {
1038 const char *cname
= object_class_get_name(oc
);
1039 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
1040 mc
->name
= g_strndup(cname
,
1041 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
1042 mc
->compat_props
= g_ptr_array_new();
1046 static void machine_initfn(Object
*obj
)
1048 MachineState
*ms
= MACHINE(obj
);
1049 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
1051 container_get(obj
, "/peripheral");
1052 container_get(obj
, "/peripheral-anon");
1054 ms
->dump_guest_core
= true;
1055 ms
->mem_merge
= true;
1056 ms
->enable_graphics
= true;
1057 ms
->kernel_cmdline
= g_strdup("");
1058 ms
->ram_size
= mc
->default_ram_size
;
1059 ms
->maxram_size
= mc
->default_ram_size
;
1061 if (mc
->nvdimm_supported
) {
1062 Object
*obj
= OBJECT(ms
);
1064 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
1065 object_property_add_bool(obj
, "nvdimm",
1066 machine_get_nvdimm
, machine_set_nvdimm
);
1067 object_property_set_description(obj
, "nvdimm",
1068 "Set on/off to enable/disable "
1069 "NVDIMM instantiation");
1071 object_property_add_str(obj
, "nvdimm-persistence",
1072 machine_get_nvdimm_persistence
,
1073 machine_set_nvdimm_persistence
);
1074 object_property_set_description(obj
, "nvdimm-persistence",
1075 "Set NVDIMM persistence"
1076 "Valid values are cpu, mem-ctrl");
1079 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
1080 ms
->numa_state
= g_new0(NumaState
, 1);
1081 object_property_add_bool(obj
, "hmat",
1082 machine_get_hmat
, machine_set_hmat
);
1083 object_property_set_description(obj
, "hmat",
1084 "Set on/off to enable/disable "
1085 "ACPI Heterogeneous Memory Attribute "
1089 /* default to mc->default_cpus */
1090 ms
->smp
.cpus
= mc
->default_cpus
;
1091 ms
->smp
.max_cpus
= mc
->default_cpus
;
1092 ms
->smp
.sockets
= 1;
1094 ms
->smp
.clusters
= 1;
1096 ms
->smp
.threads
= 1;
1098 machine_copy_boot_config(ms
, &(BootConfiguration
){ 0 });
1101 static void machine_finalize(Object
*obj
)
1103 MachineState
*ms
= MACHINE(obj
);
1105 machine_free_boot_config(ms
);
1106 g_free(ms
->kernel_filename
);
1107 g_free(ms
->initrd_filename
);
1108 g_free(ms
->kernel_cmdline
);
1110 g_free(ms
->dumpdtb
);
1111 g_free(ms
->dt_compatible
);
1112 g_free(ms
->firmware
);
1113 g_free(ms
->device_memory
);
1114 g_free(ms
->nvdimms_state
);
1115 g_free(ms
->numa_state
);
1118 bool machine_usb(MachineState
*machine
)
1120 return machine
->usb
;
1123 int machine_phandle_start(MachineState
*machine
)
1125 return machine
->phandle_start
;
1128 bool machine_dump_guest_core(MachineState
*machine
)
1130 return machine
->dump_guest_core
;
1133 bool machine_mem_merge(MachineState
*machine
)
1135 return machine
->mem_merge
;
1138 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
1140 GString
*s
= g_string_new(NULL
);
1141 if (cpu
->props
.has_socket_id
) {
1142 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1144 if (cpu
->props
.has_die_id
) {
1146 g_string_append_printf(s
, ", ");
1148 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1150 if (cpu
->props
.has_cluster_id
) {
1152 g_string_append_printf(s
, ", ");
1154 g_string_append_printf(s
, "cluster-id: %"PRId64
, cpu
->props
.cluster_id
);
1156 if (cpu
->props
.has_core_id
) {
1158 g_string_append_printf(s
, ", ");
1160 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1162 if (cpu
->props
.has_thread_id
) {
1164 g_string_append_printf(s
, ", ");
1166 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1168 return g_string_free(s
, false);
1171 static void numa_validate_initiator(NumaState
*numa_state
)
1174 NodeInfo
*numa_info
= numa_state
->nodes
;
1176 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1177 if (numa_info
[i
].initiator
== MAX_NODES
) {
1181 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1182 error_report("NUMA node %" PRIu16
" is missing, use "
1183 "'-numa node' option to declare it first",
1184 numa_info
[i
].initiator
);
1188 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1189 error_report("The initiator of NUMA node %d is invalid", i
);
1195 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1198 bool default_mapping
;
1199 GString
*s
= g_string_new(NULL
);
1200 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1201 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1203 assert(machine
->numa_state
->num_nodes
);
1204 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1205 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1209 default_mapping
= (i
== possible_cpus
->len
);
1211 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1212 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1214 if (!cpu_slot
->props
.has_node_id
) {
1215 /* fetch default mapping from board and enable it */
1216 CpuInstanceProperties props
= cpu_slot
->props
;
1218 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1219 if (!default_mapping
) {
1220 /* record slots with not set mapping,
1221 * TODO: make it hard error in future */
1222 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1223 g_string_append_printf(s
, "%sCPU %d [%s]",
1224 s
->len
? ", " : "", i
, cpu_str
);
1227 /* non mapped cpus used to fallback to node 0 */
1231 props
.has_node_id
= true;
1232 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1236 if (machine
->numa_state
->hmat_enabled
) {
1237 numa_validate_initiator(machine
->numa_state
);
1240 if (s
->len
&& !qtest_enabled()) {
1241 warn_report("CPU(s) not present in any NUMA nodes: %s",
1243 warn_report("All CPU(s) up to maxcpus should be described "
1244 "in NUMA config, ability to start up with partial NUMA "
1245 "mappings is obsoleted and will be removed in future");
1247 g_string_free(s
, true);
1250 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1251 HostMemoryBackend
*backend
)
1253 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1255 if (host_memory_backend_is_mapped(backend
)) {
1256 error_report("memory backend %s can't be used multiple times.",
1257 object_get_canonical_path_component(OBJECT(backend
)));
1260 host_memory_backend_set_mapped(backend
, true);
1261 vmstate_register_ram_global(ret
);
1265 static bool create_default_memdev(MachineState
*ms
, const char *path
, Error
**errp
)
1268 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1271 obj
= object_new(path
? TYPE_MEMORY_BACKEND_FILE
: TYPE_MEMORY_BACKEND_RAM
);
1273 if (!object_property_set_str(obj
, "mem-path", path
, errp
)) {
1277 if (!object_property_set_int(obj
, "size", ms
->ram_size
, errp
)) {
1280 object_property_add_child(object_get_objects_root(), mc
->default_ram_id
,
1282 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1283 if (!object_property_set_bool(obj
, "x-use-canonical-path-for-ramblock-id",
1287 if (!user_creatable_complete(USER_CREATABLE(obj
), errp
)) {
1290 r
= object_property_set_link(OBJECT(ms
), "memory-backend", obj
, errp
);
1298 void machine_run_board_init(MachineState
*machine
, const char *mem_path
, Error
**errp
)
1300 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1301 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1304 /* This checkpoint is required by replay to separate prior clock
1305 reading from the other reads, because timer polling functions query
1306 clock values from the log. */
1307 replay_checkpoint(CHECKPOINT_INIT
);
1309 if (!xen_enabled()) {
1310 /* On 32-bit hosts, QEMU is limited by virtual address space */
1311 if (machine
->ram_size
> (2047 << 20) && HOST_LONG_BITS
== 32) {
1312 error_setg(errp
, "at most 2047 MB RAM can be simulated");
1317 if (machine
->memdev
) {
1318 ram_addr_t backend_size
= object_property_get_uint(OBJECT(machine
->memdev
),
1319 "size", &error_abort
);
1320 if (backend_size
!= machine
->ram_size
) {
1321 error_setg(errp
, "Machine memory size does not match the size of the memory backend");
1324 } else if (machine_class
->default_ram_id
&& machine
->ram_size
&&
1325 numa_uses_legacy_mem()) {
1326 if (!create_default_memdev(current_machine
, mem_path
, errp
)) {
1331 if (machine
->numa_state
) {
1332 numa_complete_configuration(machine
);
1333 if (machine
->numa_state
->num_nodes
) {
1334 machine_numa_finish_cpu_init(machine
);
1338 if (!machine
->ram
&& machine
->memdev
) {
1339 machine
->ram
= machine_consume_memdev(machine
, machine
->memdev
);
1342 /* If the machine supports the valid_cpu_types check and the user
1343 * specified a CPU with -cpu check here that the user CPU is supported.
1345 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1348 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1349 if (object_class_dynamic_cast(oc
,
1350 machine_class
->valid_cpu_types
[i
])) {
1351 /* The user specificed CPU is in the valid field, we are
1358 if (!machine_class
->valid_cpu_types
[i
]) {
1359 /* The user specified CPU is not valid */
1360 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1361 error_printf("The valid types are: %s",
1362 machine_class
->valid_cpu_types
[0]);
1363 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1364 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1372 /* Check if CPU type is deprecated and warn if so */
1374 if (cc
&& cc
->deprecation_note
) {
1375 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1376 cc
->deprecation_note
);
1381 * With confidential guests, the host can't see the real
1382 * contents of RAM, so there's no point in it trying to merge
1385 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1388 * Virtio devices can't count on directly accessing guest
1389 * memory, so they need iommu_platform=on to use normal DMA
1390 * mechanisms. That requires also disabling legacy virtio
1391 * support for those virtio pci devices which allow it.
1393 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1395 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1399 accel_init_interfaces(ACCEL_GET_CLASS(machine
->accelerator
));
1400 machine_class
->init(machine
);
1401 phase_advance(PHASE_MACHINE_INITIALIZED
);
1404 static NotifierList machine_init_done_notifiers
=
1405 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1407 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1409 notifier_list_add(&machine_init_done_notifiers
, notify
);
1410 if (phase_check(PHASE_MACHINE_READY
)) {
1411 notify
->notify(notify
, NULL
);
1415 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1417 notifier_remove(notify
);
1420 void qdev_machine_creation_done(void)
1422 cpu_synchronize_all_post_init();
1424 if (current_machine
->boot_config
.once
) {
1425 qemu_boot_set(current_machine
->boot_config
.once
, &error_fatal
);
1426 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_config
.order
));
1430 * ok, initial machine setup is done, starting from now we can
1431 * only create hotpluggable devices
1433 phase_advance(PHASE_MACHINE_READY
);
1434 qdev_assert_realized_properly();
1436 /* TODO: once all bus devices are qdevified, this should be done
1437 * when bus is created by qdev.c */
1439 * TODO: If we had a main 'reset container' that the whole system
1440 * lived in, we could reset that using the multi-phase reset
1441 * APIs. For the moment, we just reset the sysbus, which will cause
1442 * all devices hanging off it (and all their child buses, recursively)
1443 * to be reset. Note that this will *not* reset any Device objects
1444 * which are not attached to some part of the qbus tree!
1446 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1448 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1450 if (rom_check_and_register_reset() != 0) {
1456 /* This checkpoint is required by replay to separate prior clock
1457 reading from the other reads, because timer polling functions query
1458 clock values from the log. */
1459 replay_checkpoint(CHECKPOINT_RESET
);
1460 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1461 register_global_state();
1464 static const TypeInfo machine_info
= {
1465 .name
= TYPE_MACHINE
,
1466 .parent
= TYPE_OBJECT
,
1468 .class_size
= sizeof(MachineClass
),
1469 .class_init
= machine_class_init
,
1470 .class_base_init
= machine_class_base_init
,
1471 .instance_size
= sizeof(MachineState
),
1472 .instance_init
= machine_initfn
,
1473 .instance_finalize
= machine_finalize
,
1476 static void machine_register_types(void)
1478 type_register_static(&machine_info
);
1481 type_init(machine_register_types
)