4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qemu/accel.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "qom/object_interfaces.h"
25 #include "hw/sysbus.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "sysemu/numa.h"
31 #include "sysemu/xen.h"
32 #include "qemu/error-report.h"
33 #include "sysemu/qtest.h"
34 #include "hw/pci/pci.h"
35 #include "hw/mem/nvdimm.h"
36 #include "migration/global_state.h"
37 #include "migration/vmstate.h"
38 #include "exec/confidential-guest-support.h"
39 #include "hw/virtio/virtio.h"
40 #include "hw/virtio/virtio-pci.h"
42 GlobalProperty hw_compat_8_0
[] = {
43 { "migration", "multifd-flush-after-each-section", "on"},
44 { TYPE_PCI_DEVICE
, "x-pcie-ari-nextfn-1", "on" },
46 const size_t hw_compat_8_0_len
= G_N_ELEMENTS(hw_compat_8_0
);
48 GlobalProperty hw_compat_7_2
[] = {
49 { "e1000e", "migrate-timadj", "off" },
50 { "virtio-mem", "x-early-migration", "false" },
51 { "migration", "x-preempt-pre-7-2", "true" },
52 { TYPE_PCI_DEVICE
, "x-pcie-err-unc-mask", "off" },
54 const size_t hw_compat_7_2_len
= G_N_ELEMENTS(hw_compat_7_2
);
56 GlobalProperty hw_compat_7_1
[] = {
57 { "virtio-device", "queue_reset", "false" },
58 { "virtio-rng-pci", "vectors", "0" },
59 { "virtio-rng-pci-transitional", "vectors", "0" },
60 { "virtio-rng-pci-non-transitional", "vectors", "0" },
62 const size_t hw_compat_7_1_len
= G_N_ELEMENTS(hw_compat_7_1
);
64 GlobalProperty hw_compat_7_0
[] = {
65 { "arm-gicv3-common", "force-8-bit-prio", "on" },
66 { "nvme-ns", "eui64-default", "on"},
68 const size_t hw_compat_7_0_len
= G_N_ELEMENTS(hw_compat_7_0
);
70 GlobalProperty hw_compat_6_2
[] = {
71 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
73 const size_t hw_compat_6_2_len
= G_N_ELEMENTS(hw_compat_6_2
);
75 GlobalProperty hw_compat_6_1
[] = {
76 { "vhost-user-vsock-device", "seqpacket", "off" },
77 { "nvme-ns", "shared", "off" },
79 const size_t hw_compat_6_1_len
= G_N_ELEMENTS(hw_compat_6_1
);
81 GlobalProperty hw_compat_6_0
[] = {
82 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
83 { "i8042", "extended-state", "false"},
84 { "nvme-ns", "eui64-default", "off"},
85 { "e1000", "init-vet", "off" },
86 { "e1000e", "init-vet", "off" },
87 { "vhost-vsock-device", "seqpacket", "off" },
89 const size_t hw_compat_6_0_len
= G_N_ELEMENTS(hw_compat_6_0
);
91 GlobalProperty hw_compat_5_2
[] = {
92 { "ICH9-LPC", "smm-compat", "on"},
93 { "PIIX4_PM", "smm-compat", "on"},
94 { "virtio-blk-device", "report-discard-granularity", "off" },
95 { "virtio-net-pci-base", "vectors", "3"},
97 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
99 GlobalProperty hw_compat_5_1
[] = {
100 { "vhost-scsi", "num_queues", "1"},
101 { "vhost-user-blk", "num-queues", "1"},
102 { "vhost-user-scsi", "num_queues", "1"},
103 { "virtio-blk-device", "num-queues", "1"},
104 { "virtio-scsi-device", "num_queues", "1"},
105 { "nvme", "use-intel-id", "on"},
106 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
107 { "pl011", "migrate-clk", "off" },
108 { "virtio-pci", "x-ats-page-aligned", "off"},
110 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
112 GlobalProperty hw_compat_5_0
[] = {
113 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
114 { "virtio-balloon-device", "page-poison", "false" },
115 { "vmport", "x-read-set-eax", "off" },
116 { "vmport", "x-signal-unsupported-cmd", "off" },
117 { "vmport", "x-report-vmx-type", "off" },
118 { "vmport", "x-cmds-v2", "off" },
119 { "virtio-device", "x-disable-legacy-check", "true" },
121 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
123 GlobalProperty hw_compat_4_2
[] = {
124 { "virtio-blk-device", "queue-size", "128"},
125 { "virtio-scsi-device", "virtqueue_size", "128"},
126 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
127 { "virtio-blk-device", "seg-max-adjust", "off"},
128 { "virtio-scsi-device", "seg_max_adjust", "off"},
129 { "vhost-blk-device", "seg_max_adjust", "off"},
130 { "usb-host", "suppress-remote-wake", "off" },
131 { "usb-redir", "suppress-remote-wake", "off" },
132 { "qxl", "revision", "4" },
133 { "qxl-vga", "revision", "4" },
134 { "fw_cfg", "acpi-mr-restore", "false" },
135 { "virtio-device", "use-disabled-flag", "false" },
137 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
139 GlobalProperty hw_compat_4_1
[] = {
140 { "virtio-pci", "x-pcie-flr-init", "off" },
142 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
144 GlobalProperty hw_compat_4_0
[] = {
145 { "VGA", "edid", "false" },
146 { "secondary-vga", "edid", "false" },
147 { "bochs-display", "edid", "false" },
148 { "virtio-vga", "edid", "false" },
149 { "virtio-gpu-device", "edid", "false" },
150 { "virtio-device", "use-started", "false" },
151 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
152 { "pl031", "migrate-tick-offset", "false" },
154 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
156 GlobalProperty hw_compat_3_1
[] = {
157 { "pcie-root-port", "x-speed", "2_5" },
158 { "pcie-root-port", "x-width", "1" },
159 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
160 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
161 { "tpm-crb", "ppi", "false" },
162 { "tpm-tis", "ppi", "false" },
163 { "usb-kbd", "serial", "42" },
164 { "usb-mouse", "serial", "42" },
165 { "usb-tablet", "serial", "42" },
166 { "virtio-blk-device", "discard", "false" },
167 { "virtio-blk-device", "write-zeroes", "false" },
168 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
169 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
171 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
173 GlobalProperty hw_compat_3_0
[] = {};
174 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
176 GlobalProperty hw_compat_2_12
[] = {
177 { "migration", "decompress-error-check", "off" },
178 { "hda-audio", "use-timer", "false" },
179 { "cirrus-vga", "global-vmstate", "true" },
180 { "VGA", "global-vmstate", "true" },
181 { "vmware-svga", "global-vmstate", "true" },
182 { "qxl-vga", "global-vmstate", "true" },
184 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
186 GlobalProperty hw_compat_2_11
[] = {
187 { "hpet", "hpet-offset-saved", "false" },
188 { "virtio-blk-pci", "vectors", "2" },
189 { "vhost-user-blk-pci", "vectors", "2" },
190 { "e1000", "migrate_tso_props", "off" },
192 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
194 GlobalProperty hw_compat_2_10
[] = {
195 { "virtio-mouse-device", "wheel-axis", "false" },
196 { "virtio-tablet-device", "wheel-axis", "false" },
198 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
200 GlobalProperty hw_compat_2_9
[] = {
201 { "pci-bridge", "shpc", "off" },
202 { "intel-iommu", "pt", "off" },
203 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
204 { "pcie-root-port", "x-migrate-msix", "false" },
206 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
208 GlobalProperty hw_compat_2_8
[] = {
209 { "fw_cfg_mem", "x-file-slots", "0x10" },
210 { "fw_cfg_io", "x-file-slots", "0x10" },
211 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
212 { "pci-bridge", "shpc", "on" },
213 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
214 { "virtio-pci", "x-pcie-deverr-init", "off" },
215 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
216 { "virtio-pci", "x-pcie-pm-init", "off" },
217 { "cirrus-vga", "vgamem_mb", "8" },
218 { "isa-cirrus-vga", "vgamem_mb", "8" },
220 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
222 GlobalProperty hw_compat_2_7
[] = {
223 { "virtio-pci", "page-per-vq", "on" },
224 { "virtio-serial-device", "emergency-write", "off" },
225 { "ioapic", "version", "0x11" },
226 { "intel-iommu", "x-buggy-eim", "true" },
227 { "virtio-pci", "x-ignore-backend-features", "on" },
229 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
231 GlobalProperty hw_compat_2_6
[] = {
232 { "virtio-mmio", "format_transport_address", "off" },
233 /* Optional because not all virtio-pci devices support legacy mode */
234 { "virtio-pci", "disable-modern", "on", .optional
= true },
235 { "virtio-pci", "disable-legacy", "off", .optional
= true },
237 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
239 GlobalProperty hw_compat_2_5
[] = {
240 { "isa-fdc", "fallback", "144" },
241 { "pvscsi", "x-old-pci-configuration", "on" },
242 { "pvscsi", "x-disable-pcie", "on" },
243 { "vmxnet3", "x-old-msi-offsets", "on" },
244 { "vmxnet3", "x-disable-pcie", "on" },
246 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
248 GlobalProperty hw_compat_2_4
[] = {
249 /* Optional because the 'scsi' property is Linux-only */
250 { "virtio-blk-device", "scsi", "true", .optional
= true },
251 { "e1000", "extra_mac_registers", "off" },
252 { "virtio-pci", "x-disable-pcie", "on" },
253 { "virtio-pci", "migrate-extra", "off" },
254 { "fw_cfg_mem", "dma_enabled", "off" },
255 { "fw_cfg_io", "dma_enabled", "off" }
257 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
259 GlobalProperty hw_compat_2_3
[] = {
260 { "virtio-blk-pci", "any_layout", "off" },
261 { "virtio-balloon-pci", "any_layout", "off" },
262 { "virtio-serial-pci", "any_layout", "off" },
263 { "virtio-9p-pci", "any_layout", "off" },
264 { "virtio-rng-pci", "any_layout", "off" },
265 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
266 { "migration", "send-configuration", "off" },
267 { "migration", "send-section-footer", "off" },
268 { "migration", "store-global-state", "off" },
270 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
272 GlobalProperty hw_compat_2_2
[] = {};
273 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
275 GlobalProperty hw_compat_2_1
[] = {
276 { "intel-hda", "old_msi_addr", "on" },
277 { "VGA", "qemu-extended-regs", "off" },
278 { "secondary-vga", "qemu-extended-regs", "off" },
279 { "virtio-scsi-pci", "any_layout", "off" },
280 { "usb-mouse", "usb_version", "1" },
281 { "usb-kbd", "usb_version", "1" },
282 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
284 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
286 MachineState
*current_machine
;
288 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
290 MachineState
*ms
= MACHINE(obj
);
292 return g_strdup(ms
->kernel_filename
);
295 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
297 MachineState
*ms
= MACHINE(obj
);
299 g_free(ms
->kernel_filename
);
300 ms
->kernel_filename
= g_strdup(value
);
303 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
305 MachineState
*ms
= MACHINE(obj
);
307 return g_strdup(ms
->initrd_filename
);
310 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
312 MachineState
*ms
= MACHINE(obj
);
314 g_free(ms
->initrd_filename
);
315 ms
->initrd_filename
= g_strdup(value
);
318 static char *machine_get_append(Object
*obj
, Error
**errp
)
320 MachineState
*ms
= MACHINE(obj
);
322 return g_strdup(ms
->kernel_cmdline
);
325 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
327 MachineState
*ms
= MACHINE(obj
);
329 g_free(ms
->kernel_cmdline
);
330 ms
->kernel_cmdline
= g_strdup(value
);
333 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
335 MachineState
*ms
= MACHINE(obj
);
337 return g_strdup(ms
->dtb
);
340 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
342 MachineState
*ms
= MACHINE(obj
);
345 ms
->dtb
= g_strdup(value
);
348 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
350 MachineState
*ms
= MACHINE(obj
);
352 return g_strdup(ms
->dumpdtb
);
355 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
357 MachineState
*ms
= MACHINE(obj
);
360 ms
->dumpdtb
= g_strdup(value
);
363 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
364 const char *name
, void *opaque
,
367 MachineState
*ms
= MACHINE(obj
);
368 int64_t value
= ms
->phandle_start
;
370 visit_type_int(v
, name
, &value
, errp
);
373 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
374 const char *name
, void *opaque
,
377 MachineState
*ms
= MACHINE(obj
);
380 if (!visit_type_int(v
, name
, &value
, errp
)) {
384 ms
->phandle_start
= value
;
387 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
389 MachineState
*ms
= MACHINE(obj
);
391 return g_strdup(ms
->dt_compatible
);
394 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
396 MachineState
*ms
= MACHINE(obj
);
398 g_free(ms
->dt_compatible
);
399 ms
->dt_compatible
= g_strdup(value
);
402 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
404 MachineState
*ms
= MACHINE(obj
);
406 return ms
->dump_guest_core
;
409 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
411 MachineState
*ms
= MACHINE(obj
);
413 ms
->dump_guest_core
= value
;
416 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
418 MachineState
*ms
= MACHINE(obj
);
420 return ms
->mem_merge
;
423 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
425 MachineState
*ms
= MACHINE(obj
);
427 ms
->mem_merge
= value
;
430 static bool machine_get_usb(Object
*obj
, Error
**errp
)
432 MachineState
*ms
= MACHINE(obj
);
437 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
439 MachineState
*ms
= MACHINE(obj
);
442 ms
->usb_disabled
= !value
;
445 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
447 MachineState
*ms
= MACHINE(obj
);
449 return ms
->enable_graphics
;
452 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
454 MachineState
*ms
= MACHINE(obj
);
456 ms
->enable_graphics
= value
;
459 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
461 MachineState
*ms
= MACHINE(obj
);
463 return g_strdup(ms
->firmware
);
466 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
468 MachineState
*ms
= MACHINE(obj
);
470 g_free(ms
->firmware
);
471 ms
->firmware
= g_strdup(value
);
474 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
476 MachineState
*ms
= MACHINE(obj
);
478 ms
->suppress_vmdesc
= value
;
481 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
483 MachineState
*ms
= MACHINE(obj
);
485 return ms
->suppress_vmdesc
;
488 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
490 MachineState
*ms
= MACHINE(obj
);
493 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
499 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
503 object_resolve_path_component(object_get_objects_root(), value
);
506 error_setg(errp
, "No such memory encryption object '%s'", value
);
510 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
513 static void machine_check_confidential_guest_support(const Object
*obj
,
519 * So far the only constraint is that the target has the
520 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
525 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
527 MachineState
*ms
= MACHINE(obj
);
529 return ms
->nvdimms_state
->is_enabled
;
532 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
534 MachineState
*ms
= MACHINE(obj
);
536 ms
->nvdimms_state
->is_enabled
= value
;
539 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
541 MachineState
*ms
= MACHINE(obj
);
543 return ms
->numa_state
->hmat_enabled
;
546 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
548 MachineState
*ms
= MACHINE(obj
);
550 ms
->numa_state
->hmat_enabled
= value
;
553 static void machine_get_mem(Object
*obj
, Visitor
*v
, const char *name
,
554 void *opaque
, Error
**errp
)
556 MachineState
*ms
= MACHINE(obj
);
557 MemorySizeConfiguration mem
= {
559 .size
= ms
->ram_size
,
560 .has_max_size
= !!ms
->ram_slots
,
561 .max_size
= ms
->maxram_size
,
562 .has_slots
= !!ms
->ram_slots
,
563 .slots
= ms
->ram_slots
,
565 MemorySizeConfiguration
*p_mem
= &mem
;
567 visit_type_MemorySizeConfiguration(v
, name
, &p_mem
, &error_abort
);
570 static void machine_set_mem(Object
*obj
, Visitor
*v
, const char *name
,
571 void *opaque
, Error
**errp
)
574 MachineState
*ms
= MACHINE(obj
);
575 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
576 MemorySizeConfiguration
*mem
;
578 if (!visit_type_MemorySizeConfiguration(v
, name
, &mem
, errp
)) {
582 if (!mem
->has_size
) {
583 mem
->has_size
= true;
584 mem
->size
= mc
->default_ram_size
;
586 mem
->size
= QEMU_ALIGN_UP(mem
->size
, 8192);
587 if (mc
->fixup_ram_size
) {
588 mem
->size
= mc
->fixup_ram_size(mem
->size
);
590 if ((ram_addr_t
)mem
->size
!= mem
->size
) {
591 error_setg(errp
, "ram size too large");
595 if (mem
->has_max_size
) {
596 if (mem
->max_size
< mem
->size
) {
597 error_setg(errp
, "invalid value of maxmem: "
598 "maximum memory size (0x%" PRIx64
") must be at least "
599 "the initial memory size (0x%" PRIx64
")",
600 mem
->max_size
, mem
->size
);
603 if (mem
->has_slots
&& mem
->slots
&& mem
->max_size
== mem
->size
) {
604 error_setg(errp
, "invalid value of maxmem: "
605 "memory slots were specified but maximum memory size "
606 "(0x%" PRIx64
") is equal to the initial memory size "
607 "(0x%" PRIx64
")", mem
->max_size
, mem
->size
);
610 ms
->maxram_size
= mem
->max_size
;
612 if (mem
->has_slots
) {
613 error_setg(errp
, "slots specified but no max-size");
616 ms
->maxram_size
= mem
->size
;
618 ms
->ram_size
= mem
->size
;
619 ms
->ram_slots
= mem
->has_slots
? mem
->slots
: 0;
621 qapi_free_MemorySizeConfiguration(mem
);
624 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
626 MachineState
*ms
= MACHINE(obj
);
628 return g_strdup(ms
->nvdimms_state
->persistence_string
);
631 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
634 MachineState
*ms
= MACHINE(obj
);
635 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
637 if (strcmp(value
, "cpu") == 0) {
638 nvdimms_state
->persistence
= 3;
639 } else if (strcmp(value
, "mem-ctrl") == 0) {
640 nvdimms_state
->persistence
= 2;
642 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
647 g_free(nvdimms_state
->persistence_string
);
648 nvdimms_state
->persistence_string
= g_strdup(value
);
651 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
653 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
656 bool device_is_dynamic_sysbus(MachineClass
*mc
, DeviceState
*dev
)
658 Object
*obj
= OBJECT(dev
);
660 if (!object_dynamic_cast(obj
, TYPE_SYS_BUS_DEVICE
)) {
664 return device_type_is_dynamic_sysbus(mc
, object_get_typename(obj
));
667 bool device_type_is_dynamic_sysbus(MachineClass
*mc
, const char *type
)
669 bool allowed
= false;
671 ObjectClass
*klass
= object_class_by_name(type
);
673 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
676 allowed
|= !!object_class_dynamic_cast(klass
, wl
->value
);
682 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
685 HotpluggableCPUList
*head
= NULL
;
686 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
688 /* force board to initialize possible_cpus if it hasn't been done yet */
689 mc
->possible_cpu_arch_ids(machine
);
691 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
693 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
695 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
696 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
697 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
698 sizeof(*cpu_item
->props
));
700 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
702 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
704 QAPI_LIST_PREPEND(head
, cpu_item
);
710 * machine_set_cpu_numa_node:
711 * @machine: machine object to modify
712 * @props: specifies which cpu objects to assign to
713 * numa node specified by @props.node_id
714 * @errp: if an error occurs, a pointer to an area to store the error
716 * Associate NUMA node specified by @props.node_id with cpu slots that
717 * match socket/core/thread-ids specified by @props. It's recommended to use
718 * query-hotpluggable-cpus.props values to specify affected cpu slots,
719 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
721 * However for CLI convenience it's possible to pass in subset of properties,
722 * which would affect all cpu slots that match it.
724 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
725 * -numa cpu,node-id=0,socket_id=0 \
726 * -numa cpu,node-id=1,socket_id=1
727 * will assign all child cores of socket 0 to node 0 and
728 * of socket 1 to node 1.
730 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
732 * Empty subset is disallowed and function will return with error in this case.
734 void machine_set_cpu_numa_node(MachineState
*machine
,
735 const CpuInstanceProperties
*props
, Error
**errp
)
737 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
738 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
742 if (!mc
->possible_cpu_arch_ids
) {
743 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
747 /* disabling node mapping is not supported, forbid it */
748 assert(props
->has_node_id
);
750 /* force board to initialize possible_cpus if it hasn't been done yet */
751 mc
->possible_cpu_arch_ids(machine
);
753 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
754 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
756 /* reject unsupported by board properties */
757 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
758 error_setg(errp
, "thread-id is not supported");
762 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
763 error_setg(errp
, "core-id is not supported");
767 if (props
->has_cluster_id
&& !slot
->props
.has_cluster_id
) {
768 error_setg(errp
, "cluster-id is not supported");
772 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
773 error_setg(errp
, "socket-id is not supported");
777 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
778 error_setg(errp
, "die-id is not supported");
782 /* skip slots with explicit mismatch */
783 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
787 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
791 if (props
->has_cluster_id
&&
792 props
->cluster_id
!= slot
->props
.cluster_id
) {
796 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
800 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
804 /* reject assignment if slot is already assigned, for compatibility
805 * of legacy cpu_index mapping with SPAPR core based mapping do not
806 * error out if cpu thread and matched core have the same node-id */
807 if (slot
->props
.has_node_id
&&
808 slot
->props
.node_id
!= props
->node_id
) {
809 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
810 slot
->props
.node_id
);
814 /* assign slot to node as it's matched '-numa cpu' key */
816 slot
->props
.node_id
= props
->node_id
;
817 slot
->props
.has_node_id
= props
->has_node_id
;
819 if (machine
->numa_state
->hmat_enabled
) {
820 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
821 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
822 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
823 " should be itself (got %" PRIu16
")",
824 props
->node_id
, numa_info
[props
->node_id
].initiator
);
827 numa_info
[props
->node_id
].has_cpu
= true;
828 numa_info
[props
->node_id
].initiator
= props
->node_id
;
833 error_setg(errp
, "no match found");
837 static void machine_get_smp(Object
*obj
, Visitor
*v
, const char *name
,
838 void *opaque
, Error
**errp
)
840 MachineState
*ms
= MACHINE(obj
);
841 SMPConfiguration
*config
= &(SMPConfiguration
){
842 .has_cpus
= true, .cpus
= ms
->smp
.cpus
,
843 .has_sockets
= true, .sockets
= ms
->smp
.sockets
,
844 .has_dies
= true, .dies
= ms
->smp
.dies
,
845 .has_clusters
= true, .clusters
= ms
->smp
.clusters
,
846 .has_cores
= true, .cores
= ms
->smp
.cores
,
847 .has_threads
= true, .threads
= ms
->smp
.threads
,
848 .has_maxcpus
= true, .maxcpus
= ms
->smp
.max_cpus
,
851 if (!visit_type_SMPConfiguration(v
, name
, &config
, &error_abort
)) {
856 static void machine_set_smp(Object
*obj
, Visitor
*v
, const char *name
,
857 void *opaque
, Error
**errp
)
859 MachineState
*ms
= MACHINE(obj
);
860 g_autoptr(SMPConfiguration
) config
= NULL
;
862 if (!visit_type_SMPConfiguration(v
, name
, &config
, errp
)) {
866 machine_parse_smp_config(ms
, config
, errp
);
869 static void machine_get_boot(Object
*obj
, Visitor
*v
, const char *name
,
870 void *opaque
, Error
**errp
)
872 MachineState
*ms
= MACHINE(obj
);
873 BootConfiguration
*config
= &ms
->boot_config
;
874 visit_type_BootConfiguration(v
, name
, &config
, &error_abort
);
877 static void machine_free_boot_config(MachineState
*ms
)
879 g_free(ms
->boot_config
.order
);
880 g_free(ms
->boot_config
.once
);
881 g_free(ms
->boot_config
.splash
);
884 static void machine_copy_boot_config(MachineState
*ms
, BootConfiguration
*config
)
886 MachineClass
*machine_class
= MACHINE_GET_CLASS(ms
);
888 machine_free_boot_config(ms
);
889 ms
->boot_config
= *config
;
890 if (!config
->order
) {
891 ms
->boot_config
.order
= g_strdup(machine_class
->default_boot_order
);
895 static void machine_set_boot(Object
*obj
, Visitor
*v
, const char *name
,
896 void *opaque
, Error
**errp
)
899 MachineState
*ms
= MACHINE(obj
);
900 BootConfiguration
*config
= NULL
;
902 if (!visit_type_BootConfiguration(v
, name
, &config
, errp
)) {
906 validate_bootdevices(config
->order
, errp
);
912 validate_bootdevices(config
->once
, errp
);
918 machine_copy_boot_config(ms
, config
);
919 /* Strings live in ms->boot_config. */
924 qapi_free_BootConfiguration(config
);
927 static void machine_class_init(ObjectClass
*oc
, void *data
)
929 MachineClass
*mc
= MACHINE_CLASS(oc
);
931 /* Default 128 MB as guest ram size */
932 mc
->default_ram_size
= 128 * MiB
;
933 mc
->rom_file_has_mr
= true;
935 /* numa node memory size aligned on 8MB by default.
936 * On Linux, each node's border has to be 8MB aligned
938 mc
->numa_mem_align_shift
= 23;
940 object_class_property_add_str(oc
, "kernel",
941 machine_get_kernel
, machine_set_kernel
);
942 object_class_property_set_description(oc
, "kernel",
943 "Linux kernel image file");
945 object_class_property_add_str(oc
, "initrd",
946 machine_get_initrd
, machine_set_initrd
);
947 object_class_property_set_description(oc
, "initrd",
948 "Linux initial ramdisk file");
950 object_class_property_add_str(oc
, "append",
951 machine_get_append
, machine_set_append
);
952 object_class_property_set_description(oc
, "append",
953 "Linux kernel command line");
955 object_class_property_add_str(oc
, "dtb",
956 machine_get_dtb
, machine_set_dtb
);
957 object_class_property_set_description(oc
, "dtb",
958 "Linux kernel device tree file");
960 object_class_property_add_str(oc
, "dumpdtb",
961 machine_get_dumpdtb
, machine_set_dumpdtb
);
962 object_class_property_set_description(oc
, "dumpdtb",
963 "Dump current dtb to a file and quit");
965 object_class_property_add(oc
, "boot", "BootConfiguration",
966 machine_get_boot
, machine_set_boot
,
968 object_class_property_set_description(oc
, "boot",
969 "Boot configuration");
971 object_class_property_add(oc
, "smp", "SMPConfiguration",
972 machine_get_smp
, machine_set_smp
,
974 object_class_property_set_description(oc
, "smp",
977 object_class_property_add(oc
, "phandle-start", "int",
978 machine_get_phandle_start
, machine_set_phandle_start
,
980 object_class_property_set_description(oc
, "phandle-start",
981 "The first phandle ID we may generate dynamically");
983 object_class_property_add_str(oc
, "dt-compatible",
984 machine_get_dt_compatible
, machine_set_dt_compatible
);
985 object_class_property_set_description(oc
, "dt-compatible",
986 "Overrides the \"compatible\" property of the dt root node");
988 object_class_property_add_bool(oc
, "dump-guest-core",
989 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
990 object_class_property_set_description(oc
, "dump-guest-core",
991 "Include guest memory in a core dump");
993 object_class_property_add_bool(oc
, "mem-merge",
994 machine_get_mem_merge
, machine_set_mem_merge
);
995 object_class_property_set_description(oc
, "mem-merge",
996 "Enable/disable memory merge support");
998 object_class_property_add_bool(oc
, "usb",
999 machine_get_usb
, machine_set_usb
);
1000 object_class_property_set_description(oc
, "usb",
1001 "Set on/off to enable/disable usb");
1003 object_class_property_add_bool(oc
, "graphics",
1004 machine_get_graphics
, machine_set_graphics
);
1005 object_class_property_set_description(oc
, "graphics",
1006 "Set on/off to enable/disable graphics emulation");
1008 object_class_property_add_str(oc
, "firmware",
1009 machine_get_firmware
, machine_set_firmware
);
1010 object_class_property_set_description(oc
, "firmware",
1013 object_class_property_add_bool(oc
, "suppress-vmdesc",
1014 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
1015 object_class_property_set_description(oc
, "suppress-vmdesc",
1016 "Set on to disable self-describing migration");
1018 object_class_property_add_link(oc
, "confidential-guest-support",
1019 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
1020 offsetof(MachineState
, cgs
),
1021 machine_check_confidential_guest_support
,
1022 OBJ_PROP_LINK_STRONG
);
1023 object_class_property_set_description(oc
, "confidential-guest-support",
1024 "Set confidential guest scheme to support");
1026 /* For compatibility */
1027 object_class_property_add_str(oc
, "memory-encryption",
1028 machine_get_memory_encryption
, machine_set_memory_encryption
);
1029 object_class_property_set_description(oc
, "memory-encryption",
1030 "Set memory encryption object to use");
1032 object_class_property_add_link(oc
, "memory-backend", TYPE_MEMORY_BACKEND
,
1033 offsetof(MachineState
, memdev
), object_property_allow_set_link
,
1034 OBJ_PROP_LINK_STRONG
);
1035 object_class_property_set_description(oc
, "memory-backend",
1037 "Valid value is ID of hostmem based backend");
1039 object_class_property_add(oc
, "memory", "MemorySizeConfiguration",
1040 machine_get_mem
, machine_set_mem
,
1042 object_class_property_set_description(oc
, "memory",
1043 "Memory size configuration");
1046 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
1048 MachineClass
*mc
= MACHINE_CLASS(oc
);
1049 mc
->max_cpus
= mc
->max_cpus
?: 1;
1050 mc
->min_cpus
= mc
->min_cpus
?: 1;
1051 mc
->default_cpus
= mc
->default_cpus
?: 1;
1053 if (!object_class_is_abstract(oc
)) {
1054 const char *cname
= object_class_get_name(oc
);
1055 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
1056 mc
->name
= g_strndup(cname
,
1057 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
1058 mc
->compat_props
= g_ptr_array_new();
1062 static void machine_initfn(Object
*obj
)
1064 MachineState
*ms
= MACHINE(obj
);
1065 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
1067 container_get(obj
, "/peripheral");
1068 container_get(obj
, "/peripheral-anon");
1070 ms
->dump_guest_core
= true;
1071 ms
->mem_merge
= true;
1072 ms
->enable_graphics
= true;
1073 ms
->kernel_cmdline
= g_strdup("");
1074 ms
->ram_size
= mc
->default_ram_size
;
1075 ms
->maxram_size
= mc
->default_ram_size
;
1077 if (mc
->nvdimm_supported
) {
1078 Object
*obj
= OBJECT(ms
);
1080 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
1081 object_property_add_bool(obj
, "nvdimm",
1082 machine_get_nvdimm
, machine_set_nvdimm
);
1083 object_property_set_description(obj
, "nvdimm",
1084 "Set on/off to enable/disable "
1085 "NVDIMM instantiation");
1087 object_property_add_str(obj
, "nvdimm-persistence",
1088 machine_get_nvdimm_persistence
,
1089 machine_set_nvdimm_persistence
);
1090 object_property_set_description(obj
, "nvdimm-persistence",
1091 "Set NVDIMM persistence"
1092 "Valid values are cpu, mem-ctrl");
1095 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
1096 ms
->numa_state
= g_new0(NumaState
, 1);
1097 object_property_add_bool(obj
, "hmat",
1098 machine_get_hmat
, machine_set_hmat
);
1099 object_property_set_description(obj
, "hmat",
1100 "Set on/off to enable/disable "
1101 "ACPI Heterogeneous Memory Attribute "
1105 /* default to mc->default_cpus */
1106 ms
->smp
.cpus
= mc
->default_cpus
;
1107 ms
->smp
.max_cpus
= mc
->default_cpus
;
1108 ms
->smp
.sockets
= 1;
1110 ms
->smp
.clusters
= 1;
1112 ms
->smp
.threads
= 1;
1114 machine_copy_boot_config(ms
, &(BootConfiguration
){ 0 });
1117 static void machine_finalize(Object
*obj
)
1119 MachineState
*ms
= MACHINE(obj
);
1121 machine_free_boot_config(ms
);
1122 g_free(ms
->kernel_filename
);
1123 g_free(ms
->initrd_filename
);
1124 g_free(ms
->kernel_cmdline
);
1126 g_free(ms
->dumpdtb
);
1127 g_free(ms
->dt_compatible
);
1128 g_free(ms
->firmware
);
1129 g_free(ms
->device_memory
);
1130 g_free(ms
->nvdimms_state
);
1131 g_free(ms
->numa_state
);
1134 bool machine_usb(MachineState
*machine
)
1136 return machine
->usb
;
1139 int machine_phandle_start(MachineState
*machine
)
1141 return machine
->phandle_start
;
1144 bool machine_dump_guest_core(MachineState
*machine
)
1146 return machine
->dump_guest_core
;
1149 bool machine_mem_merge(MachineState
*machine
)
1151 return machine
->mem_merge
;
1154 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
1156 GString
*s
= g_string_new(NULL
);
1157 if (cpu
->props
.has_socket_id
) {
1158 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1160 if (cpu
->props
.has_die_id
) {
1162 g_string_append_printf(s
, ", ");
1164 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1166 if (cpu
->props
.has_cluster_id
) {
1168 g_string_append_printf(s
, ", ");
1170 g_string_append_printf(s
, "cluster-id: %"PRId64
, cpu
->props
.cluster_id
);
1172 if (cpu
->props
.has_core_id
) {
1174 g_string_append_printf(s
, ", ");
1176 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1178 if (cpu
->props
.has_thread_id
) {
1180 g_string_append_printf(s
, ", ");
1182 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1184 return g_string_free(s
, false);
1187 static void numa_validate_initiator(NumaState
*numa_state
)
1190 NodeInfo
*numa_info
= numa_state
->nodes
;
1192 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1193 if (numa_info
[i
].initiator
== MAX_NODES
) {
1197 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1198 error_report("NUMA node %" PRIu16
" is missing, use "
1199 "'-numa node' option to declare it first",
1200 numa_info
[i
].initiator
);
1204 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1205 error_report("The initiator of NUMA node %d is invalid", i
);
1211 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1214 bool default_mapping
;
1215 GString
*s
= g_string_new(NULL
);
1216 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1217 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1219 assert(machine
->numa_state
->num_nodes
);
1220 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1221 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1225 default_mapping
= (i
== possible_cpus
->len
);
1227 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1228 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1230 if (!cpu_slot
->props
.has_node_id
) {
1231 /* fetch default mapping from board and enable it */
1232 CpuInstanceProperties props
= cpu_slot
->props
;
1234 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1235 if (!default_mapping
) {
1236 /* record slots with not set mapping,
1237 * TODO: make it hard error in future */
1238 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1239 g_string_append_printf(s
, "%sCPU %d [%s]",
1240 s
->len
? ", " : "", i
, cpu_str
);
1243 /* non mapped cpus used to fallback to node 0 */
1247 props
.has_node_id
= true;
1248 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1252 if (machine
->numa_state
->hmat_enabled
) {
1253 numa_validate_initiator(machine
->numa_state
);
1256 if (s
->len
&& !qtest_enabled()) {
1257 warn_report("CPU(s) not present in any NUMA nodes: %s",
1259 warn_report("All CPU(s) up to maxcpus should be described "
1260 "in NUMA config, ability to start up with partial NUMA "
1261 "mappings is obsoleted and will be removed in future");
1263 g_string_free(s
, true);
1266 static void validate_cpu_cluster_to_numa_boundary(MachineState
*ms
)
1268 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1269 NumaState
*state
= ms
->numa_state
;
1270 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
1271 const CPUArchId
*cpus
= possible_cpus
->cpus
;
1274 if (state
->num_nodes
<= 1 || possible_cpus
->len
<= 1) {
1279 * The Linux scheduling domain can't be parsed when the multiple CPUs
1280 * in one cluster have been associated with different NUMA nodes. However,
1281 * it's fine to associate one NUMA node with CPUs in different clusters.
1283 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1284 for (j
= i
+ 1; j
< possible_cpus
->len
; j
++) {
1285 if (cpus
[i
].props
.has_socket_id
&&
1286 cpus
[i
].props
.has_cluster_id
&&
1287 cpus
[i
].props
.has_node_id
&&
1288 cpus
[j
].props
.has_socket_id
&&
1289 cpus
[j
].props
.has_cluster_id
&&
1290 cpus
[j
].props
.has_node_id
&&
1291 cpus
[i
].props
.socket_id
== cpus
[j
].props
.socket_id
&&
1292 cpus
[i
].props
.cluster_id
== cpus
[j
].props
.cluster_id
&&
1293 cpus
[i
].props
.node_id
!= cpus
[j
].props
.node_id
) {
1294 warn_report("CPU-%d and CPU-%d in socket-%" PRId64
"-cluster-%" PRId64
1295 " have been associated with node-%" PRId64
" and node-%" PRId64
1296 " respectively. It can cause OSes like Linux to"
1297 " misbehave", i
, j
, cpus
[i
].props
.socket_id
,
1298 cpus
[i
].props
.cluster_id
, cpus
[i
].props
.node_id
,
1299 cpus
[j
].props
.node_id
);
1305 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1306 HostMemoryBackend
*backend
)
1308 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1310 if (host_memory_backend_is_mapped(backend
)) {
1311 error_report("memory backend %s can't be used multiple times.",
1312 object_get_canonical_path_component(OBJECT(backend
)));
1315 host_memory_backend_set_mapped(backend
, true);
1316 vmstate_register_ram_global(ret
);
1320 static bool create_default_memdev(MachineState
*ms
, const char *path
, Error
**errp
)
1323 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1326 obj
= object_new(path
? TYPE_MEMORY_BACKEND_FILE
: TYPE_MEMORY_BACKEND_RAM
);
1328 if (!object_property_set_str(obj
, "mem-path", path
, errp
)) {
1332 if (!object_property_set_int(obj
, "size", ms
->ram_size
, errp
)) {
1335 object_property_add_child(object_get_objects_root(), mc
->default_ram_id
,
1337 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1338 if (!object_property_set_bool(obj
, "x-use-canonical-path-for-ramblock-id",
1342 if (!user_creatable_complete(USER_CREATABLE(obj
), errp
)) {
1345 r
= object_property_set_link(OBJECT(ms
), "memory-backend", obj
, errp
);
1353 void machine_run_board_init(MachineState
*machine
, const char *mem_path
, Error
**errp
)
1355 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1356 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1359 /* This checkpoint is required by replay to separate prior clock
1360 reading from the other reads, because timer polling functions query
1361 clock values from the log. */
1362 replay_checkpoint(CHECKPOINT_INIT
);
1364 if (!xen_enabled()) {
1365 /* On 32-bit hosts, QEMU is limited by virtual address space */
1366 if (machine
->ram_size
> (2047 << 20) && HOST_LONG_BITS
== 32) {
1367 error_setg(errp
, "at most 2047 MB RAM can be simulated");
1372 if (machine
->memdev
) {
1373 ram_addr_t backend_size
= object_property_get_uint(OBJECT(machine
->memdev
),
1374 "size", &error_abort
);
1375 if (backend_size
!= machine
->ram_size
) {
1376 error_setg(errp
, "Machine memory size does not match the size of the memory backend");
1379 } else if (machine_class
->default_ram_id
&& machine
->ram_size
&&
1380 numa_uses_legacy_mem()) {
1381 if (object_property_find(object_get_objects_root(),
1382 machine_class
->default_ram_id
)) {
1383 error_setg(errp
, "object name '%s' is reserved for the default"
1384 " RAM backend, it can't be used for any other purposes."
1385 " Change the object's 'id' to something else",
1386 machine_class
->default_ram_id
);
1389 if (!create_default_memdev(current_machine
, mem_path
, errp
)) {
1394 if (machine
->numa_state
) {
1395 numa_complete_configuration(machine
);
1396 if (machine
->numa_state
->num_nodes
) {
1397 machine_numa_finish_cpu_init(machine
);
1398 if (machine_class
->cpu_cluster_has_numa_boundary
) {
1399 validate_cpu_cluster_to_numa_boundary(machine
);
1404 if (!machine
->ram
&& machine
->memdev
) {
1405 machine
->ram
= machine_consume_memdev(machine
, machine
->memdev
);
1408 /* If the machine supports the valid_cpu_types check and the user
1409 * specified a CPU with -cpu check here that the user CPU is supported.
1411 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1414 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1415 if (object_class_dynamic_cast(oc
,
1416 machine_class
->valid_cpu_types
[i
])) {
1417 /* The user specificed CPU is in the valid field, we are
1424 if (!machine_class
->valid_cpu_types
[i
]) {
1425 /* The user specified CPU is not valid */
1426 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1427 error_printf("The valid types are: %s",
1428 machine_class
->valid_cpu_types
[0]);
1429 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1430 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1438 /* Check if CPU type is deprecated and warn if so */
1440 if (cc
&& cc
->deprecation_note
) {
1441 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1442 cc
->deprecation_note
);
1447 * With confidential guests, the host can't see the real
1448 * contents of RAM, so there's no point in it trying to merge
1451 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1454 * Virtio devices can't count on directly accessing guest
1455 * memory, so they need iommu_platform=on to use normal DMA
1456 * mechanisms. That requires also disabling legacy virtio
1457 * support for those virtio pci devices which allow it.
1459 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1461 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1465 accel_init_interfaces(ACCEL_GET_CLASS(machine
->accelerator
));
1466 machine_class
->init(machine
);
1467 phase_advance(PHASE_MACHINE_INITIALIZED
);
1470 static NotifierList machine_init_done_notifiers
=
1471 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1473 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1475 notifier_list_add(&machine_init_done_notifiers
, notify
);
1476 if (phase_check(PHASE_MACHINE_READY
)) {
1477 notify
->notify(notify
, NULL
);
1481 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1483 notifier_remove(notify
);
1486 void qdev_machine_creation_done(void)
1488 cpu_synchronize_all_post_init();
1490 if (current_machine
->boot_config
.once
) {
1491 qemu_boot_set(current_machine
->boot_config
.once
, &error_fatal
);
1492 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_config
.order
));
1496 * ok, initial machine setup is done, starting from now we can
1497 * only create hotpluggable devices
1499 phase_advance(PHASE_MACHINE_READY
);
1500 qdev_assert_realized_properly();
1502 /* TODO: once all bus devices are qdevified, this should be done
1503 * when bus is created by qdev.c */
1505 * TODO: If we had a main 'reset container' that the whole system
1506 * lived in, we could reset that using the multi-phase reset
1507 * APIs. For the moment, we just reset the sysbus, which will cause
1508 * all devices hanging off it (and all their child buses, recursively)
1509 * to be reset. Note that this will *not* reset any Device objects
1510 * which are not attached to some part of the qbus tree!
1512 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1514 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1516 if (rom_check_and_register_reset() != 0) {
1522 /* This checkpoint is required by replay to separate prior clock
1523 reading from the other reads, because timer polling functions query
1524 clock values from the log. */
1525 replay_checkpoint(CHECKPOINT_RESET
);
1526 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1527 register_global_state();
1530 static const TypeInfo machine_info
= {
1531 .name
= TYPE_MACHINE
,
1532 .parent
= TYPE_OBJECT
,
1534 .class_size
= sizeof(MachineClass
),
1535 .class_init
= machine_class_init
,
1536 .class_base_init
= machine_class_base_init
,
1537 .instance_size
= sizeof(MachineState
),
1538 .instance_init
= machine_initfn
,
1539 .instance_finalize
= machine_finalize
,
1542 static void machine_register_types(void)
1544 type_register_static(&machine_info
);
1547 type_init(machine_register_types
)