hw/display/ati_int.h

   1 /*
   2  * QEMU ATI SVGA emulation
   3  *
   4  * Copyright (c) 2019 BALATON Zoltan
   5  *
   6  * This work is licensed under the GNU GPL license version 2 or later.
   7  */
   8
   9 #ifndef ATI_INT_H
  10 #define ATI_INT_H
  11
  12 #include "hw/pci/pci.h"
  13 #include "hw/i2c/bitbang_i2c.h"
  14 #include "vga_int.h"
  15
  16 /*#define DEBUG_ATI*/
  17
  18 #ifdef DEBUG_ATI
  19 #define DPRINTF(fmt, ...) printf("%s: " fmt, __func__, ## __VA_ARGS__)
  20 #else
  21 #define DPRINTF(fmt, ...) do {} while (0)
  22 #endif
  23
  24 #define PCI_VENDOR_ID_ATI 0x1002
  25 /* Rage128 Pro GL */
  26 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046
  27 /* Radeon RV100 (VE) */
  28 #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
  29
  30 #define TYPE_ATI_VGA "ati-vga"
  31 #define ATI_VGA(obj) OBJECT_CHECK(ATIVGAState, (obj), TYPE_ATI_VGA)
  32
  33 typedef struct ATIVGARegs {
  34     uint32_t mm_index;
  35     uint32_t bios_scratch[8];
  36     uint32_t crtc_gen_cntl;
  37     uint32_t crtc_ext_cntl;
  38     uint32_t dac_cntl;
  39     uint32_t gpio_vga_ddc;
  40     uint32_t gpio_dvi_ddc;
  41     uint32_t gpio_monid;
  42     uint32_t crtc_h_total_disp;
  43     uint32_t crtc_h_sync_strt_wid;
  44     uint32_t crtc_v_total_disp;
  45     uint32_t crtc_v_sync_strt_wid;
  46     uint32_t crtc_offset;
  47     uint32_t crtc_offset_cntl;
  48     uint32_t crtc_pitch;
  49     uint32_t cur_offset;
  50     uint32_t cur_hv_pos;
  51     uint32_t cur_hv_offs;
  52     uint32_t cur_color0;
  53     uint32_t cur_color1;
  54     uint32_t dst_offset;
  55     uint32_t dst_pitch;
  56     uint32_t dst_tile;
  57     uint32_t dst_width;
  58     uint32_t dst_height;
  59     uint32_t src_offset;
  60     uint32_t src_pitch;
  61     uint32_t src_tile;
  62     uint32_t src_x;
  63     uint32_t src_y;
  64     uint32_t dst_x;
  65     uint32_t dst_y;
  66     uint32_t dp_gui_master_cntl;
  67     uint32_t dp_brush_bkgd_clr;
  68     uint32_t dp_brush_frgd_clr;
  69     uint32_t dp_src_frgd_clr;
  70     uint32_t dp_src_bkgd_clr;
  71     uint32_t dp_cntl;
  72     uint32_t dp_datatype;
  73     uint32_t dp_mix;
  74     uint32_t dp_write_mask;
  75     uint32_t default_offset;
  76     uint32_t default_pitch;
  77     uint32_t default_tile;
  78     uint32_t default_sc_bottom_right;
  79 } ATIVGARegs;
  80
  81 typedef struct ATIVGAState {
  82     PCIDevice dev;
  83     VGACommonState vga;
  84     char *model;
  85     uint16_t dev_id;
  86     uint8_t mode;
  87     bool cursor_guest_mode;
  88     uint16_t cursor_size;
  89     uint32_t cursor_offset;
  90     QEMUCursor *cursor;
  91     bitbang_i2c_interface *bbi2c;
  92     MemoryRegion io;
  93     MemoryRegion mm;
  94     ATIVGARegs regs;
  95 } ATIVGAState;
  96
  97 const char *ati_reg_name(int num);
  98
  99 void ati_2d_blt(ATIVGAState *s);
 100
 101 #endif /* ATI_INT_H */