2 * QEMU PCI VGA Emulator.
4 * see docs/specs/standard-vga.txt for virtual hardware specs.
6 * Copyright (c) 2003 Fabrice Bellard
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "ui/console.h"
28 #include "hw/pci/pci.h"
30 #include "ui/pixel_ops.h"
31 #include "qemu/timer.h"
32 #include "hw/loader.h"
34 #define PCI_VGA_IOPORT_OFFSET 0x400
35 #define PCI_VGA_IOPORT_SIZE (0x3e0 - 0x3c0)
36 #define PCI_VGA_BOCHS_OFFSET 0x500
37 #define PCI_VGA_BOCHS_SIZE (0x0b * 2)
38 #define PCI_VGA_MMIO_SIZE 0x1000
41 PCI_VGA_FLAG_ENABLE_MMIO
= 1,
44 typedef struct PCIVGAState
{
53 static const VMStateDescription vmstate_vga_pci
= {
56 .minimum_version_id
= 2,
57 .minimum_version_id_old
= 2,
58 .fields
= (VMStateField
[]) {
59 VMSTATE_PCI_DEVICE(dev
, PCIVGAState
),
60 VMSTATE_STRUCT(vga
, PCIVGAState
, 0, vmstate_vga_common
, VGACommonState
),
65 static uint64_t pci_vga_ioport_read(void *ptr
, hwaddr addr
,
73 ret
= vga_ioport_read(&d
->vga
, addr
);
76 ret
= vga_ioport_read(&d
->vga
, addr
);
77 ret
|= vga_ioport_read(&d
->vga
, addr
+1) << 8;
83 static void pci_vga_ioport_write(void *ptr
, hwaddr addr
,
84 uint64_t val
, unsigned size
)
90 vga_ioport_write(&d
->vga
, addr
+ 0x3c0, val
);
94 * Update bytes in little endian order. Allows to update
95 * indexed registers with a single word write because the
96 * index byte is updated first.
98 vga_ioport_write(&d
->vga
, addr
+ 0x3c0, val
& 0xff);
99 vga_ioport_write(&d
->vga
, addr
+ 0x3c1, (val
>> 8) & 0xff);
104 static const MemoryRegionOps pci_vga_ioport_ops
= {
105 .read
= pci_vga_ioport_read
,
106 .write
= pci_vga_ioport_write
,
107 .valid
.min_access_size
= 1,
108 .valid
.max_access_size
= 4,
109 .impl
.min_access_size
= 1,
110 .impl
.max_access_size
= 2,
111 .endianness
= DEVICE_LITTLE_ENDIAN
,
114 static uint64_t pci_vga_bochs_read(void *ptr
, hwaddr addr
,
117 PCIVGAState
*d
= ptr
;
118 int index
= addr
>> 1;
120 vbe_ioport_write_index(&d
->vga
, 0, index
);
121 return vbe_ioport_read_data(&d
->vga
, 0);
124 static void pci_vga_bochs_write(void *ptr
, hwaddr addr
,
125 uint64_t val
, unsigned size
)
127 PCIVGAState
*d
= ptr
;
128 int index
= addr
>> 1;
130 vbe_ioport_write_index(&d
->vga
, 0, index
);
131 vbe_ioport_write_data(&d
->vga
, 0, val
);
134 static const MemoryRegionOps pci_vga_bochs_ops
= {
135 .read
= pci_vga_bochs_read
,
136 .write
= pci_vga_bochs_write
,
137 .valid
.min_access_size
= 1,
138 .valid
.max_access_size
= 4,
139 .impl
.min_access_size
= 2,
140 .impl
.max_access_size
= 2,
141 .endianness
= DEVICE_LITTLE_ENDIAN
,
144 static int pci_std_vga_initfn(PCIDevice
*dev
)
146 PCIVGAState
*d
= DO_UPCAST(PCIVGAState
, dev
, dev
);
147 VGACommonState
*s
= &d
->vga
;
149 /* vga + console init */
150 vga_common_init(s
, OBJECT(dev
));
151 vga_init(s
, OBJECT(dev
), pci_address_space(dev
), pci_address_space_io(dev
),
154 s
->con
= graphic_console_init(DEVICE(dev
), s
->hw_ops
, s
);
156 /* XXX: VGA_RAM_SIZE must be a power of two */
157 pci_register_bar(&d
->dev
, 0, PCI_BASE_ADDRESS_MEM_PREFETCH
, &s
->vram
);
159 /* mmio bar for vga register access */
160 if (d
->flags
& (1 << PCI_VGA_FLAG_ENABLE_MMIO
)) {
161 memory_region_init(&d
->mmio
, NULL
, "vga.mmio", 4096);
162 memory_region_init_io(&d
->ioport
, NULL
, &pci_vga_ioport_ops
, d
,
163 "vga ioports remapped", PCI_VGA_IOPORT_SIZE
);
164 memory_region_init_io(&d
->bochs
, NULL
, &pci_vga_bochs_ops
, d
,
165 "bochs dispi interface", PCI_VGA_BOCHS_SIZE
);
167 memory_region_add_subregion(&d
->mmio
, PCI_VGA_IOPORT_OFFSET
,
169 memory_region_add_subregion(&d
->mmio
, PCI_VGA_BOCHS_OFFSET
,
171 pci_register_bar(&d
->dev
, 2, PCI_BASE_ADDRESS_SPACE_MEMORY
, &d
->mmio
);
175 /* compatibility with pc-0.13 and older */
176 vga_init_vbe(s
, OBJECT(dev
), pci_address_space(dev
));
182 static Property vga_pci_properties
[] = {
183 DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState
, vga
.vram_size_mb
, 16),
184 DEFINE_PROP_BIT("mmio", PCIVGAState
, flags
, PCI_VGA_FLAG_ENABLE_MMIO
, true),
185 DEFINE_PROP_END_OF_LIST(),
188 static void vga_class_init(ObjectClass
*klass
, void *data
)
190 DeviceClass
*dc
= DEVICE_CLASS(klass
);
191 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
193 k
->init
= pci_std_vga_initfn
;
194 k
->romfile
= "vgabios-stdvga.bin";
195 k
->vendor_id
= PCI_VENDOR_ID_QEMU
;
196 k
->device_id
= PCI_DEVICE_ID_QEMU_VGA
;
197 k
->class_id
= PCI_CLASS_DISPLAY_VGA
;
198 dc
->vmsd
= &vmstate_vga_pci
;
199 dc
->props
= vga_pci_properties
;
200 dc
->hotpluggable
= false;
201 set_bit(DEVICE_CATEGORY_DISPLAY
, dc
->categories
);
204 static const TypeInfo vga_info
= {
206 .parent
= TYPE_PCI_DEVICE
,
207 .instance_size
= sizeof(PCIVGAState
),
208 .class_init
= vga_class_init
,
211 static void vga_register_types(void)
213 type_register_static(&vga_info
);
216 type_init(vga_register_types
)