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[mirror_qemu.git] / hw / display / virtio-gpu.c
1 /*
2 * Virtio GPU Device
3 *
4 * Copyright Red Hat, Inc. 2013-2014
5 *
6 * Authors:
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
12 */
13
14 #include "qemu/osdep.h"
15 #include "qemu-common.h"
16 #include "qemu/iov.h"
17 #include "ui/console.h"
18 #include "trace.h"
19 #include "hw/virtio/virtio.h"
20 #include "hw/virtio/virtio-gpu.h"
21 #include "hw/virtio/virtio-bus.h"
22 #include "migration/blocker.h"
23 #include "qemu/log.h"
24 #include "qapi/error.h"
25
26 #define VIRTIO_GPU_VM_VERSION 1
27
28 static struct virtio_gpu_simple_resource*
29 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
30
31 static void virtio_gpu_cleanup_mapping(struct virtio_gpu_simple_resource *res);
32
33 static void
34 virtio_gpu_ctrl_hdr_bswap(struct virtio_gpu_ctrl_hdr *hdr)
35 {
36 le32_to_cpus(&hdr->type);
37 le32_to_cpus(&hdr->flags);
38 le64_to_cpus(&hdr->fence_id);
39 le32_to_cpus(&hdr->ctx_id);
40 le32_to_cpus(&hdr->padding);
41 }
42
43 static void virtio_gpu_bswap_32(void *ptr,
44 size_t size)
45 {
46 #ifdef HOST_WORDS_BIGENDIAN
47
48 size_t i;
49 struct virtio_gpu_ctrl_hdr *hdr = (struct virtio_gpu_ctrl_hdr *) ptr;
50
51 virtio_gpu_ctrl_hdr_bswap(hdr);
52
53 i = sizeof(struct virtio_gpu_ctrl_hdr);
54 while (i < size) {
55 le32_to_cpus((uint32_t *)(ptr + i));
56 i = i + sizeof(uint32_t);
57 }
58
59 #endif
60 }
61
62 static void
63 virtio_gpu_t2d_bswap(struct virtio_gpu_transfer_to_host_2d *t2d)
64 {
65 virtio_gpu_ctrl_hdr_bswap(&t2d->hdr);
66 le32_to_cpus(&t2d->r.x);
67 le32_to_cpus(&t2d->r.y);
68 le32_to_cpus(&t2d->r.width);
69 le32_to_cpus(&t2d->r.height);
70 le64_to_cpus(&t2d->offset);
71 le32_to_cpus(&t2d->resource_id);
72 le32_to_cpus(&t2d->padding);
73 }
74
75 #ifdef CONFIG_VIRGL
76 #include <virglrenderer.h>
77 #define VIRGL(_g, _virgl, _simple, ...) \
78 do { \
79 if (_g->use_virgl_renderer) { \
80 _virgl(__VA_ARGS__); \
81 } else { \
82 _simple(__VA_ARGS__); \
83 } \
84 } while (0)
85 #else
86 #define VIRGL(_g, _virgl, _simple, ...) \
87 do { \
88 _simple(__VA_ARGS__); \
89 } while (0)
90 #endif
91
92 static void update_cursor_data_simple(VirtIOGPU *g,
93 struct virtio_gpu_scanout *s,
94 uint32_t resource_id)
95 {
96 struct virtio_gpu_simple_resource *res;
97 uint32_t pixels;
98
99 res = virtio_gpu_find_resource(g, resource_id);
100 if (!res) {
101 return;
102 }
103
104 if (pixman_image_get_width(res->image) != s->current_cursor->width ||
105 pixman_image_get_height(res->image) != s->current_cursor->height) {
106 return;
107 }
108
109 pixels = s->current_cursor->width * s->current_cursor->height;
110 memcpy(s->current_cursor->data,
111 pixman_image_get_data(res->image),
112 pixels * sizeof(uint32_t));
113 }
114
115 #ifdef CONFIG_VIRGL
116
117 static void update_cursor_data_virgl(VirtIOGPU *g,
118 struct virtio_gpu_scanout *s,
119 uint32_t resource_id)
120 {
121 uint32_t width, height;
122 uint32_t pixels, *data;
123
124 data = virgl_renderer_get_cursor_data(resource_id, &width, &height);
125 if (!data) {
126 return;
127 }
128
129 if (width != s->current_cursor->width ||
130 height != s->current_cursor->height) {
131 free(data);
132 return;
133 }
134
135 pixels = s->current_cursor->width * s->current_cursor->height;
136 memcpy(s->current_cursor->data, data, pixels * sizeof(uint32_t));
137 free(data);
138 }
139
140 #endif
141
142 static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor)
143 {
144 struct virtio_gpu_scanout *s;
145 bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR;
146
147 if (cursor->pos.scanout_id >= g->conf.max_outputs) {
148 return;
149 }
150 s = &g->scanout[cursor->pos.scanout_id];
151
152 trace_virtio_gpu_update_cursor(cursor->pos.scanout_id,
153 cursor->pos.x,
154 cursor->pos.y,
155 move ? "move" : "update",
156 cursor->resource_id);
157
158 if (!move) {
159 if (!s->current_cursor) {
160 s->current_cursor = cursor_alloc(64, 64);
161 }
162
163 s->current_cursor->hot_x = cursor->hot_x;
164 s->current_cursor->hot_y = cursor->hot_y;
165
166 if (cursor->resource_id > 0) {
167 VIRGL(g, update_cursor_data_virgl, update_cursor_data_simple,
168 g, s, cursor->resource_id);
169 }
170 dpy_cursor_define(s->con, s->current_cursor);
171
172 s->cursor = *cursor;
173 } else {
174 s->cursor.pos.x = cursor->pos.x;
175 s->cursor.pos.y = cursor->pos.y;
176 }
177 dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y,
178 cursor->resource_id ? 1 : 0);
179 }
180
181 static void virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config)
182 {
183 VirtIOGPU *g = VIRTIO_GPU(vdev);
184 memcpy(config, &g->virtio_config, sizeof(g->virtio_config));
185 }
186
187 static void virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config)
188 {
189 VirtIOGPU *g = VIRTIO_GPU(vdev);
190 struct virtio_gpu_config vgconfig;
191
192 memcpy(&vgconfig, config, sizeof(g->virtio_config));
193
194 if (vgconfig.events_clear) {
195 g->virtio_config.events_read &= ~vgconfig.events_clear;
196 }
197 }
198
199 static uint64_t virtio_gpu_get_features(VirtIODevice *vdev, uint64_t features,
200 Error **errp)
201 {
202 VirtIOGPU *g = VIRTIO_GPU(vdev);
203
204 if (virtio_gpu_virgl_enabled(g->conf)) {
205 features |= (1 << VIRTIO_GPU_F_VIRGL);
206 }
207 return features;
208 }
209
210 static void virtio_gpu_set_features(VirtIODevice *vdev, uint64_t features)
211 {
212 static const uint32_t virgl = (1 << VIRTIO_GPU_F_VIRGL);
213 VirtIOGPU *g = VIRTIO_GPU(vdev);
214
215 g->use_virgl_renderer = ((features & virgl) == virgl);
216 trace_virtio_gpu_features(g->use_virgl_renderer);
217 }
218
219 static void virtio_gpu_notify_event(VirtIOGPU *g, uint32_t event_type)
220 {
221 g->virtio_config.events_read |= event_type;
222 virtio_notify_config(&g->parent_obj);
223 }
224
225 static struct virtio_gpu_simple_resource *
226 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id)
227 {
228 struct virtio_gpu_simple_resource *res;
229
230 QTAILQ_FOREACH(res, &g->reslist, next) {
231 if (res->resource_id == resource_id) {
232 return res;
233 }
234 }
235 return NULL;
236 }
237
238 void virtio_gpu_ctrl_response(VirtIOGPU *g,
239 struct virtio_gpu_ctrl_command *cmd,
240 struct virtio_gpu_ctrl_hdr *resp,
241 size_t resp_len)
242 {
243 size_t s;
244
245 if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) {
246 resp->flags |= VIRTIO_GPU_FLAG_FENCE;
247 resp->fence_id = cmd->cmd_hdr.fence_id;
248 resp->ctx_id = cmd->cmd_hdr.ctx_id;
249 }
250 virtio_gpu_ctrl_hdr_bswap(resp);
251 s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len);
252 if (s != resp_len) {
253 qemu_log_mask(LOG_GUEST_ERROR,
254 "%s: response size incorrect %zu vs %zu\n",
255 __func__, s, resp_len);
256 }
257 virtqueue_push(cmd->vq, &cmd->elem, s);
258 virtio_notify(VIRTIO_DEVICE(g), cmd->vq);
259 cmd->finished = true;
260 }
261
262 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
263 struct virtio_gpu_ctrl_command *cmd,
264 enum virtio_gpu_ctrl_type type)
265 {
266 struct virtio_gpu_ctrl_hdr resp;
267
268 memset(&resp, 0, sizeof(resp));
269 resp.type = type;
270 virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp));
271 }
272
273 static void
274 virtio_gpu_fill_display_info(VirtIOGPU *g,
275 struct virtio_gpu_resp_display_info *dpy_info)
276 {
277 int i;
278
279 for (i = 0; i < g->conf.max_outputs; i++) {
280 if (g->enabled_output_bitmask & (1 << i)) {
281 dpy_info->pmodes[i].enabled = 1;
282 dpy_info->pmodes[i].r.width = cpu_to_le32(g->req_state[i].width);
283 dpy_info->pmodes[i].r.height = cpu_to_le32(g->req_state[i].height);
284 }
285 }
286 }
287
288 void virtio_gpu_get_display_info(VirtIOGPU *g,
289 struct virtio_gpu_ctrl_command *cmd)
290 {
291 struct virtio_gpu_resp_display_info display_info;
292
293 trace_virtio_gpu_cmd_get_display_info();
294 memset(&display_info, 0, sizeof(display_info));
295 display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO;
296 virtio_gpu_fill_display_info(g, &display_info);
297 virtio_gpu_ctrl_response(g, cmd, &display_info.hdr,
298 sizeof(display_info));
299 }
300
301 static pixman_format_code_t get_pixman_format(uint32_t virtio_gpu_format)
302 {
303 switch (virtio_gpu_format) {
304 case VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM:
305 return PIXMAN_BE_b8g8r8x8;
306 case VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM:
307 return PIXMAN_BE_b8g8r8a8;
308 case VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM:
309 return PIXMAN_BE_x8r8g8b8;
310 case VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM:
311 return PIXMAN_BE_a8r8g8b8;
312 case VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM:
313 return PIXMAN_BE_r8g8b8x8;
314 case VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM:
315 return PIXMAN_BE_r8g8b8a8;
316 case VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM:
317 return PIXMAN_BE_x8b8g8r8;
318 case VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM:
319 return PIXMAN_BE_a8b8g8r8;
320 default:
321 return 0;
322 }
323 }
324
325 static uint32_t calc_image_hostmem(pixman_format_code_t pformat,
326 uint32_t width, uint32_t height)
327 {
328 /* Copied from pixman/pixman-bits-image.c, skip integer overflow check.
329 * pixman_image_create_bits will fail in case it overflow.
330 */
331
332 int bpp = PIXMAN_FORMAT_BPP(pformat);
333 int stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t);
334 return height * stride;
335 }
336
337 static void virtio_gpu_resource_create_2d(VirtIOGPU *g,
338 struct virtio_gpu_ctrl_command *cmd)
339 {
340 pixman_format_code_t pformat;
341 struct virtio_gpu_simple_resource *res;
342 struct virtio_gpu_resource_create_2d c2d;
343
344 VIRTIO_GPU_FILL_CMD(c2d);
345 virtio_gpu_bswap_32(&c2d, sizeof(c2d));
346 trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format,
347 c2d.width, c2d.height);
348
349 if (c2d.resource_id == 0) {
350 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n",
351 __func__);
352 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
353 return;
354 }
355
356 res = virtio_gpu_find_resource(g, c2d.resource_id);
357 if (res) {
358 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n",
359 __func__, c2d.resource_id);
360 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
361 return;
362 }
363
364 res = g_new0(struct virtio_gpu_simple_resource, 1);
365
366 res->width = c2d.width;
367 res->height = c2d.height;
368 res->format = c2d.format;
369 res->resource_id = c2d.resource_id;
370
371 pformat = get_pixman_format(c2d.format);
372 if (!pformat) {
373 qemu_log_mask(LOG_GUEST_ERROR,
374 "%s: host couldn't handle guest format %d\n",
375 __func__, c2d.format);
376 g_free(res);
377 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
378 return;
379 }
380
381 res->hostmem = calc_image_hostmem(pformat, c2d.width, c2d.height);
382 if (res->hostmem + g->hostmem < g->conf.max_hostmem) {
383 res->image = pixman_image_create_bits(pformat,
384 c2d.width,
385 c2d.height,
386 NULL, 0);
387 }
388
389 if (!res->image) {
390 qemu_log_mask(LOG_GUEST_ERROR,
391 "%s: resource creation failed %d %d %d\n",
392 __func__, c2d.resource_id, c2d.width, c2d.height);
393 g_free(res);
394 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
395 return;
396 }
397
398 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
399 g->hostmem += res->hostmem;
400 }
401
402 static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id)
403 {
404 struct virtio_gpu_scanout *scanout = &g->scanout[scanout_id];
405 struct virtio_gpu_simple_resource *res;
406 DisplaySurface *ds = NULL;
407
408 if (scanout->resource_id == 0) {
409 return;
410 }
411
412 res = virtio_gpu_find_resource(g, scanout->resource_id);
413 if (res) {
414 res->scanout_bitmask &= ~(1 << scanout_id);
415 }
416
417 if (scanout_id == 0) {
418 /* primary head */
419 ds = qemu_create_message_surface(scanout->width ?: 640,
420 scanout->height ?: 480,
421 "Guest disabled display.");
422 }
423 dpy_gfx_replace_surface(scanout->con, ds);
424 scanout->resource_id = 0;
425 scanout->ds = NULL;
426 scanout->width = 0;
427 scanout->height = 0;
428 }
429
430 static void virtio_gpu_resource_destroy(VirtIOGPU *g,
431 struct virtio_gpu_simple_resource *res)
432 {
433 pixman_image_unref(res->image);
434 virtio_gpu_cleanup_mapping(res);
435 QTAILQ_REMOVE(&g->reslist, res, next);
436 g->hostmem -= res->hostmem;
437 g_free(res);
438 }
439
440 static void virtio_gpu_resource_unref(VirtIOGPU *g,
441 struct virtio_gpu_ctrl_command *cmd)
442 {
443 struct virtio_gpu_simple_resource *res;
444 struct virtio_gpu_resource_unref unref;
445
446 VIRTIO_GPU_FILL_CMD(unref);
447 virtio_gpu_bswap_32(&unref, sizeof(unref));
448 trace_virtio_gpu_cmd_res_unref(unref.resource_id);
449
450 res = virtio_gpu_find_resource(g, unref.resource_id);
451 if (!res) {
452 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
453 __func__, unref.resource_id);
454 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
455 return;
456 }
457 virtio_gpu_resource_destroy(g, res);
458 }
459
460 static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g,
461 struct virtio_gpu_ctrl_command *cmd)
462 {
463 struct virtio_gpu_simple_resource *res;
464 int h;
465 uint32_t src_offset, dst_offset, stride;
466 int bpp;
467 pixman_format_code_t format;
468 struct virtio_gpu_transfer_to_host_2d t2d;
469
470 VIRTIO_GPU_FILL_CMD(t2d);
471 virtio_gpu_t2d_bswap(&t2d);
472 trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id);
473
474 res = virtio_gpu_find_resource(g, t2d.resource_id);
475 if (!res || !res->iov) {
476 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
477 __func__, t2d.resource_id);
478 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
479 return;
480 }
481
482 if (t2d.r.x > res->width ||
483 t2d.r.y > res->height ||
484 t2d.r.width > res->width ||
485 t2d.r.height > res->height ||
486 t2d.r.x + t2d.r.width > res->width ||
487 t2d.r.y + t2d.r.height > res->height) {
488 qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource"
489 " bounds for resource %d: %d %d %d %d vs %d %d\n",
490 __func__, t2d.resource_id, t2d.r.x, t2d.r.y,
491 t2d.r.width, t2d.r.height, res->width, res->height);
492 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
493 return;
494 }
495
496 format = pixman_image_get_format(res->image);
497 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8);
498 stride = pixman_image_get_stride(res->image);
499
500 if (t2d.offset || t2d.r.x || t2d.r.y ||
501 t2d.r.width != pixman_image_get_width(res->image)) {
502 void *img_data = pixman_image_get_data(res->image);
503 for (h = 0; h < t2d.r.height; h++) {
504 src_offset = t2d.offset + stride * h;
505 dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp);
506
507 iov_to_buf(res->iov, res->iov_cnt, src_offset,
508 (uint8_t *)img_data
509 + dst_offset, t2d.r.width * bpp);
510 }
511 } else {
512 iov_to_buf(res->iov, res->iov_cnt, 0,
513 pixman_image_get_data(res->image),
514 pixman_image_get_stride(res->image)
515 * pixman_image_get_height(res->image));
516 }
517 }
518
519 static void virtio_gpu_resource_flush(VirtIOGPU *g,
520 struct virtio_gpu_ctrl_command *cmd)
521 {
522 struct virtio_gpu_simple_resource *res;
523 struct virtio_gpu_resource_flush rf;
524 pixman_region16_t flush_region;
525 int i;
526
527 VIRTIO_GPU_FILL_CMD(rf);
528 virtio_gpu_bswap_32(&rf, sizeof(rf));
529 trace_virtio_gpu_cmd_res_flush(rf.resource_id,
530 rf.r.width, rf.r.height, rf.r.x, rf.r.y);
531
532 res = virtio_gpu_find_resource(g, rf.resource_id);
533 if (!res) {
534 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
535 __func__, rf.resource_id);
536 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
537 return;
538 }
539
540 if (rf.r.x > res->width ||
541 rf.r.y > res->height ||
542 rf.r.width > res->width ||
543 rf.r.height > res->height ||
544 rf.r.x + rf.r.width > res->width ||
545 rf.r.y + rf.r.height > res->height) {
546 qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource"
547 " bounds for resource %d: %d %d %d %d vs %d %d\n",
548 __func__, rf.resource_id, rf.r.x, rf.r.y,
549 rf.r.width, rf.r.height, res->width, res->height);
550 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
551 return;
552 }
553
554 pixman_region_init_rect(&flush_region,
555 rf.r.x, rf.r.y, rf.r.width, rf.r.height);
556 for (i = 0; i < g->conf.max_outputs; i++) {
557 struct virtio_gpu_scanout *scanout;
558 pixman_region16_t region, finalregion;
559 pixman_box16_t *extents;
560
561 if (!(res->scanout_bitmask & (1 << i))) {
562 continue;
563 }
564 scanout = &g->scanout[i];
565
566 pixman_region_init(&finalregion);
567 pixman_region_init_rect(&region, scanout->x, scanout->y,
568 scanout->width, scanout->height);
569
570 pixman_region_intersect(&finalregion, &flush_region, &region);
571 pixman_region_translate(&finalregion, -scanout->x, -scanout->y);
572 extents = pixman_region_extents(&finalregion);
573 /* work out the area we need to update for each console */
574 dpy_gfx_update(g->scanout[i].con,
575 extents->x1, extents->y1,
576 extents->x2 - extents->x1,
577 extents->y2 - extents->y1);
578
579 pixman_region_fini(&region);
580 pixman_region_fini(&finalregion);
581 }
582 pixman_region_fini(&flush_region);
583 }
584
585 static void virtio_unref_resource(pixman_image_t *image, void *data)
586 {
587 pixman_image_unref(data);
588 }
589
590 static void virtio_gpu_set_scanout(VirtIOGPU *g,
591 struct virtio_gpu_ctrl_command *cmd)
592 {
593 struct virtio_gpu_simple_resource *res, *ores;
594 struct virtio_gpu_scanout *scanout;
595 pixman_format_code_t format;
596 uint32_t offset;
597 int bpp;
598 struct virtio_gpu_set_scanout ss;
599
600 VIRTIO_GPU_FILL_CMD(ss);
601 virtio_gpu_bswap_32(&ss, sizeof(ss));
602 trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,
603 ss.r.width, ss.r.height, ss.r.x, ss.r.y);
604
605 if (ss.scanout_id >= g->conf.max_outputs) {
606 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
607 __func__, ss.scanout_id);
608 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
609 return;
610 }
611
612 g->enable = 1;
613 if (ss.resource_id == 0) {
614 virtio_gpu_disable_scanout(g, ss.scanout_id);
615 return;
616 }
617
618 /* create a surface for this scanout */
619 res = virtio_gpu_find_resource(g, ss.resource_id);
620 if (!res) {
621 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
622 __func__, ss.resource_id);
623 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
624 return;
625 }
626
627 if (ss.r.x > res->width ||
628 ss.r.y > res->height ||
629 ss.r.width > res->width ||
630 ss.r.height > res->height ||
631 ss.r.x + ss.r.width > res->width ||
632 ss.r.y + ss.r.height > res->height) {
633 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for"
634 " resource %d, (%d,%d)+%d,%d vs %d %d\n",
635 __func__, ss.scanout_id, ss.resource_id, ss.r.x, ss.r.y,
636 ss.r.width, ss.r.height, res->width, res->height);
637 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
638 return;
639 }
640
641 scanout = &g->scanout[ss.scanout_id];
642
643 format = pixman_image_get_format(res->image);
644 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8);
645 offset = (ss.r.x * bpp) + ss.r.y * pixman_image_get_stride(res->image);
646 if (!scanout->ds || surface_data(scanout->ds)
647 != ((uint8_t *)pixman_image_get_data(res->image) + offset) ||
648 scanout->width != ss.r.width ||
649 scanout->height != ss.r.height) {
650 pixman_image_t *rect;
651 void *ptr = (uint8_t *)pixman_image_get_data(res->image) + offset;
652 rect = pixman_image_create_bits(format, ss.r.width, ss.r.height, ptr,
653 pixman_image_get_stride(res->image));
654 pixman_image_ref(res->image);
655 pixman_image_set_destroy_function(rect, virtio_unref_resource,
656 res->image);
657 /* realloc the surface ptr */
658 scanout->ds = qemu_create_displaysurface_pixman(rect);
659 if (!scanout->ds) {
660 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
661 return;
662 }
663 pixman_image_unref(rect);
664 dpy_gfx_replace_surface(g->scanout[ss.scanout_id].con, scanout->ds);
665 }
666
667 ores = virtio_gpu_find_resource(g, scanout->resource_id);
668 if (ores) {
669 ores->scanout_bitmask &= ~(1 << ss.scanout_id);
670 }
671
672 res->scanout_bitmask |= (1 << ss.scanout_id);
673 scanout->resource_id = ss.resource_id;
674 scanout->x = ss.r.x;
675 scanout->y = ss.r.y;
676 scanout->width = ss.r.width;
677 scanout->height = ss.r.height;
678 }
679
680 int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
681 struct virtio_gpu_ctrl_command *cmd,
682 uint64_t **addr, struct iovec **iov)
683 {
684 struct virtio_gpu_mem_entry *ents;
685 size_t esize, s;
686 int i;
687
688 if (ab->nr_entries > 16384) {
689 qemu_log_mask(LOG_GUEST_ERROR,
690 "%s: nr_entries is too big (%d > 16384)\n",
691 __func__, ab->nr_entries);
692 return -1;
693 }
694
695 esize = sizeof(*ents) * ab->nr_entries;
696 ents = g_malloc(esize);
697 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
698 sizeof(*ab), ents, esize);
699 if (s != esize) {
700 qemu_log_mask(LOG_GUEST_ERROR,
701 "%s: command data size incorrect %zu vs %zu\n",
702 __func__, s, esize);
703 g_free(ents);
704 return -1;
705 }
706
707 *iov = g_malloc0(sizeof(struct iovec) * ab->nr_entries);
708 if (addr) {
709 *addr = g_malloc0(sizeof(uint64_t) * ab->nr_entries);
710 }
711 for (i = 0; i < ab->nr_entries; i++) {
712 uint64_t a = le64_to_cpu(ents[i].addr);
713 uint32_t l = le32_to_cpu(ents[i].length);
714 hwaddr len = l;
715 (*iov)[i].iov_len = l;
716 (*iov)[i].iov_base = cpu_physical_memory_map(a, &len, 1);
717 if (addr) {
718 (*addr)[i] = a;
719 }
720 if (!(*iov)[i].iov_base || len != l) {
721 qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
722 " resource %d element %d\n",
723 __func__, ab->resource_id, i);
724 virtio_gpu_cleanup_mapping_iov(*iov, i);
725 g_free(ents);
726 *iov = NULL;
727 if (addr) {
728 g_free(*addr);
729 *addr = NULL;
730 }
731 return -1;
732 }
733 }
734 g_free(ents);
735 return 0;
736 }
737
738 void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count)
739 {
740 int i;
741
742 for (i = 0; i < count; i++) {
743 cpu_physical_memory_unmap(iov[i].iov_base, iov[i].iov_len, 1,
744 iov[i].iov_len);
745 }
746 g_free(iov);
747 }
748
749 static void virtio_gpu_cleanup_mapping(struct virtio_gpu_simple_resource *res)
750 {
751 virtio_gpu_cleanup_mapping_iov(res->iov, res->iov_cnt);
752 res->iov = NULL;
753 res->iov_cnt = 0;
754 g_free(res->addrs);
755 res->addrs = NULL;
756 }
757
758 static void
759 virtio_gpu_resource_attach_backing(VirtIOGPU *g,
760 struct virtio_gpu_ctrl_command *cmd)
761 {
762 struct virtio_gpu_simple_resource *res;
763 struct virtio_gpu_resource_attach_backing ab;
764 int ret;
765
766 VIRTIO_GPU_FILL_CMD(ab);
767 virtio_gpu_bswap_32(&ab, sizeof(ab));
768 trace_virtio_gpu_cmd_res_back_attach(ab.resource_id);
769
770 res = virtio_gpu_find_resource(g, ab.resource_id);
771 if (!res) {
772 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
773 __func__, ab.resource_id);
774 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
775 return;
776 }
777
778 if (res->iov) {
779 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
780 return;
781 }
782
783 ret = virtio_gpu_create_mapping_iov(&ab, cmd, &res->addrs, &res->iov);
784 if (ret != 0) {
785 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
786 return;
787 }
788
789 res->iov_cnt = ab.nr_entries;
790 }
791
792 static void
793 virtio_gpu_resource_detach_backing(VirtIOGPU *g,
794 struct virtio_gpu_ctrl_command *cmd)
795 {
796 struct virtio_gpu_simple_resource *res;
797 struct virtio_gpu_resource_detach_backing detach;
798
799 VIRTIO_GPU_FILL_CMD(detach);
800 virtio_gpu_bswap_32(&detach, sizeof(detach));
801 trace_virtio_gpu_cmd_res_back_detach(detach.resource_id);
802
803 res = virtio_gpu_find_resource(g, detach.resource_id);
804 if (!res || !res->iov) {
805 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
806 __func__, detach.resource_id);
807 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
808 return;
809 }
810 virtio_gpu_cleanup_mapping(res);
811 }
812
813 static void virtio_gpu_simple_process_cmd(VirtIOGPU *g,
814 struct virtio_gpu_ctrl_command *cmd)
815 {
816 VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);
817 virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr);
818
819 switch (cmd->cmd_hdr.type) {
820 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:
821 virtio_gpu_get_display_info(g, cmd);
822 break;
823 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:
824 virtio_gpu_resource_create_2d(g, cmd);
825 break;
826 case VIRTIO_GPU_CMD_RESOURCE_UNREF:
827 virtio_gpu_resource_unref(g, cmd);
828 break;
829 case VIRTIO_GPU_CMD_RESOURCE_FLUSH:
830 virtio_gpu_resource_flush(g, cmd);
831 break;
832 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D:
833 virtio_gpu_transfer_to_host_2d(g, cmd);
834 break;
835 case VIRTIO_GPU_CMD_SET_SCANOUT:
836 virtio_gpu_set_scanout(g, cmd);
837 break;
838 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING:
839 virtio_gpu_resource_attach_backing(g, cmd);
840 break;
841 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING:
842 virtio_gpu_resource_detach_backing(g, cmd);
843 break;
844 default:
845 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
846 break;
847 }
848 if (!cmd->finished) {
849 virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error :
850 VIRTIO_GPU_RESP_OK_NODATA);
851 }
852 }
853
854 static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq)
855 {
856 VirtIOGPU *g = VIRTIO_GPU(vdev);
857 qemu_bh_schedule(g->ctrl_bh);
858 }
859
860 static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq)
861 {
862 VirtIOGPU *g = VIRTIO_GPU(vdev);
863 qemu_bh_schedule(g->cursor_bh);
864 }
865
866 void virtio_gpu_process_cmdq(VirtIOGPU *g)
867 {
868 struct virtio_gpu_ctrl_command *cmd;
869
870 while (!QTAILQ_EMPTY(&g->cmdq)) {
871 cmd = QTAILQ_FIRST(&g->cmdq);
872
873 /* process command */
874 VIRGL(g, virtio_gpu_virgl_process_cmd, virtio_gpu_simple_process_cmd,
875 g, cmd);
876 if (cmd->waiting) {
877 break;
878 }
879 QTAILQ_REMOVE(&g->cmdq, cmd, next);
880 if (virtio_gpu_stats_enabled(g->conf)) {
881 g->stats.requests++;
882 }
883
884 if (!cmd->finished) {
885 QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next);
886 g->inflight++;
887 if (virtio_gpu_stats_enabled(g->conf)) {
888 if (g->stats.max_inflight < g->inflight) {
889 g->stats.max_inflight = g->inflight;
890 }
891 fprintf(stderr, "inflight: %3d (+)\r", g->inflight);
892 }
893 } else {
894 g_free(cmd);
895 }
896 }
897 }
898
899 static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq)
900 {
901 VirtIOGPU *g = VIRTIO_GPU(vdev);
902 struct virtio_gpu_ctrl_command *cmd;
903
904 if (!virtio_queue_ready(vq)) {
905 return;
906 }
907
908 #ifdef CONFIG_VIRGL
909 if (!g->renderer_inited && g->use_virgl_renderer) {
910 virtio_gpu_virgl_init(g);
911 g->renderer_inited = true;
912 }
913 #endif
914
915 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
916 while (cmd) {
917 cmd->vq = vq;
918 cmd->error = 0;
919 cmd->finished = false;
920 cmd->waiting = false;
921 QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next);
922 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
923 }
924
925 virtio_gpu_process_cmdq(g);
926
927 #ifdef CONFIG_VIRGL
928 if (g->use_virgl_renderer) {
929 virtio_gpu_virgl_fence_poll(g);
930 }
931 #endif
932 }
933
934 static void virtio_gpu_ctrl_bh(void *opaque)
935 {
936 VirtIOGPU *g = opaque;
937 virtio_gpu_handle_ctrl(&g->parent_obj, g->ctrl_vq);
938 }
939
940 static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq)
941 {
942 VirtIOGPU *g = VIRTIO_GPU(vdev);
943 VirtQueueElement *elem;
944 size_t s;
945 struct virtio_gpu_update_cursor cursor_info;
946
947 if (!virtio_queue_ready(vq)) {
948 return;
949 }
950 for (;;) {
951 elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
952 if (!elem) {
953 break;
954 }
955
956 s = iov_to_buf(elem->out_sg, elem->out_num, 0,
957 &cursor_info, sizeof(cursor_info));
958 if (s != sizeof(cursor_info)) {
959 qemu_log_mask(LOG_GUEST_ERROR,
960 "%s: cursor size incorrect %zu vs %zu\n",
961 __func__, s, sizeof(cursor_info));
962 } else {
963 virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info));
964 update_cursor(g, &cursor_info);
965 }
966 virtqueue_push(vq, elem, 0);
967 virtio_notify(vdev, vq);
968 g_free(elem);
969 }
970 }
971
972 static void virtio_gpu_cursor_bh(void *opaque)
973 {
974 VirtIOGPU *g = opaque;
975 virtio_gpu_handle_cursor(&g->parent_obj, g->cursor_vq);
976 }
977
978 static void virtio_gpu_invalidate_display(void *opaque)
979 {
980 }
981
982 static void virtio_gpu_update_display(void *opaque)
983 {
984 }
985
986 static void virtio_gpu_text_update(void *opaque, console_ch_t *chardata)
987 {
988 }
989
990 static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
991 {
992 VirtIOGPU *g = opaque;
993
994 if (idx >= g->conf.max_outputs) {
995 return -1;
996 }
997
998 g->req_state[idx].x = info->xoff;
999 g->req_state[idx].y = info->yoff;
1000 g->req_state[idx].width = info->width;
1001 g->req_state[idx].height = info->height;
1002
1003 if (info->width && info->height) {
1004 g->enabled_output_bitmask |= (1 << idx);
1005 } else {
1006 g->enabled_output_bitmask &= ~(1 << idx);
1007 }
1008
1009 /* send event to guest */
1010 virtio_gpu_notify_event(g, VIRTIO_GPU_EVENT_DISPLAY);
1011 return 0;
1012 }
1013
1014 const GraphicHwOps virtio_gpu_ops = {
1015 .invalidate = virtio_gpu_invalidate_display,
1016 .gfx_update = virtio_gpu_update_display,
1017 .text_update = virtio_gpu_text_update,
1018 .ui_info = virtio_gpu_ui_info,
1019 #ifdef CONFIG_VIRGL
1020 .gl_block = virtio_gpu_gl_block,
1021 #endif
1022 };
1023
1024 static const VMStateDescription vmstate_virtio_gpu_scanout = {
1025 .name = "virtio-gpu-one-scanout",
1026 .version_id = 1,
1027 .fields = (VMStateField[]) {
1028 VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout),
1029 VMSTATE_UINT32(width, struct virtio_gpu_scanout),
1030 VMSTATE_UINT32(height, struct virtio_gpu_scanout),
1031 VMSTATE_INT32(x, struct virtio_gpu_scanout),
1032 VMSTATE_INT32(y, struct virtio_gpu_scanout),
1033 VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout),
1034 VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout),
1035 VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout),
1036 VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout),
1037 VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout),
1038 VMSTATE_END_OF_LIST()
1039 },
1040 };
1041
1042 static const VMStateDescription vmstate_virtio_gpu_scanouts = {
1043 .name = "virtio-gpu-scanouts",
1044 .version_id = 1,
1045 .fields = (VMStateField[]) {
1046 VMSTATE_INT32(enable, struct VirtIOGPU),
1047 VMSTATE_UINT32_EQUAL(conf.max_outputs, struct VirtIOGPU, NULL),
1048 VMSTATE_STRUCT_VARRAY_UINT32(scanout, struct VirtIOGPU,
1049 conf.max_outputs, 1,
1050 vmstate_virtio_gpu_scanout,
1051 struct virtio_gpu_scanout),
1052 VMSTATE_END_OF_LIST()
1053 },
1054 };
1055
1056 static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size,
1057 VMStateField *field, QJSON *vmdesc)
1058 {
1059 VirtIOGPU *g = opaque;
1060 struct virtio_gpu_simple_resource *res;
1061 int i;
1062
1063 /* in 2d mode we should never find unprocessed commands here */
1064 assert(QTAILQ_EMPTY(&g->cmdq));
1065
1066 QTAILQ_FOREACH(res, &g->reslist, next) {
1067 qemu_put_be32(f, res->resource_id);
1068 qemu_put_be32(f, res->width);
1069 qemu_put_be32(f, res->height);
1070 qemu_put_be32(f, res->format);
1071 qemu_put_be32(f, res->iov_cnt);
1072 for (i = 0; i < res->iov_cnt; i++) {
1073 qemu_put_be64(f, res->addrs[i]);
1074 qemu_put_be32(f, res->iov[i].iov_len);
1075 }
1076 qemu_put_buffer(f, (void *)pixman_image_get_data(res->image),
1077 pixman_image_get_stride(res->image) * res->height);
1078 }
1079 qemu_put_be32(f, 0); /* end of list */
1080
1081 return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL);
1082 }
1083
1084 static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
1085 VMStateField *field)
1086 {
1087 VirtIOGPU *g = opaque;
1088 struct virtio_gpu_simple_resource *res;
1089 struct virtio_gpu_scanout *scanout;
1090 uint32_t resource_id, pformat;
1091 int i;
1092
1093 g->hostmem = 0;
1094
1095 resource_id = qemu_get_be32(f);
1096 while (resource_id != 0) {
1097 res = g_new0(struct virtio_gpu_simple_resource, 1);
1098 res->resource_id = resource_id;
1099 res->width = qemu_get_be32(f);
1100 res->height = qemu_get_be32(f);
1101 res->format = qemu_get_be32(f);
1102 res->iov_cnt = qemu_get_be32(f);
1103
1104 /* allocate */
1105 pformat = get_pixman_format(res->format);
1106 if (!pformat) {
1107 g_free(res);
1108 return -EINVAL;
1109 }
1110 res->image = pixman_image_create_bits(pformat,
1111 res->width, res->height,
1112 NULL, 0);
1113 if (!res->image) {
1114 g_free(res);
1115 return -EINVAL;
1116 }
1117
1118 res->hostmem = calc_image_hostmem(pformat, res->width, res->height);
1119
1120 res->addrs = g_new(uint64_t, res->iov_cnt);
1121 res->iov = g_new(struct iovec, res->iov_cnt);
1122
1123 /* read data */
1124 for (i = 0; i < res->iov_cnt; i++) {
1125 res->addrs[i] = qemu_get_be64(f);
1126 res->iov[i].iov_len = qemu_get_be32(f);
1127 }
1128 qemu_get_buffer(f, (void *)pixman_image_get_data(res->image),
1129 pixman_image_get_stride(res->image) * res->height);
1130
1131 /* restore mapping */
1132 for (i = 0; i < res->iov_cnt; i++) {
1133 hwaddr len = res->iov[i].iov_len;
1134 res->iov[i].iov_base =
1135 cpu_physical_memory_map(res->addrs[i], &len, 1);
1136 if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
1137 /* Clean up the half-a-mapping we just created... */
1138 if (res->iov[i].iov_base) {
1139 cpu_physical_memory_unmap(res->iov[i].iov_base,
1140 len, 0, 0);
1141 }
1142 /* ...and the mappings for previous loop iterations */
1143 res->iov_cnt = i;
1144 virtio_gpu_cleanup_mapping(res);
1145 pixman_image_unref(res->image);
1146 g_free(res);
1147 return -EINVAL;
1148 }
1149 }
1150
1151 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
1152 g->hostmem += res->hostmem;
1153
1154 resource_id = qemu_get_be32(f);
1155 }
1156
1157 /* load & apply scanout state */
1158 vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1);
1159 for (i = 0; i < g->conf.max_outputs; i++) {
1160 scanout = &g->scanout[i];
1161 if (!scanout->resource_id) {
1162 continue;
1163 }
1164 res = virtio_gpu_find_resource(g, scanout->resource_id);
1165 if (!res) {
1166 return -EINVAL;
1167 }
1168 scanout->ds = qemu_create_displaysurface_pixman(res->image);
1169 if (!scanout->ds) {
1170 return -EINVAL;
1171 }
1172
1173 dpy_gfx_replace_surface(scanout->con, scanout->ds);
1174 dpy_gfx_update(scanout->con, 0, 0, scanout->width, scanout->height);
1175 if (scanout->cursor.resource_id) {
1176 update_cursor(g, &scanout->cursor);
1177 }
1178 res->scanout_bitmask |= (1 << i);
1179 }
1180
1181 return 0;
1182 }
1183
1184 static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
1185 {
1186 VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
1187 VirtIOGPU *g = VIRTIO_GPU(qdev);
1188 bool have_virgl;
1189 Error *local_err = NULL;
1190 int i;
1191
1192 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
1193 error_setg(errp, "virtio-gpu does not support vIOMMU yet");
1194 return;
1195 }
1196
1197 if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
1198 error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
1199 return;
1200 }
1201
1202 g->use_virgl_renderer = false;
1203 #if !defined(CONFIG_VIRGL) || defined(HOST_WORDS_BIGENDIAN)
1204 have_virgl = false;
1205 #else
1206 have_virgl = display_opengl;
1207 #endif
1208 if (!have_virgl) {
1209 g->conf.flags &= ~(1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED);
1210 }
1211
1212 if (virtio_gpu_virgl_enabled(g->conf)) {
1213 error_setg(&g->migration_blocker, "virgl is not yet migratable");
1214 migrate_add_blocker(g->migration_blocker, &local_err);
1215 if (local_err) {
1216 error_propagate(errp, local_err);
1217 error_free(g->migration_blocker);
1218 return;
1219 }
1220 }
1221
1222 g->config_size = sizeof(struct virtio_gpu_config);
1223 g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs);
1224 virtio_init(VIRTIO_DEVICE(g), "virtio-gpu", VIRTIO_ID_GPU,
1225 g->config_size);
1226
1227 g->req_state[0].width = g->conf.xres;
1228 g->req_state[0].height = g->conf.yres;
1229
1230 if (virtio_gpu_virgl_enabled(g->conf)) {
1231 /* use larger control queue in 3d mode */
1232 g->ctrl_vq = virtio_add_queue(vdev, 256, virtio_gpu_handle_ctrl_cb);
1233 g->cursor_vq = virtio_add_queue(vdev, 16, virtio_gpu_handle_cursor_cb);
1234
1235 #if defined(CONFIG_VIRGL)
1236 g->virtio_config.num_capsets = virtio_gpu_virgl_get_num_capsets(g);
1237 #else
1238 g->virtio_config.num_capsets = 0;
1239 #endif
1240 } else {
1241 g->ctrl_vq = virtio_add_queue(vdev, 64, virtio_gpu_handle_ctrl_cb);
1242 g->cursor_vq = virtio_add_queue(vdev, 16, virtio_gpu_handle_cursor_cb);
1243 }
1244
1245 g->ctrl_bh = qemu_bh_new(virtio_gpu_ctrl_bh, g);
1246 g->cursor_bh = qemu_bh_new(virtio_gpu_cursor_bh, g);
1247 QTAILQ_INIT(&g->reslist);
1248 QTAILQ_INIT(&g->cmdq);
1249 QTAILQ_INIT(&g->fenceq);
1250
1251 g->enabled_output_bitmask = 1;
1252 g->qdev = qdev;
1253
1254 for (i = 0; i < g->conf.max_outputs; i++) {
1255 g->scanout[i].con =
1256 graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g);
1257 if (i > 0) {
1258 dpy_gfx_replace_surface(g->scanout[i].con, NULL);
1259 }
1260 }
1261 }
1262
1263 static void virtio_gpu_device_unrealize(DeviceState *qdev, Error **errp)
1264 {
1265 VirtIOGPU *g = VIRTIO_GPU(qdev);
1266 if (g->migration_blocker) {
1267 migrate_del_blocker(g->migration_blocker);
1268 error_free(g->migration_blocker);
1269 }
1270 }
1271
1272 static void virtio_gpu_instance_init(Object *obj)
1273 {
1274 }
1275
1276 static void virtio_gpu_reset(VirtIODevice *vdev)
1277 {
1278 VirtIOGPU *g = VIRTIO_GPU(vdev);
1279 struct virtio_gpu_simple_resource *res, *tmp;
1280 int i;
1281
1282 g->enable = 0;
1283
1284 QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) {
1285 virtio_gpu_resource_destroy(g, res);
1286 }
1287 for (i = 0; i < g->conf.max_outputs; i++) {
1288 g->scanout[i].resource_id = 0;
1289 g->scanout[i].width = 0;
1290 g->scanout[i].height = 0;
1291 g->scanout[i].x = 0;
1292 g->scanout[i].y = 0;
1293 g->scanout[i].ds = NULL;
1294 }
1295
1296 #ifdef CONFIG_VIRGL
1297 if (g->use_virgl_renderer) {
1298 virtio_gpu_virgl_reset(g);
1299 g->use_virgl_renderer = 0;
1300 }
1301 #endif
1302 }
1303
1304 /*
1305 * For historical reasons virtio_gpu does not adhere to virtio migration
1306 * scheme as described in doc/virtio-migration.txt, in a sense that no
1307 * save/load callback are provided to the core. Instead the device data
1308 * is saved/loaded after the core data.
1309 *
1310 * Because of this we need a special vmsd.
1311 */
1312 static const VMStateDescription vmstate_virtio_gpu = {
1313 .name = "virtio-gpu",
1314 .minimum_version_id = VIRTIO_GPU_VM_VERSION,
1315 .version_id = VIRTIO_GPU_VM_VERSION,
1316 .fields = (VMStateField[]) {
1317 VMSTATE_VIRTIO_DEVICE /* core */,
1318 {
1319 .name = "virtio-gpu",
1320 .info = &(const VMStateInfo) {
1321 .name = "virtio-gpu",
1322 .get = virtio_gpu_load,
1323 .put = virtio_gpu_save,
1324 },
1325 .flags = VMS_SINGLE,
1326 } /* device */,
1327 VMSTATE_END_OF_LIST()
1328 },
1329 };
1330
1331 static Property virtio_gpu_properties[] = {
1332 DEFINE_PROP_UINT32("max_outputs", VirtIOGPU, conf.max_outputs, 1),
1333 DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf.max_hostmem,
1334 256 * 1024 * 1024),
1335 #ifdef CONFIG_VIRGL
1336 DEFINE_PROP_BIT("virgl", VirtIOGPU, conf.flags,
1337 VIRTIO_GPU_FLAG_VIRGL_ENABLED, true),
1338 DEFINE_PROP_BIT("stats", VirtIOGPU, conf.flags,
1339 VIRTIO_GPU_FLAG_STATS_ENABLED, false),
1340 #endif
1341 DEFINE_PROP_UINT32("xres", VirtIOGPU, conf.xres, 1024),
1342 DEFINE_PROP_UINT32("yres", VirtIOGPU, conf.yres, 768),
1343 DEFINE_PROP_END_OF_LIST(),
1344 };
1345
1346 static void virtio_gpu_class_init(ObjectClass *klass, void *data)
1347 {
1348 DeviceClass *dc = DEVICE_CLASS(klass);
1349 VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
1350
1351 vdc->realize = virtio_gpu_device_realize;
1352 vdc->unrealize = virtio_gpu_device_unrealize;
1353 vdc->get_config = virtio_gpu_get_config;
1354 vdc->set_config = virtio_gpu_set_config;
1355 vdc->get_features = virtio_gpu_get_features;
1356 vdc->set_features = virtio_gpu_set_features;
1357
1358 vdc->reset = virtio_gpu_reset;
1359
1360 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
1361 dc->props = virtio_gpu_properties;
1362 dc->vmsd = &vmstate_virtio_gpu;
1363 dc->hotpluggable = false;
1364 }
1365
1366 static const TypeInfo virtio_gpu_info = {
1367 .name = TYPE_VIRTIO_GPU,
1368 .parent = TYPE_VIRTIO_DEVICE,
1369 .instance_size = sizeof(VirtIOGPU),
1370 .instance_init = virtio_gpu_instance_init,
1371 .class_init = virtio_gpu_class_init,
1372 };
1373
1374 static void virtio_register_types(void)
1375 {
1376 type_register_static(&virtio_gpu_info);
1377 }
1378
1379 type_init(virtio_register_types)
1380
1381 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctrl_hdr) != 24);
1382 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_update_cursor) != 56);
1383 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_unref) != 32);
1384 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_2d) != 40);
1385 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_set_scanout) != 48);
1386 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_flush) != 48);
1387 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_to_host_2d) != 56);
1388 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_mem_entry) != 16);
1389 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_attach_backing) != 32);
1390 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_detach_backing) != 32);
1391 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_display_info) != 408);
1392
1393 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_host_3d) != 72);
1394 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_3d) != 72);
1395 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_create) != 96);
1396 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_destroy) != 24);
1397 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_resource) != 32);
1398 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_cmd_submit) != 32);
1399 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset_info) != 32);
1400 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset_info) != 40);
1401 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset) != 32);
1402 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset) != 24);
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