hw/display/virtio-vga.c

   1 #include "qemu/osdep.h"
   2 #include "hw/pci/pci.h"
   3 #include "hw/qdev-properties.h"
   4 #include "hw/virtio/virtio-gpu.h"
   5 #include "qapi/error.h"
   6 #include "qemu/module.h"
   7 #include "virtio-vga.h"
   8 #include "qom/object.h"
   9
  10 static void virtio_vga_base_invalidate_display(void *opaque)
  11 {
  12     VirtIOVGABase *vvga = opaque;
  13     VirtIOGPUBase *g = vvga->vgpu;
  14
  15     if (g->enable) {
  16         g->hw_ops->invalidate(g);
  17     } else {
  18         vvga->vga.hw_ops->invalidate(&vvga->vga);
  19     }
  20 }
  21
  22 static void virtio_vga_base_update_display(void *opaque)
  23 {
  24     VirtIOVGABase *vvga = opaque;
  25     VirtIOGPUBase *g = vvga->vgpu;
  26
  27     if (g->enable) {
  28         g->hw_ops->gfx_update(g);
  29     } else {
  30         vvga->vga.hw_ops->gfx_update(&vvga->vga);
  31     }
  32 }
  33
  34 static void virtio_vga_base_text_update(void *opaque, console_ch_t *chardata)
  35 {
  36     VirtIOVGABase *vvga = opaque;
  37     VirtIOGPUBase *g = vvga->vgpu;
  38
  39     if (g->enable) {
  40         if (g->hw_ops->text_update) {
  41             g->hw_ops->text_update(g, chardata);
  42         }
  43     } else {
  44         if (vvga->vga.hw_ops->text_update) {
  45             vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
  46         }
  47     }
  48 }
  49
  50 static int virtio_vga_base_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
  51 {
  52     VirtIOVGABase *vvga = opaque;
  53     VirtIOGPUBase *g = vvga->vgpu;
  54
  55     if (g->hw_ops->ui_info) {
  56         return g->hw_ops->ui_info(g, idx, info);
  57     }
  58     return -1;
  59 }
  60
  61 static void virtio_vga_base_gl_block(void *opaque, bool block)
  62 {
  63     VirtIOVGABase *vvga = opaque;
  64     VirtIOGPUBase *g = vvga->vgpu;
  65
  66     if (g->hw_ops->gl_block) {
  67         g->hw_ops->gl_block(g, block);
  68     }
  69 }
  70
  71 static void virtio_vga_base_gl_flushed(void *opaque)
  72 {
  73     VirtIOVGABase *vvga = opaque;
  74     VirtIOGPUBase *g = vvga->vgpu;
  75
  76     if (g->hw_ops->gl_flushed) {
  77         g->hw_ops->gl_flushed(g);
  78     }
  79 }
  80
  81 static int virtio_vga_base_get_flags(void *opaque)
  82 {
  83     VirtIOVGABase *vvga = opaque;
  84     VirtIOGPUBase *g = vvga->vgpu;
  85
  86     return g->hw_ops->get_flags(g);
  87 }
  88
  89 static const GraphicHwOps virtio_vga_base_ops = {
  90     .get_flags = virtio_vga_base_get_flags,
  91     .invalidate = virtio_vga_base_invalidate_display,
  92     .gfx_update = virtio_vga_base_update_display,
  93     .text_update = virtio_vga_base_text_update,
  94     .ui_info = virtio_vga_base_ui_info,
  95     .gl_block = virtio_vga_base_gl_block,
  96     .gl_flushed = virtio_vga_base_gl_flushed,
  97 };
  98
  99 static const VMStateDescription vmstate_virtio_vga_base = {
 100     .name = "virtio-vga",
 101     .version_id = 2,
 102     .minimum_version_id = 2,
 103     .fields = (VMStateField[]) {
 104         /* no pci stuff here, saving the virtio device will handle that */
 105         VMSTATE_STRUCT(vga, VirtIOVGABase, 0,
 106                        vmstate_vga_common, VGACommonState),
 107         VMSTATE_END_OF_LIST()
 108     }
 109 };
 110
 111 /* VGA device wrapper around PCI device around virtio GPU */
 112 static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
 113 {
 114     VirtIOVGABase *vvga = VIRTIO_VGA_BASE(vpci_dev);
 115     VirtIOGPUBase *g = vvga->vgpu;
 116     VGACommonState *vga = &vvga->vga;
 117     uint32_t offset;
 118     int i;
 119
 120     /* init vga compat bits */
 121     vga->vram_size_mb = 8;
 122     vga_common_init(vga, OBJECT(vpci_dev));
 123     vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
 124              pci_address_space_io(&vpci_dev->pci_dev), true);
 125     pci_register_bar(&vpci_dev->pci_dev, 0,
 126                      PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
 127
 128     /*
 129      * Configure virtio bar and regions
 130      *
 131      * We use bar #2 for the mmio regions, to be compatible with stdvga.
 132      * virtio regions are moved to the end of bar #2, to make room for
 133      * the stdvga mmio registers at the start of bar #2.
 134      */
 135     vpci_dev->modern_mem_bar_idx = 2;
 136     vpci_dev->msix_bar_idx = 4;
 137     vpci_dev->modern_io_bar_idx = 5;
 138
 139     if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
 140         /*
 141          * with page-per-vq=off there is no padding space we can use
 142          * for the stdvga registers.  Make the common and isr regions
 143          * smaller then.
 144          */
 145         vpci_dev->common.size /= 2;
 146         vpci_dev->isr.size /= 2;
 147     }
 148
 149     offset = memory_region_size(&vpci_dev->modern_bar);
 150     offset -= vpci_dev->notify.size;
 151     vpci_dev->notify.offset = offset;
 152     offset -= vpci_dev->device.size;
 153     vpci_dev->device.offset = offset;
 154     offset -= vpci_dev->isr.size;
 155     vpci_dev->isr.offset = offset;
 156     offset -= vpci_dev->common.size;
 157     vpci_dev->common.offset = offset;
 158
 159     /* init virtio bits */
 160     virtio_pci_force_virtio_1(vpci_dev);
 161     if (!qdev_realize(DEVICE(g), BUS(&vpci_dev->bus), errp)) {
 162         return;
 163     }
 164
 165     /* add stdvga mmio regions */
 166     pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
 167                                  vvga->vga_mrs, true, false);
 168
 169     vga->con = g->scanout[0].con;
 170     graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga);
 171
 172     for (i = 0; i < g->conf.max_outputs; i++) {
 173         object_property_set_link(OBJECT(g->scanout[i].con), "device",
 174                                  OBJECT(vpci_dev), &error_abort);
 175     }
 176 }
 177
 178 static void virtio_vga_base_reset(DeviceState *dev)
 179 {
 180     VirtIOVGABaseClass *klass = VIRTIO_VGA_BASE_GET_CLASS(dev);
 181     VirtIOVGABase *vvga = VIRTIO_VGA_BASE(dev);
 182
 183     /* reset virtio-gpu */
 184     klass->parent_reset(dev);
 185
 186     /* reset vga */
 187     vga_common_reset(&vvga->vga);
 188     vga_dirty_log_start(&vvga->vga);
 189 }
 190
 191 static bool virtio_vga_get_big_endian_fb(Object *obj, Error **errp)
 192 {
 193     VirtIOVGABase *d = VIRTIO_VGA_BASE(obj);
 194
 195     return d->vga.big_endian_fb;
 196 }
 197
 198 static void virtio_vga_set_big_endian_fb(Object *obj, bool value, Error **errp)
 199 {
 200     VirtIOVGABase *d = VIRTIO_VGA_BASE(obj);
 201
 202     d->vga.big_endian_fb = value;
 203 }
 204
 205 static Property virtio_vga_base_properties[] = {
 206     DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
 207     DEFINE_PROP_END_OF_LIST(),
 208 };
 209
 210 static void virtio_vga_base_class_init(ObjectClass *klass, void *data)
 211 {
 212     DeviceClass *dc = DEVICE_CLASS(klass);
 213     VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
 214     VirtIOVGABaseClass *v = VIRTIO_VGA_BASE_CLASS(klass);
 215     PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
 216
 217     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
 218     device_class_set_props(dc, virtio_vga_base_properties);
 219     dc->vmsd = &vmstate_virtio_vga_base;
 220     dc->hotpluggable = false;
 221     device_class_set_parent_reset(dc, virtio_vga_base_reset,
 222                                   &v->parent_reset);
 223
 224     k->realize = virtio_vga_base_realize;
 225     pcidev_k->romfile = "vgabios-virtio.bin";
 226     pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
 227
 228     /* Expose framebuffer byteorder via QOM */
 229     object_class_property_add_bool(klass, "big-endian-framebuffer",
 230                                    virtio_vga_get_big_endian_fb,
 231                                    virtio_vga_set_big_endian_fb);
 232 }
 233
 234 static TypeInfo virtio_vga_base_info = {
 235     .name          = TYPE_VIRTIO_VGA_BASE,
 236     .parent        = TYPE_VIRTIO_PCI,
 237     .instance_size = sizeof(VirtIOVGABase),
 238     .class_size    = sizeof(VirtIOVGABaseClass),
 239     .class_init    = virtio_vga_base_class_init,
 240     .abstract      = true,
 241 };
 242 module_obj(TYPE_VIRTIO_VGA_BASE);
 243
 244 #define TYPE_VIRTIO_VGA "virtio-vga"
 245
 246 typedef struct VirtIOVGA VirtIOVGA;
 247 DECLARE_INSTANCE_CHECKER(VirtIOVGA, VIRTIO_VGA,
 248                          TYPE_VIRTIO_VGA)
 249
 250 struct VirtIOVGA {
 251     VirtIOVGABase parent_obj;
 252
 253     VirtIOGPU     vdev;
 254 };
 255
 256 static void virtio_vga_inst_initfn(Object *obj)
 257 {
 258     VirtIOVGA *dev = VIRTIO_VGA(obj);
 259
 260     virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
 261                                 TYPE_VIRTIO_GPU);
 262     VIRTIO_VGA_BASE(dev)->vgpu = VIRTIO_GPU_BASE(&dev->vdev);
 263 }
 264
 265
 266 static VirtioPCIDeviceTypeInfo virtio_vga_info = {
 267     .generic_name  = TYPE_VIRTIO_VGA,
 268     .parent        = TYPE_VIRTIO_VGA_BASE,
 269     .instance_size = sizeof(VirtIOVGA),
 270     .instance_init = virtio_vga_inst_initfn,
 271 };
 272 module_obj(TYPE_VIRTIO_VGA);
 273
 274 static void virtio_vga_register_types(void)
 275 {
 276     type_register_static(&virtio_vga_base_info);
 277     virtio_pci_types_register(&virtio_vga_info);
 278 }
 279
 280 type_init(virtio_vga_register_types)