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Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-11-2019' into...
[mirror_qemu.git] / hw / display / virtio-vga.c
1 #include "qemu/osdep.h"
2 #include "hw/hw.h"
3 #include "hw/pci/pci.h"
4 #include "vga_int.h"
5 #include "hw/virtio/virtio-pci.h"
6 #include "hw/virtio/virtio-gpu.h"
7 #include "qapi/error.h"
8
9 /*
10 * virtio-vga: This extends VirtioPCIProxy.
11 */
12 #define TYPE_VIRTIO_VGA "virtio-vga"
13 #define VIRTIO_VGA(obj) \
14 OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
15 #define VIRTIO_VGA_GET_CLASS(obj) \
16 OBJECT_GET_CLASS(VirtIOVGAClass, obj, TYPE_VIRTIO_VGA)
17 #define VIRTIO_VGA_CLASS(klass) \
18 OBJECT_CLASS_CHECK(VirtIOVGAClass, klass, TYPE_VIRTIO_VGA)
19
20 typedef struct VirtIOVGA {
21 VirtIOPCIProxy parent_obj;
22 VirtIOGPU vdev;
23 VGACommonState vga;
24 MemoryRegion vga_mrs[3];
25 } VirtIOVGA;
26
27 typedef struct VirtIOVGAClass {
28 VirtioPCIClass parent_class;
29 DeviceReset parent_reset;
30 } VirtIOVGAClass;
31
32 static void virtio_vga_invalidate_display(void *opaque)
33 {
34 VirtIOVGA *vvga = opaque;
35
36 if (vvga->vdev.enable) {
37 virtio_gpu_ops.invalidate(&vvga->vdev);
38 } else {
39 vvga->vga.hw_ops->invalidate(&vvga->vga);
40 }
41 }
42
43 static void virtio_vga_update_display(void *opaque)
44 {
45 VirtIOVGA *vvga = opaque;
46
47 if (vvga->vdev.enable) {
48 virtio_gpu_ops.gfx_update(&vvga->vdev);
49 } else {
50 vvga->vga.hw_ops->gfx_update(&vvga->vga);
51 }
52 }
53
54 static void virtio_vga_text_update(void *opaque, console_ch_t *chardata)
55 {
56 VirtIOVGA *vvga = opaque;
57
58 if (vvga->vdev.enable) {
59 if (virtio_gpu_ops.text_update) {
60 virtio_gpu_ops.text_update(&vvga->vdev, chardata);
61 }
62 } else {
63 if (vvga->vga.hw_ops->text_update) {
64 vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
65 }
66 }
67 }
68
69 static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
70 {
71 VirtIOVGA *vvga = opaque;
72
73 if (virtio_gpu_ops.ui_info) {
74 return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info);
75 }
76 return -1;
77 }
78
79 static void virtio_vga_gl_block(void *opaque, bool block)
80 {
81 VirtIOVGA *vvga = opaque;
82
83 if (virtio_gpu_ops.gl_block) {
84 virtio_gpu_ops.gl_block(&vvga->vdev, block);
85 }
86 }
87
88 static const GraphicHwOps virtio_vga_ops = {
89 .invalidate = virtio_vga_invalidate_display,
90 .gfx_update = virtio_vga_update_display,
91 .text_update = virtio_vga_text_update,
92 .ui_info = virtio_vga_ui_info,
93 .gl_block = virtio_vga_gl_block,
94 };
95
96 static const VMStateDescription vmstate_virtio_vga = {
97 .name = "virtio-vga",
98 .version_id = 2,
99 .minimum_version_id = 2,
100 .fields = (VMStateField[]) {
101 /* no pci stuff here, saving the virtio device will handle that */
102 VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState),
103 VMSTATE_END_OF_LIST()
104 }
105 };
106
107 /* VGA device wrapper around PCI device around virtio GPU */
108 static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
109 {
110 VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
111 VirtIOGPU *g = &vvga->vdev;
112 VGACommonState *vga = &vvga->vga;
113 Error *err = NULL;
114 uint32_t offset;
115 int i;
116
117 /* init vga compat bits */
118 vga->vram_size_mb = 8;
119 vga_common_init(vga, OBJECT(vpci_dev));
120 vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
121 pci_address_space_io(&vpci_dev->pci_dev), true);
122 pci_register_bar(&vpci_dev->pci_dev, 0,
123 PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
124
125 /*
126 * Configure virtio bar and regions
127 *
128 * We use bar #2 for the mmio regions, to be compatible with stdvga.
129 * virtio regions are moved to the end of bar #2, to make room for
130 * the stdvga mmio registers at the start of bar #2.
131 */
132 vpci_dev->modern_mem_bar_idx = 2;
133 vpci_dev->msix_bar_idx = 4;
134
135 if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
136 /*
137 * with page-per-vq=off there is no padding space we can use
138 * for the stdvga registers. Make the common and isr regions
139 * smaller then.
140 */
141 vpci_dev->common.size /= 2;
142 vpci_dev->isr.size /= 2;
143 }
144
145 offset = memory_region_size(&vpci_dev->modern_bar);
146 offset -= vpci_dev->notify.size;
147 vpci_dev->notify.offset = offset;
148 offset -= vpci_dev->device.size;
149 vpci_dev->device.offset = offset;
150 offset -= vpci_dev->isr.size;
151 vpci_dev->isr.offset = offset;
152 offset -= vpci_dev->common.size;
153 vpci_dev->common.offset = offset;
154
155 /* init virtio bits */
156 qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
157 virtio_pci_force_virtio_1(vpci_dev);
158 object_property_set_bool(OBJECT(g), true, "realized", &err);
159 if (err) {
160 error_propagate(errp, err);
161 return;
162 }
163
164 /* add stdvga mmio regions */
165 pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
166 vvga->vga_mrs, true, false);
167
168 vga->con = g->scanout[0].con;
169 graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);
170
171 for (i = 0; i < g->conf.max_outputs; i++) {
172 object_property_set_link(OBJECT(g->scanout[i].con),
173 OBJECT(vpci_dev),
174 "device", errp);
175 }
176 }
177
178 static void virtio_vga_reset(DeviceState *dev)
179 {
180 VirtIOVGAClass *klass = VIRTIO_VGA_GET_CLASS(dev);
181 VirtIOVGA *vvga = VIRTIO_VGA(dev);
182
183 /* reset virtio-gpu */
184 klass->parent_reset(dev);
185
186 /* reset vga */
187 vga_common_reset(&vvga->vga);
188 vga_dirty_log_start(&vvga->vga);
189 }
190
191 static Property virtio_vga_properties[] = {
192 DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
193 DEFINE_PROP_END_OF_LIST(),
194 };
195
196 static void virtio_vga_class_init(ObjectClass *klass, void *data)
197 {
198 DeviceClass *dc = DEVICE_CLASS(klass);
199 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
200 VirtIOVGAClass *v = VIRTIO_VGA_CLASS(klass);
201 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
202
203 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
204 dc->props = virtio_vga_properties;
205 dc->vmsd = &vmstate_virtio_vga;
206 dc->hotpluggable = false;
207 device_class_set_parent_reset(dc, virtio_vga_reset,
208 &v->parent_reset);
209
210 k->realize = virtio_vga_realize;
211 pcidev_k->romfile = "vgabios-virtio.bin";
212 pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
213 }
214
215 static void virtio_vga_inst_initfn(Object *obj)
216 {
217 VirtIOVGA *dev = VIRTIO_VGA(obj);
218
219 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
220 TYPE_VIRTIO_GPU);
221 }
222
223 static VirtioPCIDeviceTypeInfo virtio_vga_info = {
224 .generic_name = TYPE_VIRTIO_VGA,
225 .instance_size = sizeof(struct VirtIOVGA),
226 .instance_init = virtio_vga_inst_initfn,
227 .class_size = sizeof(struct VirtIOVGAClass),
228 .class_init = virtio_vga_class_init,
229 };
230
231 static void virtio_vga_register_types(void)
232 {
233 virtio_pci_types_register(&virtio_vga_info);
234 }
235
236 type_init(virtio_vga_register_types)