hw/dma/i82374.c

   1 /*
   2  * QEMU Intel 82374 emulation (Enhanced DMA controller)
   3  *
   4  * Copyright (c) 2010 Hervé Poussineau
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qapi/error.h"
  27 #include "qemu/module.h"
  28 #include "hw/isa/isa.h"
  29 #include "hw/qdev-properties.h"
  30 #include "migration/vmstate.h"
  31 #include "hw/dma/i8257.h"
  32 #include "qom/object.h"
  33
  34 #define TYPE_I82374 "i82374"
  35 typedef struct I82374State I82374State;
  36 #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374)
  37
  38 //#define DEBUG_I82374
  39
  40 #ifdef DEBUG_I82374
  41 #define DPRINTF(fmt, ...) \
  42 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
  43 #else
  44 #define DPRINTF(fmt, ...) \
  45 do {} while (0)
  46 #endif
  47 #define BADF(fmt, ...) \
  48 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
  49
  50 struct I82374State {
  51     ISADevice parent_obj;
  52
  53     uint32_t iobase;
  54     uint8_t commands[8];
  55     PortioList port_list;
  56 };
  57
  58 static const VMStateDescription vmstate_i82374 = {
  59     .name = "i82374",
  60     .version_id = 0,
  61     .minimum_version_id = 0,
  62     .fields = (VMStateField[]) {
  63         VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
  64         VMSTATE_END_OF_LIST()
  65     },
  66 };
  67
  68 static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
  69 {
  70     uint32_t val = 0;
  71
  72     BADF("%s: %08x\n", __func__, nport);
  73
  74     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  75     return val;
  76 }
  77
  78 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
  79 {
  80     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
  81
  82     if (data != 0x42) {
  83         /* Not Stop S/G command */
  84         BADF("%s: %08x=%08x\n", __func__, nport, data);
  85     }
  86 }
  87
  88 static uint32_t i82374_read_status(void *opaque, uint32_t nport)
  89 {
  90     uint32_t val = 0;
  91
  92     BADF("%s: %08x\n", __func__, nport);
  93
  94     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  95     return val;
  96 }
  97
  98 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
  99 {
 100     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
 101
 102     BADF("%s: %08x=%08x\n", __func__, nport, data);
 103 }
 104
 105 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
 106 {
 107     uint32_t val = 0;
 108
 109     BADF("%s: %08x\n", __func__, nport);
 110
 111     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
 112     return val;
 113 }
 114
 115 static const MemoryRegionPortio i82374_portio_list[] = {
 116     { 0x0A, 1, 1, .read = i82374_read_isr, },
 117     { 0x10, 8, 1, .write = i82374_write_command, },
 118     { 0x18, 8, 1, .read = i82374_read_status, },
 119     { 0x20, 0x20, 1,
 120       .write = i82374_write_descriptor, .read = i82374_read_descriptor, },
 121     PORTIO_END_OF_LIST(),
 122 };
 123
 124 static void i82374_realize(DeviceState *dev, Error **errp)
 125 {
 126     I82374State *s = I82374(dev);
 127     ISABus *isa_bus = isa_bus_from_device(ISA_DEVICE(dev));
 128
 129     if (isa_get_dma(isa_bus, 0)) {
 130         error_setg(errp, "DMA already initialized on ISA bus");
 131         return;
 132     }
 133     i8257_dma_init(isa_bus, true);
 134
 135     portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s,
 136                      "i82374");
 137     portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj),
 138                     s->iobase);
 139
 140     memset(s->commands, 0, sizeof(s->commands));
 141 }
 142
 143 static Property i82374_properties[] = {
 144     DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400),
 145     DEFINE_PROP_END_OF_LIST()
 146 };
 147
 148 static void i82374_class_init(ObjectClass *klass, void *data)
 149 {
 150     DeviceClass *dc = DEVICE_CLASS(klass);
 151
 152     dc->realize = i82374_realize;
 153     dc->vmsd = &vmstate_i82374;
 154     device_class_set_props(dc, i82374_properties);
 155 }
 156
 157 static const TypeInfo i82374_info = {
 158     .name  = TYPE_I82374,
 159     .parent = TYPE_ISA_DEVICE,
 160     .instance_size  = sizeof(I82374State),
 161     .class_init = i82374_class_init,
 162 };
 163
 164 static void i82374_register_types(void)
 165 {
 166     type_register_static(&i82374_info);
 167 }
 168
 169 type_init(i82374_register_types)