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Use correct types to enable > 2G support, based on a patch from
[mirror_qemu.git] / hw / fdc.c
1 /*
2 * QEMU Floppy disk emulator (Intel 82078)
3 *
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 /*
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
28 */
29 #include "hw.h"
30 #include "fdc.h"
31 #include "block.h"
32 #include "qemu-timer.h"
33 #include "isa.h"
34
35 /********************************************************/
36 /* debug Floppy devices */
37 //#define DEBUG_FLOPPY
38
39 #ifdef DEBUG_FLOPPY
40 #define FLOPPY_DPRINTF(fmt, args...) \
41 do { printf("FLOPPY: " fmt , ##args); } while (0)
42 #else
43 #define FLOPPY_DPRINTF(fmt, args...)
44 #endif
45
46 #define FLOPPY_ERROR(fmt, args...) \
47 do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ##args); } while (0)
48
49 /********************************************************/
50 /* Floppy drive emulation */
51
52 /* Will always be a fixed parameter for us */
53 #define FD_SECTOR_LEN 512
54 #define FD_SECTOR_SC 2 /* Sector size code */
55
56 /* Floppy disk drive emulation */
57 typedef enum fdisk_type_t {
58 FDRIVE_DISK_288 = 0x01, /* 2.88 MB disk */
59 FDRIVE_DISK_144 = 0x02, /* 1.44 MB disk */
60 FDRIVE_DISK_720 = 0x03, /* 720 kB disk */
61 FDRIVE_DISK_USER = 0x04, /* User defined geometry */
62 FDRIVE_DISK_NONE = 0x05, /* No disk */
63 } fdisk_type_t;
64
65 typedef enum fdrive_type_t {
66 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
67 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
68 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
69 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
70 } fdrive_type_t;
71
72 typedef enum fdrive_flags_t {
73 FDRIVE_MOTOR_ON = 0x01, /* motor on/off */
74 } fdrive_flags_t;
75
76 typedef enum fdisk_flags_t {
77 FDISK_DBL_SIDES = 0x01,
78 } fdisk_flags_t;
79
80 typedef struct fdrive_t {
81 BlockDriverState *bs;
82 /* Drive status */
83 fdrive_type_t drive;
84 fdrive_flags_t drflags;
85 uint8_t perpendicular; /* 2.88 MB access mode */
86 /* Position */
87 uint8_t head;
88 uint8_t track;
89 uint8_t sect;
90 /* Last operation status */
91 uint8_t dir; /* Direction */
92 uint8_t rw; /* Read/write */
93 /* Media */
94 fdisk_flags_t flags;
95 uint8_t last_sect; /* Nb sector per track */
96 uint8_t max_track; /* Nb of tracks */
97 uint16_t bps; /* Bytes per sector */
98 uint8_t ro; /* Is read-only */
99 } fdrive_t;
100
101 static void fd_init (fdrive_t *drv, BlockDriverState *bs)
102 {
103 /* Drive */
104 drv->bs = bs;
105 drv->drive = FDRIVE_DRV_NONE;
106 drv->drflags = 0;
107 drv->perpendicular = 0;
108 /* Disk */
109 drv->last_sect = 0;
110 drv->max_track = 0;
111 }
112
113 static int _fd_sector (uint8_t head, uint8_t track,
114 uint8_t sect, uint8_t last_sect)
115 {
116 return (((track * 2) + head) * last_sect) + sect - 1;
117 }
118
119 /* Returns current position, in sectors, for given drive */
120 static int fd_sector (fdrive_t *drv)
121 {
122 return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
123 }
124
125 static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
126 int enable_seek)
127 {
128 uint32_t sector;
129 int ret;
130
131 if (track > drv->max_track ||
132 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
133 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
134 head, track, sect, 1,
135 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
136 drv->max_track, drv->last_sect);
137 return 2;
138 }
139 if (sect > drv->last_sect) {
140 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
141 head, track, sect, 1,
142 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
143 drv->max_track, drv->last_sect);
144 return 3;
145 }
146 sector = _fd_sector(head, track, sect, drv->last_sect);
147 ret = 0;
148 if (sector != fd_sector(drv)) {
149 #if 0
150 if (!enable_seek) {
151 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
152 head, track, sect, 1, drv->max_track, drv->last_sect);
153 return 4;
154 }
155 #endif
156 drv->head = head;
157 if (drv->track != track)
158 ret = 1;
159 drv->track = track;
160 drv->sect = sect;
161 }
162
163 return ret;
164 }
165
166 /* Set drive back to track 0 */
167 static void fd_recalibrate (fdrive_t *drv)
168 {
169 FLOPPY_DPRINTF("recalibrate\n");
170 drv->head = 0;
171 drv->track = 0;
172 drv->sect = 1;
173 drv->dir = 1;
174 drv->rw = 0;
175 }
176
177 /* Recognize floppy formats */
178 typedef struct fd_format_t {
179 fdrive_type_t drive;
180 fdisk_type_t disk;
181 uint8_t last_sect;
182 uint8_t max_track;
183 uint8_t max_head;
184 const char *str;
185 } fd_format_t;
186
187 static const fd_format_t fd_formats[] = {
188 /* First entry is default format */
189 /* 1.44 MB 3"1/2 floppy disks */
190 { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", },
191 { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1, "1.6 MB 3\"1/2", },
192 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", },
193 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", },
194 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", },
195 { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", },
196 { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", },
197 { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", },
198 /* 2.88 MB 3"1/2 floppy disks */
199 { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", },
200 { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", },
201 { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1, "3.2 MB 3\"1/2", },
202 { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", },
203 { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", },
204 /* 720 kB 3"1/2 floppy disks */
205 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 1, "720 kB 3\"1/2", },
206 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1, "800 kB 3\"1/2", },
207 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1, "820 kB 3\"1/2", },
208 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1, "830 kB 3\"1/2", },
209 { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", },
210 { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", },
211 /* 1.2 MB 5"1/4 floppy disks */
212 { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1, "1.2 kB 5\"1/4", },
213 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", },
214 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", },
215 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", },
216 { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1, "1.6 MB 5\"1/4", },
217 /* 720 kB 5"1/4 floppy disks */
218 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 80, 1, "720 kB 5\"1/4", },
219 { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1, "880 kB 5\"1/4", },
220 /* 360 kB 5"1/4 floppy disks */
221 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 1, "360 kB 5\"1/4", },
222 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 0, "180 kB 5\"1/4", },
223 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1, "410 kB 5\"1/4", },
224 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1, "420 kB 5\"1/4", },
225 /* 320 kB 5"1/4 floppy disks */
226 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 1, "320 kB 5\"1/4", },
227 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 0, "160 kB 5\"1/4", },
228 /* 360 kB must match 5"1/4 better than 3"1/2... */
229 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 0, "360 kB 3\"1/2", },
230 /* end */
231 { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, },
232 };
233
234 /* Revalidate a disk drive after a disk change */
235 static void fd_revalidate (fdrive_t *drv)
236 {
237 const fd_format_t *parse;
238 uint64_t nb_sectors, size;
239 int i, first_match, match;
240 int nb_heads, max_track, last_sect, ro;
241
242 FLOPPY_DPRINTF("revalidate\n");
243 if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
244 ro = bdrv_is_read_only(drv->bs);
245 bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect);
246 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
247 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
248 nb_heads - 1, max_track, last_sect);
249 } else {
250 bdrv_get_geometry(drv->bs, &nb_sectors);
251 match = -1;
252 first_match = -1;
253 for (i = 0;; i++) {
254 parse = &fd_formats[i];
255 if (parse->drive == FDRIVE_DRV_NONE)
256 break;
257 if (drv->drive == parse->drive ||
258 drv->drive == FDRIVE_DRV_NONE) {
259 size = (parse->max_head + 1) * parse->max_track *
260 parse->last_sect;
261 if (nb_sectors == size) {
262 match = i;
263 break;
264 }
265 if (first_match == -1)
266 first_match = i;
267 }
268 }
269 if (match == -1) {
270 if (first_match == -1)
271 match = 1;
272 else
273 match = first_match;
274 parse = &fd_formats[match];
275 }
276 nb_heads = parse->max_head + 1;
277 max_track = parse->max_track;
278 last_sect = parse->last_sect;
279 drv->drive = parse->drive;
280 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
281 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
282 }
283 if (nb_heads == 1) {
284 drv->flags &= ~FDISK_DBL_SIDES;
285 } else {
286 drv->flags |= FDISK_DBL_SIDES;
287 }
288 drv->max_track = max_track;
289 drv->last_sect = last_sect;
290 drv->ro = ro;
291 } else {
292 FLOPPY_DPRINTF("No disk in drive\n");
293 drv->last_sect = 0;
294 drv->max_track = 0;
295 drv->flags &= ~FDISK_DBL_SIDES;
296 }
297 }
298
299 /* Motor control */
300 static void fd_start (fdrive_t *drv)
301 {
302 drv->drflags |= FDRIVE_MOTOR_ON;
303 }
304
305 static void fd_stop (fdrive_t *drv)
306 {
307 drv->drflags &= ~FDRIVE_MOTOR_ON;
308 }
309
310 /* Re-initialise a drives (motor off, repositioned) */
311 static void fd_reset (fdrive_t *drv)
312 {
313 fd_stop(drv);
314 fd_recalibrate(drv);
315 }
316
317 /********************************************************/
318 /* Intel 82078 floppy disk controller emulation */
319
320 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
321 static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
322 static int fdctrl_transfer_handler (void *opaque, int nchan,
323 int dma_pos, int dma_len);
324 static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status);
325 static void fdctrl_result_timer(void *opaque);
326
327 static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl);
328 static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl);
329 static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value);
330 static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl);
331 static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value);
332 static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl);
333 static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value);
334 static uint32_t fdctrl_read_data (fdctrl_t *fdctrl);
335 static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value);
336 static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl);
337
338 enum {
339 FD_CTRL_ACTIVE = 0x01, /* XXX: suppress that */
340 FD_CTRL_RESET = 0x02,
341 FD_CTRL_SLEEP = 0x04, /* XXX: suppress that */
342 FD_CTRL_BUSY = 0x08, /* dma transfer in progress */
343 FD_CTRL_INTR = 0x10,
344 };
345
346 enum {
347 FD_DIR_WRITE = 0,
348 FD_DIR_READ = 1,
349 FD_DIR_SCANE = 2,
350 FD_DIR_SCANL = 3,
351 FD_DIR_SCANH = 4,
352 };
353
354 enum {
355 FD_STATE_CMD = 0x00,
356 FD_STATE_STATUS = 0x01,
357 FD_STATE_DATA = 0x02,
358 FD_STATE_STATE = 0x03,
359 FD_STATE_MULTI = 0x10,
360 FD_STATE_SEEK = 0x20,
361 FD_STATE_FORMAT = 0x40,
362 };
363
364 enum {
365 FD_REG_0 = 0x00,
366 FD_REG_STATUSB = 0x01,
367 FD_REG_DOR = 0x02,
368 FD_REG_TDR = 0x03,
369 FD_REG_MSR = 0x04,
370 FD_REG_DSR = 0x04,
371 FD_REG_FIFO = 0x05,
372 FD_REG_DIR = 0x07,
373 };
374
375 enum {
376 FD_CMD_READ_TRACK = 0x02,
377 FD_CMD_SPECIFY = 0x03,
378 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
379 FD_CMD_WRITE = 0x05,
380 FD_CMD_READ = 0x06,
381 FD_CMD_RECALIBRATE = 0x07,
382 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
383 FD_CMD_WRITE_DELETED = 0x09,
384 FD_CMD_READ_ID = 0x0a,
385 FD_CMD_READ_DELETED = 0x0c,
386 FD_CMD_FORMAT_TRACK = 0x0d,
387 FD_CMD_DUMPREG = 0x0e,
388 FD_CMD_SEEK = 0x0f,
389 FD_CMD_VERSION = 0x10,
390 FD_CMD_SCAN_EQUAL = 0x11,
391 FD_CMD_PERPENDICULAR_MODE = 0x12,
392 FD_CMD_CONFIGURE = 0x13,
393 FD_CMD_LOCK = 0x14,
394 FD_CMD_VERIFY = 0x16,
395 FD_CMD_POWERDOWN_MODE = 0x17,
396 FD_CMD_PART_ID = 0x18,
397 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
398 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
399 FD_CMD_SAVE = 0x2c,
400 FD_CMD_OPTION = 0x33,
401 FD_CMD_RESTORE = 0x4c,
402 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
403 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
404 FD_CMD_FORMAT_AND_WRITE = 0xcd,
405 FD_CMD_RELATIVE_SEEK_IN = 0xcf,
406 };
407
408 enum {
409 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
410 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
411 FD_CONFIG_POLL = 0x10, /* Poll enabled */
412 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
413 FD_CONFIG_EIS = 0x40, /* No implied seeks */
414 };
415
416 enum {
417 FD_SR0_EQPMT = 0x10,
418 FD_SR0_SEEK = 0x20,
419 FD_SR0_ABNTERM = 0x40,
420 FD_SR0_INVCMD = 0x80,
421 FD_SR0_RDYCHG = 0xc0,
422 };
423
424 enum {
425 FD_DOR_SELMASK = 0x01,
426 FD_DOR_nRESET = 0x04,
427 FD_DOR_DMAEN = 0x08,
428 FD_DOR_MOTEN0 = 0x10,
429 FD_DOR_MOTEN1 = 0x20,
430 FD_DOR_MOTEN2 = 0x40,
431 FD_DOR_MOTEN3 = 0x80,
432 };
433
434 enum {
435 FD_TDR_BOOTSEL = 0x0c,
436 };
437
438 enum {
439 FD_DSR_DRATEMASK= 0x03,
440 FD_DSR_PWRDOWN = 0x40,
441 FD_DSR_SWRESET = 0x80,
442 };
443
444 enum {
445 FD_MSR_DRV0BUSY = 0x01,
446 FD_MSR_DRV1BUSY = 0x02,
447 FD_MSR_DRV2BUSY = 0x04,
448 FD_MSR_DRV3BUSY = 0x08,
449 FD_MSR_CMDBUSY = 0x10,
450 FD_MSR_NONDMA = 0x20,
451 FD_MSR_DIO = 0x40,
452 FD_MSR_RQM = 0x80,
453 };
454
455 enum {
456 FD_DIR_DSKCHG = 0x80,
457 };
458
459 #define FD_STATE(state) ((state) & FD_STATE_STATE)
460 #define FD_SET_STATE(state, new_state) \
461 do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0)
462 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
463 #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
464 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
465
466 struct fdctrl_t {
467 fdctrl_t *fdctrl;
468 /* Controller's identification */
469 uint8_t version;
470 /* HW */
471 qemu_irq irq;
472 int dma_chann;
473 target_phys_addr_t io_base;
474 /* Controller state */
475 QEMUTimer *result_timer;
476 uint8_t state;
477 uint8_t dma_en;
478 uint8_t cur_drv;
479 uint8_t bootsel;
480 /* Command FIFO */
481 uint8_t *fifo;
482 uint32_t data_pos;
483 uint32_t data_len;
484 uint8_t data_state;
485 uint8_t data_dir;
486 uint8_t int_status;
487 uint8_t eot; /* last wanted sector */
488 /* States kept only to be returned back */
489 /* Timers state */
490 uint8_t timer0;
491 uint8_t timer1;
492 /* precompensation */
493 uint8_t precomp_trk;
494 uint8_t config;
495 uint8_t lock;
496 /* Power down config (also with status regB access mode */
497 uint8_t pwrd;
498 /* Sun4m quirks? */
499 int sun4m;
500 /* Floppy drives */
501 fdrive_t drives[2];
502 };
503
504 static uint32_t fdctrl_read (void *opaque, uint32_t reg)
505 {
506 fdctrl_t *fdctrl = opaque;
507 uint32_t retval;
508
509 switch (reg & 0x07) {
510 case FD_REG_0:
511 if (fdctrl->sun4m) {
512 // Identify to Linux as S82078B
513 retval = fdctrl_read_statusB(fdctrl);
514 } else {
515 retval = (uint32_t)(-1);
516 }
517 break;
518 case FD_REG_STATUSB:
519 retval = fdctrl_read_statusB(fdctrl);
520 break;
521 case FD_REG_DOR:
522 retval = fdctrl_read_dor(fdctrl);
523 break;
524 case FD_REG_TDR:
525 retval = fdctrl_read_tape(fdctrl);
526 break;
527 case FD_REG_MSR:
528 retval = fdctrl_read_main_status(fdctrl);
529 break;
530 case FD_REG_FIFO:
531 retval = fdctrl_read_data(fdctrl);
532 break;
533 case FD_REG_DIR:
534 retval = fdctrl_read_dir(fdctrl);
535 break;
536 default:
537 retval = (uint32_t)(-1);
538 break;
539 }
540 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
541
542 return retval;
543 }
544
545 static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
546 {
547 fdctrl_t *fdctrl = opaque;
548
549 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
550
551 switch (reg & 0x07) {
552 case FD_REG_DOR:
553 fdctrl_write_dor(fdctrl, value);
554 break;
555 case FD_REG_TDR:
556 fdctrl_write_tape(fdctrl, value);
557 break;
558 case FD_REG_DSR:
559 fdctrl_write_rate(fdctrl, value);
560 break;
561 case FD_REG_FIFO:
562 fdctrl_write_data(fdctrl, value);
563 break;
564 default:
565 break;
566 }
567 }
568
569 static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
570 {
571 return fdctrl_read(opaque, (uint32_t)reg);
572 }
573
574 static void fdctrl_write_mem (void *opaque,
575 target_phys_addr_t reg, uint32_t value)
576 {
577 fdctrl_write(opaque, (uint32_t)reg, value);
578 }
579
580 static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
581 fdctrl_read_mem,
582 fdctrl_read_mem,
583 fdctrl_read_mem,
584 };
585
586 static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
587 fdctrl_write_mem,
588 fdctrl_write_mem,
589 fdctrl_write_mem,
590 };
591
592 static CPUReadMemoryFunc *fdctrl_mem_read_strict[3] = {
593 fdctrl_read_mem,
594 NULL,
595 NULL,
596 };
597
598 static CPUWriteMemoryFunc *fdctrl_mem_write_strict[3] = {
599 fdctrl_write_mem,
600 NULL,
601 NULL,
602 };
603
604 static void fd_save (QEMUFile *f, fdrive_t *fd)
605 {
606 uint8_t tmp;
607
608 tmp = fd->drflags;
609 qemu_put_8s(f, &tmp);
610 qemu_put_8s(f, &fd->head);
611 qemu_put_8s(f, &fd->track);
612 qemu_put_8s(f, &fd->sect);
613 qemu_put_8s(f, &fd->dir);
614 qemu_put_8s(f, &fd->rw);
615 }
616
617 static void fdc_save (QEMUFile *f, void *opaque)
618 {
619 fdctrl_t *s = opaque;
620
621 qemu_put_8s(f, &s->state);
622 qemu_put_8s(f, &s->dma_en);
623 qemu_put_8s(f, &s->cur_drv);
624 qemu_put_8s(f, &s->bootsel);
625 qemu_put_buffer(f, s->fifo, FD_SECTOR_LEN);
626 qemu_put_be32s(f, &s->data_pos);
627 qemu_put_be32s(f, &s->data_len);
628 qemu_put_8s(f, &s->data_state);
629 qemu_put_8s(f, &s->data_dir);
630 qemu_put_8s(f, &s->int_status);
631 qemu_put_8s(f, &s->eot);
632 qemu_put_8s(f, &s->timer0);
633 qemu_put_8s(f, &s->timer1);
634 qemu_put_8s(f, &s->precomp_trk);
635 qemu_put_8s(f, &s->config);
636 qemu_put_8s(f, &s->lock);
637 qemu_put_8s(f, &s->pwrd);
638 fd_save(f, &s->drives[0]);
639 fd_save(f, &s->drives[1]);
640 }
641
642 static int fd_load (QEMUFile *f, fdrive_t *fd)
643 {
644 uint8_t tmp;
645
646 qemu_get_8s(f, &tmp);
647 fd->drflags = tmp;
648 qemu_get_8s(f, &fd->head);
649 qemu_get_8s(f, &fd->track);
650 qemu_get_8s(f, &fd->sect);
651 qemu_get_8s(f, &fd->dir);
652 qemu_get_8s(f, &fd->rw);
653
654 return 0;
655 }
656
657 static int fdc_load (QEMUFile *f, void *opaque, int version_id)
658 {
659 fdctrl_t *s = opaque;
660 int ret;
661
662 if (version_id != 1)
663 return -EINVAL;
664
665 qemu_get_8s(f, &s->state);
666 qemu_get_8s(f, &s->dma_en);
667 qemu_get_8s(f, &s->cur_drv);
668 qemu_get_8s(f, &s->bootsel);
669 qemu_get_buffer(f, s->fifo, FD_SECTOR_LEN);
670 qemu_get_be32s(f, &s->data_pos);
671 qemu_get_be32s(f, &s->data_len);
672 qemu_get_8s(f, &s->data_state);
673 qemu_get_8s(f, &s->data_dir);
674 qemu_get_8s(f, &s->int_status);
675 qemu_get_8s(f, &s->eot);
676 qemu_get_8s(f, &s->timer0);
677 qemu_get_8s(f, &s->timer1);
678 qemu_get_8s(f, &s->precomp_trk);
679 qemu_get_8s(f, &s->config);
680 qemu_get_8s(f, &s->lock);
681 qemu_get_8s(f, &s->pwrd);
682
683 ret = fd_load(f, &s->drives[0]);
684 if (ret == 0)
685 ret = fd_load(f, &s->drives[1]);
686
687 return ret;
688 }
689
690 static void fdctrl_external_reset(void *opaque)
691 {
692 fdctrl_t *s = opaque;
693
694 fdctrl_reset(s, 0);
695 }
696
697 static fdctrl_t *fdctrl_init_common (qemu_irq irq, int dma_chann,
698 target_phys_addr_t io_base,
699 BlockDriverState **fds)
700 {
701 fdctrl_t *fdctrl;
702 int i;
703
704 FLOPPY_DPRINTF("init controller\n");
705 fdctrl = qemu_mallocz(sizeof(fdctrl_t));
706 if (!fdctrl)
707 return NULL;
708 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
709 if (fdctrl->fifo == NULL) {
710 qemu_free(fdctrl);
711 return NULL;
712 }
713 fdctrl->result_timer = qemu_new_timer(vm_clock,
714 fdctrl_result_timer, fdctrl);
715
716 fdctrl->version = 0x90; /* Intel 82078 controller */
717 fdctrl->irq = irq;
718 fdctrl->dma_chann = dma_chann;
719 fdctrl->io_base = io_base;
720 fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
721 if (fdctrl->dma_chann != -1) {
722 fdctrl->dma_en = 1;
723 DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
724 } else {
725 fdctrl->dma_en = 0;
726 }
727 for (i = 0; i < MAX_FD; i++) {
728 fd_init(&fdctrl->drives[i], fds[i]);
729 }
730 fdctrl_reset(fdctrl, 0);
731 fdctrl->state = FD_CTRL_ACTIVE;
732 register_savevm("fdc", io_base, 1, fdc_save, fdc_load, fdctrl);
733 qemu_register_reset(fdctrl_external_reset, fdctrl);
734 for (i = 0; i < MAX_FD; i++) {
735 fd_revalidate(&fdctrl->drives[i]);
736 }
737
738 return fdctrl;
739 }
740
741 fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
742 target_phys_addr_t io_base,
743 BlockDriverState **fds)
744 {
745 fdctrl_t *fdctrl;
746 int io_mem;
747
748 fdctrl = fdctrl_init_common(irq, dma_chann, io_base, fds);
749
750 fdctrl->sun4m = 0;
751 if (mem_mapped) {
752 io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write,
753 fdctrl);
754 cpu_register_physical_memory(io_base, 0x08, io_mem);
755 } else {
756 register_ioport_read((uint32_t)io_base + 0x01, 5, 1, &fdctrl_read,
757 fdctrl);
758 register_ioport_read((uint32_t)io_base + 0x07, 1, 1, &fdctrl_read,
759 fdctrl);
760 register_ioport_write((uint32_t)io_base + 0x01, 5, 1, &fdctrl_write,
761 fdctrl);
762 register_ioport_write((uint32_t)io_base + 0x07, 1, 1, &fdctrl_write,
763 fdctrl);
764 }
765
766 return fdctrl;
767 }
768
769 static void fdctrl_handle_tc(void *opaque, int irq, int level)
770 {
771 //fdctrl_t *s = opaque;
772
773 if (level) {
774 // XXX
775 FLOPPY_DPRINTF("TC pulsed\n");
776 }
777 }
778
779 fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
780 BlockDriverState **fds, qemu_irq *fdc_tc)
781 {
782 fdctrl_t *fdctrl;
783 int io_mem;
784
785 fdctrl = fdctrl_init_common(irq, 0, io_base, fds);
786 fdctrl->sun4m = 1;
787 io_mem = cpu_register_io_memory(0, fdctrl_mem_read_strict,
788 fdctrl_mem_write_strict,
789 fdctrl);
790 cpu_register_physical_memory(io_base, 0x08, io_mem);
791 *fdc_tc = *qemu_allocate_irqs(fdctrl_handle_tc, fdctrl, 1);
792
793 return fdctrl;
794 }
795
796 /* XXX: may change if moved to bdrv */
797 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num)
798 {
799 return fdctrl->drives[drive_num].drive;
800 }
801
802 /* Change IRQ state */
803 static void fdctrl_reset_irq (fdctrl_t *fdctrl)
804 {
805 FLOPPY_DPRINTF("Reset interrupt\n");
806 qemu_set_irq(fdctrl->irq, 0);
807 fdctrl->state &= ~FD_CTRL_INTR;
808 }
809
810 static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status)
811 {
812 // Sparc mutation
813 if (fdctrl->sun4m && !fdctrl->dma_en) {
814 fdctrl->state &= ~FD_CTRL_BUSY;
815 fdctrl->int_status = status;
816 return;
817 }
818 if (~(fdctrl->state & FD_CTRL_INTR)) {
819 qemu_set_irq(fdctrl->irq, 1);
820 fdctrl->state |= FD_CTRL_INTR;
821 }
822 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", status);
823 fdctrl->int_status = status;
824 }
825
826 /* Reset controller */
827 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq)
828 {
829 int i;
830
831 FLOPPY_DPRINTF("reset controller\n");
832 fdctrl_reset_irq(fdctrl);
833 /* Initialise controller */
834 fdctrl->cur_drv = 0;
835 /* FIFO state */
836 fdctrl->data_pos = 0;
837 fdctrl->data_len = 0;
838 fdctrl->data_state = FD_STATE_CMD;
839 fdctrl->data_dir = FD_DIR_WRITE;
840 for (i = 0; i < MAX_FD; i++)
841 fd_reset(&fdctrl->drives[i]);
842 fdctrl_reset_fifo(fdctrl);
843 if (do_irq)
844 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
845 }
846
847 static inline fdrive_t *drv0 (fdctrl_t *fdctrl)
848 {
849 return &fdctrl->drives[fdctrl->bootsel];
850 }
851
852 static inline fdrive_t *drv1 (fdctrl_t *fdctrl)
853 {
854 return &fdctrl->drives[1 - fdctrl->bootsel];
855 }
856
857 static fdrive_t *get_cur_drv (fdctrl_t *fdctrl)
858 {
859 return fdctrl->cur_drv == 0 ? drv0(fdctrl) : drv1(fdctrl);
860 }
861
862 /* Status B register : 0x01 (read-only) */
863 static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl)
864 {
865 FLOPPY_DPRINTF("status register: 0x00\n");
866 return 0;
867 }
868
869 /* Digital output register : 0x02 */
870 static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl)
871 {
872 uint32_t retval = 0;
873
874 /* Drive motors state indicators */
875 if (drv0(fdctrl)->drflags & FDRIVE_MOTOR_ON)
876 retval |= FD_DOR_MOTEN0;
877 if (drv1(fdctrl)->drflags & FDRIVE_MOTOR_ON)
878 retval |= FD_DOR_MOTEN1;
879 /* DMA enable */
880 if (fdctrl->dma_en)
881 retval |= FD_DOR_DMAEN;
882 /* Reset indicator */
883 if (!(fdctrl->state & FD_CTRL_RESET))
884 retval |= FD_DOR_nRESET;
885 /* Selected drive */
886 retval |= fdctrl->cur_drv;
887 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
888
889 return retval;
890 }
891
892 static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
893 {
894 /* Reset mode */
895 if (fdctrl->state & FD_CTRL_RESET) {
896 if (!(value & FD_DOR_nRESET)) {
897 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
898 return;
899 }
900 }
901 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
902 /* Drive motors state indicators */
903 if (value & FD_DOR_MOTEN1)
904 fd_start(drv1(fdctrl));
905 else
906 fd_stop(drv1(fdctrl));
907 if (value & FD_DOR_MOTEN0)
908 fd_start(drv0(fdctrl));
909 else
910 fd_stop(drv0(fdctrl));
911 /* DMA enable */
912 #if 0
913 if (fdctrl->dma_chann != -1)
914 fdctrl->dma_en = value & FD_DOR_DMAEN ? 1 : 0;
915 #endif
916 /* Reset */
917 if (!(value & FD_DOR_nRESET)) {
918 if (!(fdctrl->state & FD_CTRL_RESET)) {
919 FLOPPY_DPRINTF("controller enter RESET state\n");
920 fdctrl->state |= FD_CTRL_RESET;
921 }
922 } else {
923 if (fdctrl->state & FD_CTRL_RESET) {
924 FLOPPY_DPRINTF("controller out of RESET state\n");
925 fdctrl_reset(fdctrl, 1);
926 fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP);
927 }
928 }
929 /* Selected drive */
930 fdctrl->cur_drv = value & FD_DOR_SELMASK;
931 }
932
933 /* Tape drive register : 0x03 */
934 static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl)
935 {
936 uint32_t retval = 0;
937
938 /* Disk boot selection indicator */
939 retval |= fdctrl->bootsel << 2;
940 /* Tape indicators: never allowed */
941 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
942
943 return retval;
944 }
945
946 static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value)
947 {
948 /* Reset mode */
949 if (fdctrl->state & FD_CTRL_RESET) {
950 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
951 return;
952 }
953 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
954 /* Disk boot selection indicator */
955 fdctrl->bootsel = (value & FD_TDR_BOOTSEL) >> 2;
956 /* Tape indicators: never allow */
957 }
958
959 /* Main status register : 0x04 (read) */
960 static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl)
961 {
962 uint32_t retval = 0;
963
964 fdctrl->state &= ~(FD_CTRL_SLEEP | FD_CTRL_RESET);
965 if (!(fdctrl->state & FD_CTRL_BUSY)) {
966 /* Data transfer allowed */
967 retval |= FD_MSR_RQM;
968 /* Data transfer direction indicator */
969 if (fdctrl->data_dir == FD_DIR_READ)
970 retval |= FD_MSR_DIO;
971 }
972 /* Should handle FD_MSR_NONDMA for SPECIFY command */
973 /* Command busy indicator */
974 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA ||
975 FD_STATE(fdctrl->data_state) == FD_STATE_STATUS)
976 retval |= FD_MSR_CMDBUSY;
977 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
978
979 return retval;
980 }
981
982 /* Data select rate register : 0x04 (write) */
983 static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value)
984 {
985 /* Reset mode */
986 if (fdctrl->state & FD_CTRL_RESET) {
987 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
988 return;
989 }
990 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
991 /* Reset: autoclear */
992 if (value & FD_DSR_SWRESET) {
993 fdctrl->state |= FD_CTRL_RESET;
994 fdctrl_reset(fdctrl, 1);
995 fdctrl->state &= ~FD_CTRL_RESET;
996 }
997 if (value & FD_DSR_PWRDOWN) {
998 fdctrl->state |= FD_CTRL_SLEEP;
999 fdctrl_reset(fdctrl, 1);
1000 }
1001 }
1002
1003 static int fdctrl_media_changed(fdrive_t *drv)
1004 {
1005 int ret;
1006
1007 if (!drv->bs)
1008 return 0;
1009 ret = bdrv_media_changed(drv->bs);
1010 if (ret) {
1011 fd_revalidate(drv);
1012 }
1013 return ret;
1014 }
1015
1016 /* Digital input register : 0x07 (read-only) */
1017 static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl)
1018 {
1019 uint32_t retval = 0;
1020
1021 if (fdctrl_media_changed(drv0(fdctrl)) ||
1022 fdctrl_media_changed(drv1(fdctrl)))
1023 retval |= FD_DIR_DSKCHG;
1024 if (retval != 0)
1025 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1026
1027 return retval;
1028 }
1029
1030 /* FIFO state control */
1031 static void fdctrl_reset_fifo (fdctrl_t *fdctrl)
1032 {
1033 fdctrl->data_dir = FD_DIR_WRITE;
1034 fdctrl->data_pos = 0;
1035 FD_SET_STATE(fdctrl->data_state, FD_STATE_CMD);
1036 }
1037
1038 /* Set FIFO status for the host to read */
1039 static void fdctrl_set_fifo (fdctrl_t *fdctrl, int fifo_len, int do_irq)
1040 {
1041 fdctrl->data_dir = FD_DIR_READ;
1042 fdctrl->data_len = fifo_len;
1043 fdctrl->data_pos = 0;
1044 FD_SET_STATE(fdctrl->data_state, FD_STATE_STATUS);
1045 if (do_irq)
1046 fdctrl_raise_irq(fdctrl, 0x00);
1047 }
1048
1049 /* Set an error: unimplemented/unknown command */
1050 static void fdctrl_unimplemented (fdctrl_t *fdctrl, int direction)
1051 {
1052 #if 0
1053 fdrive_t *cur_drv;
1054
1055 cur_drv = get_cur_drv(fdctrl);
1056 fdctrl->fifo[0] = FD_SR0_ABNTERM | FD_SR0_SEEK | (cur_drv->head << 2) | fdctrl->cur_drv;
1057 fdctrl->fifo[1] = 0x00;
1058 fdctrl->fifo[2] = 0x00;
1059 fdctrl_set_fifo(fdctrl, 3, 1);
1060 #else
1061 // fdctrl_reset_fifo(fdctrl);
1062 fdctrl->fifo[0] = FD_SR0_INVCMD;
1063 fdctrl_set_fifo(fdctrl, 1, 0);
1064 #endif
1065 }
1066
1067 /* Callback for transfer end (stop or abort) */
1068 static void fdctrl_stop_transfer (fdctrl_t *fdctrl, uint8_t status0,
1069 uint8_t status1, uint8_t status2)
1070 {
1071 fdrive_t *cur_drv;
1072
1073 cur_drv = get_cur_drv(fdctrl);
1074 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1075 status0, status1, status2,
1076 status0 | (cur_drv->head << 2) | fdctrl->cur_drv);
1077 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | fdctrl->cur_drv;
1078 fdctrl->fifo[1] = status1;
1079 fdctrl->fifo[2] = status2;
1080 fdctrl->fifo[3] = cur_drv->track;
1081 fdctrl->fifo[4] = cur_drv->head;
1082 fdctrl->fifo[5] = cur_drv->sect;
1083 fdctrl->fifo[6] = FD_SECTOR_SC;
1084 fdctrl->data_dir = FD_DIR_READ;
1085 if (fdctrl->state & FD_CTRL_BUSY) {
1086 DMA_release_DREQ(fdctrl->dma_chann);
1087 fdctrl->state &= ~FD_CTRL_BUSY;
1088 }
1089 fdctrl_set_fifo(fdctrl, 7, 1);
1090 }
1091
1092 /* Prepare a data transfer (either DMA or FIFO) */
1093 static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
1094 {
1095 fdrive_t *cur_drv;
1096 uint8_t kh, kt, ks;
1097 int did_seek;
1098
1099 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1100 cur_drv = get_cur_drv(fdctrl);
1101 kt = fdctrl->fifo[2];
1102 kh = fdctrl->fifo[3];
1103 ks = fdctrl->fifo[4];
1104 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1105 fdctrl->cur_drv, kh, kt, ks,
1106 _fd_sector(kh, kt, ks, cur_drv->last_sect));
1107 did_seek = 0;
1108 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
1109 case 2:
1110 /* sect too big */
1111 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1112 fdctrl->fifo[3] = kt;
1113 fdctrl->fifo[4] = kh;
1114 fdctrl->fifo[5] = ks;
1115 return;
1116 case 3:
1117 /* track too big */
1118 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x80, 0x00);
1119 fdctrl->fifo[3] = kt;
1120 fdctrl->fifo[4] = kh;
1121 fdctrl->fifo[5] = ks;
1122 return;
1123 case 4:
1124 /* No seek enabled */
1125 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1126 fdctrl->fifo[3] = kt;
1127 fdctrl->fifo[4] = kh;
1128 fdctrl->fifo[5] = ks;
1129 return;
1130 case 1:
1131 did_seek = 1;
1132 break;
1133 default:
1134 break;
1135 }
1136 /* Set the FIFO state */
1137 fdctrl->data_dir = direction;
1138 fdctrl->data_pos = 0;
1139 FD_SET_STATE(fdctrl->data_state, FD_STATE_DATA); /* FIFO ready for data */
1140 if (fdctrl->fifo[0] & 0x80)
1141 fdctrl->data_state |= FD_STATE_MULTI;
1142 else
1143 fdctrl->data_state &= ~FD_STATE_MULTI;
1144 if (did_seek)
1145 fdctrl->data_state |= FD_STATE_SEEK;
1146 else
1147 fdctrl->data_state &= ~FD_STATE_SEEK;
1148 if (fdctrl->fifo[5] == 00) {
1149 fdctrl->data_len = fdctrl->fifo[8];
1150 } else {
1151 int tmp;
1152 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1153 tmp = (cur_drv->last_sect - ks + 1);
1154 if (fdctrl->fifo[0] & 0x80)
1155 tmp += cur_drv->last_sect;
1156 fdctrl->data_len *= tmp;
1157 }
1158 fdctrl->eot = fdctrl->fifo[6];
1159 if (fdctrl->dma_en) {
1160 int dma_mode;
1161 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1162 dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
1163 dma_mode = (dma_mode >> 2) & 3;
1164 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1165 dma_mode, direction,
1166 (128 << fdctrl->fifo[5]) *
1167 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1168 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1169 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1170 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1171 (direction == FD_DIR_READ && dma_mode == 1)) {
1172 /* No access is allowed until DMA transfer has completed */
1173 fdctrl->state |= FD_CTRL_BUSY;
1174 /* Now, we just have to wait for the DMA controller to
1175 * recall us...
1176 */
1177 DMA_hold_DREQ(fdctrl->dma_chann);
1178 DMA_schedule(fdctrl->dma_chann);
1179 return;
1180 } else {
1181 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1182 }
1183 }
1184 FLOPPY_DPRINTF("start non-DMA transfer\n");
1185 /* IO based transfer: calculate len */
1186 fdctrl_raise_irq(fdctrl, 0x00);
1187
1188 return;
1189 }
1190
1191 /* Prepare a transfer of deleted data */
1192 static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction)
1193 {
1194 /* We don't handle deleted data,
1195 * so we don't return *ANYTHING*
1196 */
1197 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1198 }
1199
1200 /* handlers for DMA transfers */
1201 static int fdctrl_transfer_handler (void *opaque, int nchan,
1202 int dma_pos, int dma_len)
1203 {
1204 fdctrl_t *fdctrl;
1205 fdrive_t *cur_drv;
1206 int len, start_pos, rel_pos;
1207 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1208
1209 fdctrl = opaque;
1210 if (!(fdctrl->state & FD_CTRL_BUSY)) {
1211 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1212 return 0;
1213 }
1214 cur_drv = get_cur_drv(fdctrl);
1215 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1216 fdctrl->data_dir == FD_DIR_SCANH)
1217 status2 = 0x04;
1218 if (dma_len > fdctrl->data_len)
1219 dma_len = fdctrl->data_len;
1220 if (cur_drv->bs == NULL) {
1221 if (fdctrl->data_dir == FD_DIR_WRITE)
1222 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1223 else
1224 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1225 len = 0;
1226 goto transfer_error;
1227 }
1228 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1229 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1230 len = dma_len - fdctrl->data_pos;
1231 if (len + rel_pos > FD_SECTOR_LEN)
1232 len = FD_SECTOR_LEN - rel_pos;
1233 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1234 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1235 fdctrl->data_len, fdctrl->cur_drv, cur_drv->head,
1236 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1237 fd_sector(cur_drv) * FD_SECTOR_LEN);
1238 if (fdctrl->data_dir != FD_DIR_WRITE ||
1239 len < FD_SECTOR_LEN || rel_pos != 0) {
1240 /* READ & SCAN commands and realign to a sector for WRITE */
1241 if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1242 fdctrl->fifo, 1) < 0) {
1243 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1244 fd_sector(cur_drv));
1245 /* Sure, image size is too small... */
1246 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1247 }
1248 }
1249 switch (fdctrl->data_dir) {
1250 case FD_DIR_READ:
1251 /* READ commands */
1252 DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
1253 fdctrl->data_pos, len);
1254 break;
1255 case FD_DIR_WRITE:
1256 /* WRITE commands */
1257 DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
1258 fdctrl->data_pos, len);
1259 if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1260 fdctrl->fifo, 1) < 0) {
1261 FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
1262 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1263 goto transfer_error;
1264 }
1265 break;
1266 default:
1267 /* SCAN commands */
1268 {
1269 uint8_t tmpbuf[FD_SECTOR_LEN];
1270 int ret;
1271 DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1272 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1273 if (ret == 0) {
1274 status2 = 0x08;
1275 goto end_transfer;
1276 }
1277 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1278 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1279 status2 = 0x00;
1280 goto end_transfer;
1281 }
1282 }
1283 break;
1284 }
1285 fdctrl->data_pos += len;
1286 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1287 if (rel_pos == 0) {
1288 /* Seek to next sector */
1289 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d) (%d)\n",
1290 cur_drv->head, cur_drv->track, cur_drv->sect,
1291 fd_sector(cur_drv),
1292 fdctrl->data_pos - len);
1293 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1294 error in fact */
1295 if (cur_drv->sect >= cur_drv->last_sect ||
1296 cur_drv->sect == fdctrl->eot) {
1297 cur_drv->sect = 1;
1298 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1299 if (cur_drv->head == 0 &&
1300 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1301 cur_drv->head = 1;
1302 } else {
1303 cur_drv->head = 0;
1304 cur_drv->track++;
1305 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1306 break;
1307 }
1308 } else {
1309 cur_drv->track++;
1310 break;
1311 }
1312 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1313 cur_drv->head, cur_drv->track,
1314 cur_drv->sect, fd_sector(cur_drv));
1315 } else {
1316 cur_drv->sect++;
1317 }
1318 }
1319 }
1320 end_transfer:
1321 len = fdctrl->data_pos - start_pos;
1322 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1323 fdctrl->data_pos, len, fdctrl->data_len);
1324 if (fdctrl->data_dir == FD_DIR_SCANE ||
1325 fdctrl->data_dir == FD_DIR_SCANL ||
1326 fdctrl->data_dir == FD_DIR_SCANH)
1327 status2 = 0x08;
1328 if (FD_DID_SEEK(fdctrl->data_state))
1329 status0 |= FD_SR0_SEEK;
1330 fdctrl->data_len -= len;
1331 // if (fdctrl->data_len == 0)
1332 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1333 transfer_error:
1334
1335 return len;
1336 }
1337
1338 /* Data register : 0x05 */
1339 static uint32_t fdctrl_read_data (fdctrl_t *fdctrl)
1340 {
1341 fdrive_t *cur_drv;
1342 uint32_t retval = 0;
1343 int pos, len;
1344
1345 cur_drv = get_cur_drv(fdctrl);
1346 fdctrl->state &= ~FD_CTRL_SLEEP;
1347 if (FD_STATE(fdctrl->data_state) == FD_STATE_CMD) {
1348 FLOPPY_ERROR("can't read data in CMD state\n");
1349 return 0;
1350 }
1351 pos = fdctrl->data_pos;
1352 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1353 pos %= FD_SECTOR_LEN;
1354 if (pos == 0) {
1355 len = fdctrl->data_len - fdctrl->data_pos;
1356 if (len > FD_SECTOR_LEN)
1357 len = FD_SECTOR_LEN;
1358 bdrv_read(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1);
1359 }
1360 }
1361 retval = fdctrl->fifo[pos];
1362 if (++fdctrl->data_pos == fdctrl->data_len) {
1363 fdctrl->data_pos = 0;
1364 /* Switch from transfer mode to status mode
1365 * then from status mode to command mode
1366 */
1367 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1368 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1369 } else {
1370 fdctrl_reset_fifo(fdctrl);
1371 fdctrl_reset_irq(fdctrl);
1372 }
1373 }
1374 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1375
1376 return retval;
1377 }
1378
1379 static void fdctrl_format_sector (fdctrl_t *fdctrl)
1380 {
1381 fdrive_t *cur_drv;
1382 uint8_t kh, kt, ks;
1383 int did_seek;
1384
1385 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1386 cur_drv = get_cur_drv(fdctrl);
1387 kt = fdctrl->fifo[6];
1388 kh = fdctrl->fifo[7];
1389 ks = fdctrl->fifo[8];
1390 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1391 fdctrl->cur_drv, kh, kt, ks,
1392 _fd_sector(kh, kt, ks, cur_drv->last_sect));
1393 did_seek = 0;
1394 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1395 case 2:
1396 /* sect too big */
1397 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1398 fdctrl->fifo[3] = kt;
1399 fdctrl->fifo[4] = kh;
1400 fdctrl->fifo[5] = ks;
1401 return;
1402 case 3:
1403 /* track too big */
1404 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x80, 0x00);
1405 fdctrl->fifo[3] = kt;
1406 fdctrl->fifo[4] = kh;
1407 fdctrl->fifo[5] = ks;
1408 return;
1409 case 4:
1410 /* No seek enabled */
1411 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1412 fdctrl->fifo[3] = kt;
1413 fdctrl->fifo[4] = kh;
1414 fdctrl->fifo[5] = ks;
1415 return;
1416 case 1:
1417 did_seek = 1;
1418 fdctrl->data_state |= FD_STATE_SEEK;
1419 break;
1420 default:
1421 break;
1422 }
1423 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1424 if (cur_drv->bs == NULL ||
1425 bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1426 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1427 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1428 } else {
1429 if (cur_drv->sect == cur_drv->last_sect) {
1430 fdctrl->data_state &= ~FD_STATE_FORMAT;
1431 /* Last sector done */
1432 if (FD_DID_SEEK(fdctrl->data_state))
1433 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1434 else
1435 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1436 } else {
1437 /* More to do */
1438 fdctrl->data_pos = 0;
1439 fdctrl->data_len = 4;
1440 }
1441 }
1442 }
1443
1444 static void fdctrl_handle_lock (fdctrl_t *fdctrl, int direction)
1445 {
1446 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1447 fdctrl->fifo[0] = fdctrl->lock << 4;
1448 fdctrl_set_fifo(fdctrl, 1, fdctrl->lock);
1449 }
1450
1451 static void fdctrl_handle_dumpreg (fdctrl_t *fdctrl, int direction)
1452 {
1453 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1454
1455 /* Drives position */
1456 fdctrl->fifo[0] = drv0(fdctrl)->track;
1457 fdctrl->fifo[1] = drv1(fdctrl)->track;
1458 fdctrl->fifo[2] = 0;
1459 fdctrl->fifo[3] = 0;
1460 /* timers */
1461 fdctrl->fifo[4] = fdctrl->timer0;
1462 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | fdctrl->dma_en;
1463 fdctrl->fifo[6] = cur_drv->last_sect;
1464 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1465 (cur_drv->perpendicular << 2);
1466 fdctrl->fifo[8] = fdctrl->config;
1467 fdctrl->fifo[9] = fdctrl->precomp_trk;
1468 fdctrl_set_fifo(fdctrl, 10, 0);
1469 }
1470
1471 static void fdctrl_handle_version (fdctrl_t *fdctrl, int direction)
1472 {
1473 /* Controller's version */
1474 fdctrl->fifo[0] = fdctrl->version;
1475 fdctrl_set_fifo(fdctrl, 1, 1);
1476 }
1477
1478 static void fdctrl_handle_partid (fdctrl_t *fdctrl, int direction)
1479 {
1480 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1481 fdctrl_set_fifo(fdctrl, 1, 0);
1482 }
1483
1484 static void fdctrl_handle_restore (fdctrl_t *fdctrl, int direction)
1485 {
1486 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1487
1488 /* Drives position */
1489 drv0(fdctrl)->track = fdctrl->fifo[3];
1490 drv1(fdctrl)->track = fdctrl->fifo[4];
1491 /* timers */
1492 fdctrl->timer0 = fdctrl->fifo[7];
1493 fdctrl->timer1 = fdctrl->fifo[8];
1494 cur_drv->last_sect = fdctrl->fifo[9];
1495 fdctrl->lock = fdctrl->fifo[10] >> 7;
1496 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1497 fdctrl->config = fdctrl->fifo[11];
1498 fdctrl->precomp_trk = fdctrl->fifo[12];
1499 fdctrl->pwrd = fdctrl->fifo[13];
1500 fdctrl_reset_fifo(fdctrl);
1501 }
1502
1503 static void fdctrl_handle_save (fdctrl_t *fdctrl, int direction)
1504 {
1505 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1506
1507 fdctrl->fifo[0] = 0;
1508 fdctrl->fifo[1] = 0;
1509 /* Drives position */
1510 fdctrl->fifo[2] = drv0(fdctrl)->track;
1511 fdctrl->fifo[3] = drv1(fdctrl)->track;
1512 fdctrl->fifo[4] = 0;
1513 fdctrl->fifo[5] = 0;
1514 /* timers */
1515 fdctrl->fifo[6] = fdctrl->timer0;
1516 fdctrl->fifo[7] = fdctrl->timer1;
1517 fdctrl->fifo[8] = cur_drv->last_sect;
1518 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1519 (cur_drv->perpendicular << 2);
1520 fdctrl->fifo[10] = fdctrl->config;
1521 fdctrl->fifo[11] = fdctrl->precomp_trk;
1522 fdctrl->fifo[12] = fdctrl->pwrd;
1523 fdctrl->fifo[13] = 0;
1524 fdctrl->fifo[14] = 0;
1525 fdctrl_set_fifo(fdctrl, 15, 1);
1526 }
1527
1528 static void fdctrl_handle_readid (fdctrl_t *fdctrl, int direction)
1529 {
1530 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1531
1532 /* XXX: should set main status register to busy */
1533 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1534 qemu_mod_timer(fdctrl->result_timer,
1535 qemu_get_clock(vm_clock) + (ticks_per_sec / 50));
1536 }
1537
1538 static void fdctrl_handle_format_track (fdctrl_t *fdctrl, int direction)
1539 {
1540 fdrive_t *cur_drv;
1541
1542 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1543 cur_drv = get_cur_drv(fdctrl);
1544 fdctrl->data_state |= FD_STATE_FORMAT;
1545 if (fdctrl->fifo[0] & 0x80)
1546 fdctrl->data_state |= FD_STATE_MULTI;
1547 else
1548 fdctrl->data_state &= ~FD_STATE_MULTI;
1549 fdctrl->data_state &= ~FD_STATE_SEEK;
1550 cur_drv->bps =
1551 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1552 #if 0
1553 cur_drv->last_sect =
1554 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1555 fdctrl->fifo[3] / 2;
1556 #else
1557 cur_drv->last_sect = fdctrl->fifo[3];
1558 #endif
1559 /* TODO: implement format using DMA expected by the Bochs BIOS
1560 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1561 * the sector with the specified fill byte
1562 */
1563 fdctrl->data_state &= ~FD_STATE_FORMAT;
1564 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1565 }
1566
1567 static void fdctrl_handle_specify (fdctrl_t *fdctrl, int direction)
1568 {
1569 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1570 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1571 fdctrl->dma_en = 1 - (fdctrl->fifo[2] & 1) ;
1572 /* No result back */
1573 fdctrl_reset_fifo(fdctrl);
1574 }
1575
1576 static void fdctrl_handle_sense_drive_status (fdctrl_t *fdctrl, int direction)
1577 {
1578 fdrive_t *cur_drv;
1579
1580 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1581 cur_drv = get_cur_drv(fdctrl);
1582 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1583 /* 1 Byte status back */
1584 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1585 (cur_drv->track == 0 ? 0x10 : 0x00) |
1586 (cur_drv->head << 2) |
1587 fdctrl->cur_drv |
1588 0x28;
1589 fdctrl_set_fifo(fdctrl, 1, 0);
1590 }
1591
1592 static void fdctrl_handle_recalibrate (fdctrl_t *fdctrl, int direction)
1593 {
1594 fdrive_t *cur_drv;
1595
1596 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1597 cur_drv = get_cur_drv(fdctrl);
1598 fd_recalibrate(cur_drv);
1599 fdctrl_reset_fifo(fdctrl);
1600 /* Raise Interrupt */
1601 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1602 }
1603
1604 static void fdctrl_handle_sense_interrupt_status (fdctrl_t *fdctrl, int direction)
1605 {
1606 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1607
1608 #if 0
1609 fdctrl->fifo[0] =
1610 fdctrl->int_status | (cur_drv->head << 2) | fdctrl->cur_drv;
1611 #else
1612 /* XXX: int_status handling is broken for read/write
1613 commands, so we do this hack. It should be suppressed
1614 ASAP */
1615 fdctrl->fifo[0] =
1616 0x20 | (cur_drv->head << 2) | fdctrl->cur_drv;
1617 #endif
1618 fdctrl->fifo[1] = cur_drv->track;
1619 fdctrl_set_fifo(fdctrl, 2, 0);
1620 fdctrl_reset_irq(fdctrl);
1621 fdctrl->int_status = FD_SR0_RDYCHG;
1622 }
1623
1624 static void fdctrl_handle_seek (fdctrl_t *fdctrl, int direction)
1625 {
1626 fdrive_t *cur_drv;
1627
1628 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1629 cur_drv = get_cur_drv(fdctrl);
1630 fd_start(cur_drv);
1631 if (fdctrl->fifo[2] <= cur_drv->track)
1632 cur_drv->dir = 1;
1633 else
1634 cur_drv->dir = 0;
1635 fdctrl_reset_fifo(fdctrl);
1636 if (fdctrl->fifo[2] > cur_drv->max_track) {
1637 fdctrl_raise_irq(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK);
1638 } else {
1639 cur_drv->track = fdctrl->fifo[2];
1640 /* Raise Interrupt */
1641 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1642 }
1643 }
1644
1645 static void fdctrl_handle_perpendicular_mode (fdctrl_t *fdctrl, int direction)
1646 {
1647 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1648
1649 if (fdctrl->fifo[1] & 0x80)
1650 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
1651 /* No result back */
1652 fdctrl_reset_fifo(fdctrl);
1653 }
1654
1655 static void fdctrl_handle_configure (fdctrl_t *fdctrl, int direction)
1656 {
1657 fdctrl->config = fdctrl->fifo[2];
1658 fdctrl->precomp_trk = fdctrl->fifo[3];
1659 /* No result back */
1660 fdctrl_reset_fifo(fdctrl);
1661 }
1662
1663 static void fdctrl_handle_powerdown_mode (fdctrl_t *fdctrl, int direction)
1664 {
1665 fdctrl->pwrd = fdctrl->fifo[1];
1666 fdctrl->fifo[0] = fdctrl->fifo[1];
1667 fdctrl_set_fifo(fdctrl, 1, 1);
1668 }
1669
1670 static void fdctrl_handle_option (fdctrl_t *fdctrl, int direction)
1671 {
1672 /* No result back */
1673 fdctrl_reset_fifo(fdctrl);
1674 }
1675
1676 static void fdctrl_handle_drive_specification_command (fdctrl_t *fdctrl, int direction)
1677 {
1678 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1679
1680 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
1681 /* Command parameters done */
1682 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1683 fdctrl->fifo[0] = fdctrl->fifo[1];
1684 fdctrl->fifo[2] = 0;
1685 fdctrl->fifo[3] = 0;
1686 fdctrl_set_fifo(fdctrl, 4, 1);
1687 } else {
1688 fdctrl_reset_fifo(fdctrl);
1689 }
1690 } else if (fdctrl->data_len > 7) {
1691 /* ERROR */
1692 fdctrl->fifo[0] = 0x80 |
1693 (cur_drv->head << 2) | fdctrl->cur_drv;
1694 fdctrl_set_fifo(fdctrl, 1, 1);
1695 }
1696 }
1697
1698 static void fdctrl_handle_relative_seek_out (fdctrl_t *fdctrl, int direction)
1699 {
1700 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1701
1702 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1703 cur_drv = get_cur_drv(fdctrl);
1704 fd_start(cur_drv);
1705 cur_drv->dir = 0;
1706 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1707 cur_drv->track = cur_drv->max_track - 1;
1708 } else {
1709 cur_drv->track += fdctrl->fifo[2];
1710 }
1711 fdctrl_reset_fifo(fdctrl);
1712 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1713 }
1714
1715 static void fdctrl_handle_relative_seek_in (fdctrl_t *fdctrl, int direction)
1716 {
1717 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1718
1719 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1720 cur_drv = get_cur_drv(fdctrl);
1721 fd_start(cur_drv);
1722 cur_drv->dir = 1;
1723 if (fdctrl->fifo[2] > cur_drv->track) {
1724 cur_drv->track = 0;
1725 } else {
1726 cur_drv->track -= fdctrl->fifo[2];
1727 }
1728 fdctrl_reset_fifo(fdctrl);
1729 /* Raise Interrupt */
1730 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1731 }
1732
1733 static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1734 {
1735 fdrive_t *cur_drv;
1736 int pos;
1737 static const struct {
1738 uint8_t value;
1739 uint8_t mask;
1740 const char* name;
1741 int parameters;
1742 void (*handler)(fdctrl_t *fdctrl, int direction);
1743 int parameter;
1744 } commands[] = {
1745 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
1746 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
1747 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
1748 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
1749 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
1750 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
1751 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
1752 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
1753 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
1754 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
1755 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
1756 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
1757 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
1758 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
1759 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
1760 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
1761 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
1762 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
1763 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
1764 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
1765 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
1766 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
1767 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
1768 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
1769 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
1770 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
1771 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
1772 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
1773 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
1774 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
1775 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
1776 };
1777
1778 cur_drv = get_cur_drv(fdctrl);
1779 /* Reset mode */
1780 if (fdctrl->state & FD_CTRL_RESET) {
1781 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1782 return;
1783 }
1784 fdctrl->state &= ~FD_CTRL_SLEEP;
1785 if (FD_STATE(fdctrl->data_state) == FD_STATE_STATUS) {
1786 FLOPPY_ERROR("can't write data in status mode\n");
1787 return;
1788 }
1789 /* Is it write command time ? */
1790 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1791 /* FIFO data write */
1792 fdctrl->fifo[fdctrl->data_pos++] = value;
1793 if (fdctrl->data_pos % FD_SECTOR_LEN == (FD_SECTOR_LEN - 1) ||
1794 fdctrl->data_pos == fdctrl->data_len) {
1795 bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1);
1796 }
1797 /* Switch from transfer mode to status mode
1798 * then from status mode to command mode
1799 */
1800 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA)
1801 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1802 return;
1803 }
1804 if (fdctrl->data_pos == 0) {
1805 /* Command */
1806 for (pos = 0; pos < sizeof(commands)/sizeof(commands[0]); pos++) {
1807 if ((value & commands[pos].mask) == commands[pos].value) {
1808 FLOPPY_DPRINTF("%s command\n", commands[pos].name);
1809 fdctrl->data_len = commands[pos].parameters + 1;
1810 goto enqueue;
1811 }
1812 }
1813
1814 /* Unknown command */
1815 FLOPPY_ERROR("unknown command: 0x%02x\n", value);
1816 fdctrl_unimplemented(fdctrl, 0);
1817 return;
1818 }
1819 enqueue:
1820 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1821 fdctrl->fifo[fdctrl->data_pos] = value;
1822 if (++fdctrl->data_pos == fdctrl->data_len) {
1823 /* We now have all parameters
1824 * and will be able to treat the command
1825 */
1826 if (fdctrl->data_state & FD_STATE_FORMAT) {
1827 fdctrl_format_sector(fdctrl);
1828 return;
1829 }
1830
1831 for (pos = 0; pos < sizeof(commands)/sizeof(commands[0]); pos++) {
1832 if ((fdctrl->fifo[0] & commands[pos].mask) == commands[pos].value) {
1833 FLOPPY_DPRINTF("treat %s command\n", commands[pos].name);
1834 (*commands[pos].handler)(fdctrl, commands[pos].parameter);
1835 break;
1836 }
1837 }
1838 }
1839 }
1840
1841 static void fdctrl_result_timer(void *opaque)
1842 {
1843 fdctrl_t *fdctrl = opaque;
1844 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1845
1846 /* Pretend we are spinning.
1847 * This is needed for Coherent, which uses READ ID to check for
1848 * sector interleaving.
1849 */
1850 if (cur_drv->last_sect != 0) {
1851 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
1852 }
1853 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1854 }
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