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1 /*
2 * QEMU G364 framebuffer Emulator.
3 *
4 * Copyright (c) 2007-2011 Herve Poussineau
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "hw.h"
21 #include "console.h"
22 #include "pixel_ops.h"
23 #include "trace.h"
24 #include "sysbus.h"
25
26 typedef struct G364State {
27 /* hardware */
28 uint8_t *vram;
29 uint32_t vram_size;
30 qemu_irq irq;
31 MemoryRegion mem_vram;
32 MemoryRegion mem_ctrl;
33 /* registers */
34 uint8_t color_palette[256][3];
35 uint8_t cursor_palette[3][3];
36 uint16_t cursor[512];
37 uint32_t cursor_position;
38 uint32_t ctla;
39 uint32_t top_of_screen;
40 uint32_t width, height; /* in pixels */
41 /* display refresh support */
42 DisplayState *ds;
43 int depth;
44 int blanked;
45 } G364State;
46
47 #define REG_BOOT 0x000000
48 #define REG_DISPLAY 0x000118
49 #define REG_VDISPLAY 0x000150
50 #define REG_CTLA 0x000300
51 #define REG_TOP 0x000400
52 #define REG_CURS_PAL 0x000508
53 #define REG_CURS_POS 0x000638
54 #define REG_CLR_PAL 0x000800
55 #define REG_CURS_PAT 0x001000
56 #define REG_RESET 0x100000
57
58 #define CTLA_FORCE_BLANK 0x00000400
59 #define CTLA_NO_CURSOR 0x00800000
60
61 #define G364_PAGE_SIZE 4096
62
63 static inline int check_dirty(G364State *s, ram_addr_t page)
64 {
65 return memory_region_get_dirty(&s->mem_vram, page, G364_PAGE_SIZE,
66 DIRTY_MEMORY_VGA);
67 }
68
69 static inline void reset_dirty(G364State *s,
70 ram_addr_t page_min, ram_addr_t page_max)
71 {
72 memory_region_reset_dirty(&s->mem_vram,
73 page_min,
74 page_max + G364_PAGE_SIZE - page_min - 1,
75 DIRTY_MEMORY_VGA);
76 }
77
78 static void g364fb_draw_graphic8(G364State *s)
79 {
80 int i, w;
81 uint8_t *vram;
82 uint8_t *data_display, *dd;
83 ram_addr_t page, page_min, page_max;
84 int x, y;
85 int xmin, xmax;
86 int ymin, ymax;
87 int xcursor, ycursor;
88 unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b);
89
90 switch (ds_get_bits_per_pixel(s->ds)) {
91 case 8:
92 rgb_to_pixel = rgb_to_pixel8;
93 w = 1;
94 break;
95 case 15:
96 rgb_to_pixel = rgb_to_pixel15;
97 w = 2;
98 break;
99 case 16:
100 rgb_to_pixel = rgb_to_pixel16;
101 w = 2;
102 break;
103 case 32:
104 rgb_to_pixel = rgb_to_pixel32;
105 w = 4;
106 break;
107 default:
108 hw_error("g364: unknown host depth %d",
109 ds_get_bits_per_pixel(s->ds));
110 return;
111 }
112
113 page = 0;
114 page_min = (ram_addr_t)-1;
115 page_max = 0;
116
117 x = y = 0;
118 xmin = s->width;
119 xmax = 0;
120 ymin = s->height;
121 ymax = 0;
122
123 if (!(s->ctla & CTLA_NO_CURSOR)) {
124 xcursor = s->cursor_position >> 12;
125 ycursor = s->cursor_position & 0xfff;
126 } else {
127 xcursor = ycursor = -65;
128 }
129
130 vram = s->vram + s->top_of_screen;
131 /* XXX: out of range in vram? */
132 data_display = dd = ds_get_data(s->ds);
133 while (y < s->height) {
134 if (check_dirty(s, page)) {
135 if (y < ymin)
136 ymin = ymax = y;
137 if (page_min == (ram_addr_t)-1)
138 page_min = page;
139 page_max = page;
140 if (x < xmin)
141 xmin = x;
142 for (i = 0; i < G364_PAGE_SIZE; i++) {
143 uint8_t index;
144 unsigned int color;
145 if (unlikely((y >= ycursor && y < ycursor + 64) &&
146 (x >= xcursor && x < xcursor + 64))) {
147 /* pointer area */
148 int xdiff = x - xcursor;
149 uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8];
150 int op = (curs >> ((xdiff & 7) * 2)) & 3;
151 if (likely(op == 0)) {
152 /* transparent */
153 index = *vram;
154 color = (*rgb_to_pixel)(
155 s->color_palette[index][0],
156 s->color_palette[index][1],
157 s->color_palette[index][2]);
158 } else {
159 /* get cursor color */
160 index = op - 1;
161 color = (*rgb_to_pixel)(
162 s->cursor_palette[index][0],
163 s->cursor_palette[index][1],
164 s->cursor_palette[index][2]);
165 }
166 } else {
167 /* normal area */
168 index = *vram;
169 color = (*rgb_to_pixel)(
170 s->color_palette[index][0],
171 s->color_palette[index][1],
172 s->color_palette[index][2]);
173 }
174 memcpy(dd, &color, w);
175 dd += w;
176 x++;
177 vram++;
178 if (x == s->width) {
179 xmax = s->width - 1;
180 y++;
181 if (y == s->height) {
182 ymax = s->height - 1;
183 goto done;
184 }
185 data_display = dd = data_display + ds_get_linesize(s->ds);
186 xmin = 0;
187 x = 0;
188 }
189 }
190 if (x > xmax)
191 xmax = x;
192 if (y > ymax)
193 ymax = y;
194 } else {
195 int dy;
196 if (page_min != (ram_addr_t)-1) {
197 reset_dirty(s, page_min, page_max);
198 page_min = (ram_addr_t)-1;
199 page_max = 0;
200 dpy_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
201 xmin = s->width;
202 xmax = 0;
203 ymin = s->height;
204 ymax = 0;
205 }
206 x += G364_PAGE_SIZE;
207 dy = x / s->width;
208 x = x % s->width;
209 y += dy;
210 vram += G364_PAGE_SIZE;
211 data_display += dy * ds_get_linesize(s->ds);
212 dd = data_display + x * w;
213 }
214 page += G364_PAGE_SIZE;
215 }
216
217 done:
218 if (page_min != (ram_addr_t)-1) {
219 dpy_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
220 reset_dirty(s, page_min, page_max);
221 }
222 }
223
224 static void g364fb_draw_blank(G364State *s)
225 {
226 int i, w;
227 uint8_t *d;
228
229 if (s->blanked) {
230 /* Screen is already blank. No need to redraw it */
231 return;
232 }
233
234 w = s->width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
235 d = ds_get_data(s->ds);
236 for (i = 0; i < s->height; i++) {
237 memset(d, 0, w);
238 d += ds_get_linesize(s->ds);
239 }
240
241 dpy_update(s->ds, 0, 0, s->width, s->height);
242 s->blanked = 1;
243 }
244
245 static void g364fb_update_display(void *opaque)
246 {
247 G364State *s = opaque;
248
249 qemu_flush_coalesced_mmio_buffer();
250
251 if (s->width == 0 || s->height == 0)
252 return;
253
254 if (s->width != ds_get_width(s->ds) || s->height != ds_get_height(s->ds)) {
255 qemu_console_resize(s->ds, s->width, s->height);
256 }
257
258 if (s->ctla & CTLA_FORCE_BLANK) {
259 g364fb_draw_blank(s);
260 } else if (s->depth == 8) {
261 g364fb_draw_graphic8(s);
262 } else {
263 error_report("g364: unknown guest depth %d", s->depth);
264 }
265
266 qemu_irq_raise(s->irq);
267 }
268
269 static inline void g364fb_invalidate_display(void *opaque)
270 {
271 G364State *s = opaque;
272
273 s->blanked = 0;
274 memory_region_set_dirty(&s->mem_vram, 0, s->vram_size);
275 }
276
277 static void g364fb_reset(G364State *s)
278 {
279 qemu_irq_lower(s->irq);
280
281 memset(s->color_palette, 0, sizeof(s->color_palette));
282 memset(s->cursor_palette, 0, sizeof(s->cursor_palette));
283 memset(s->cursor, 0, sizeof(s->cursor));
284 s->cursor_position = 0;
285 s->ctla = 0;
286 s->top_of_screen = 0;
287 s->width = s->height = 0;
288 memset(s->vram, 0, s->vram_size);
289 g364fb_invalidate_display(s);
290 }
291
292 static void g364fb_screen_dump(void *opaque, const char *filename, bool cswitch,
293 Error **errp)
294 {
295 G364State *s = opaque;
296 int ret, y, x;
297 uint8_t index;
298 uint8_t *data_buffer;
299 FILE *f;
300
301 qemu_flush_coalesced_mmio_buffer();
302
303 if (s->depth != 8) {
304 error_setg(errp, "g364: unknown guest depth %d", s->depth);
305 return;
306 }
307
308 f = fopen(filename, "wb");
309 if (!f) {
310 error_setg(errp, "failed to open file '%s': %s", filename,
311 strerror(errno));
312 return;
313 }
314
315 if (s->ctla & CTLA_FORCE_BLANK) {
316 /* blank screen */
317 ret = fprintf(f, "P4\n%d %d\n", s->width, s->height);
318 if (ret < 0) {
319 goto write_err;
320 }
321 for (y = 0; y < s->height; y++)
322 for (x = 0; x < s->width; x++) {
323 ret = fputc(0, f);
324 if (ret == EOF) {
325 goto write_err;
326 }
327 }
328 } else {
329 data_buffer = s->vram + s->top_of_screen;
330 ret = fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255);
331 if (ret < 0) {
332 goto write_err;
333 }
334 for (y = 0; y < s->height; y++)
335 for (x = 0; x < s->width; x++, data_buffer++) {
336 index = *data_buffer;
337 ret = fputc(s->color_palette[index][0], f);
338 if (ret == EOF) {
339 goto write_err;
340 }
341 ret = fputc(s->color_palette[index][1], f);
342 if (ret == EOF) {
343 goto write_err;
344 }
345 ret = fputc(s->color_palette[index][2], f);
346 if (ret == EOF) {
347 goto write_err;
348 }
349 }
350 }
351
352 out:
353 fclose(f);
354 return;
355
356 write_err:
357 error_setg(errp, "failed to write to file '%s': %s", filename,
358 strerror(errno));
359 unlink(filename);
360 goto out;
361 }
362
363 /* called for accesses to io ports */
364 static uint64_t g364fb_ctrl_read(void *opaque,
365 hwaddr addr,
366 unsigned int size)
367 {
368 G364State *s = opaque;
369 uint32_t val;
370
371 if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
372 /* cursor pattern */
373 int idx = (addr - REG_CURS_PAT) >> 3;
374 val = s->cursor[idx];
375 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
376 /* cursor palette */
377 int idx = (addr - REG_CURS_PAL) >> 3;
378 val = ((uint32_t)s->cursor_palette[idx][0] << 16);
379 val |= ((uint32_t)s->cursor_palette[idx][1] << 8);
380 val |= ((uint32_t)s->cursor_palette[idx][2] << 0);
381 } else {
382 switch (addr) {
383 case REG_DISPLAY:
384 val = s->width / 4;
385 break;
386 case REG_VDISPLAY:
387 val = s->height * 2;
388 break;
389 case REG_CTLA:
390 val = s->ctla;
391 break;
392 default:
393 {
394 error_report("g364: invalid read at [" TARGET_FMT_plx "]",
395 addr);
396 val = 0;
397 break;
398 }
399 }
400 }
401
402 trace_g364fb_read(addr, val);
403
404 return val;
405 }
406
407 static void g364fb_update_depth(G364State *s)
408 {
409 static const int depths[8] = { 1, 2, 4, 8, 15, 16, 0 };
410 s->depth = depths[(s->ctla & 0x00700000) >> 20];
411 }
412
413 static void g364_invalidate_cursor_position(G364State *s)
414 {
415 int ymin, ymax, start, end;
416
417 /* invalidate only near the cursor */
418 ymin = s->cursor_position & 0xfff;
419 ymax = MIN(s->height, ymin + 64);
420 start = ymin * ds_get_linesize(s->ds);
421 end = (ymax + 1) * ds_get_linesize(s->ds);
422
423 memory_region_set_dirty(&s->mem_vram, start, end - start);
424 }
425
426 static void g364fb_ctrl_write(void *opaque,
427 hwaddr addr,
428 uint64_t val,
429 unsigned int size)
430 {
431 G364State *s = opaque;
432
433 trace_g364fb_write(addr, val);
434
435 if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) {
436 /* color palette */
437 int idx = (addr - REG_CLR_PAL) >> 3;
438 s->color_palette[idx][0] = (val >> 16) & 0xff;
439 s->color_palette[idx][1] = (val >> 8) & 0xff;
440 s->color_palette[idx][2] = val & 0xff;
441 g364fb_invalidate_display(s);
442 } else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
443 /* cursor pattern */
444 int idx = (addr - REG_CURS_PAT) >> 3;
445 s->cursor[idx] = val;
446 g364fb_invalidate_display(s);
447 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
448 /* cursor palette */
449 int idx = (addr - REG_CURS_PAL) >> 3;
450 s->cursor_palette[idx][0] = (val >> 16) & 0xff;
451 s->cursor_palette[idx][1] = (val >> 8) & 0xff;
452 s->cursor_palette[idx][2] = val & 0xff;
453 g364fb_invalidate_display(s);
454 } else {
455 switch (addr) {
456 case REG_BOOT: /* Boot timing */
457 case 0x00108: /* Line timing: half sync */
458 case 0x00110: /* Line timing: back porch */
459 case 0x00120: /* Line timing: short display */
460 case 0x00128: /* Frame timing: broad pulse */
461 case 0x00130: /* Frame timing: v sync */
462 case 0x00138: /* Frame timing: v preequalise */
463 case 0x00140: /* Frame timing: v postequalise */
464 case 0x00148: /* Frame timing: v blank */
465 case 0x00158: /* Line timing: line time */
466 case 0x00160: /* Frame store: line start */
467 case 0x00168: /* vram cycle: mem init */
468 case 0x00170: /* vram cycle: transfer delay */
469 case 0x00200: /* vram cycle: mask register */
470 /* ignore */
471 break;
472 case REG_TOP:
473 s->top_of_screen = val;
474 g364fb_invalidate_display(s);
475 break;
476 case REG_DISPLAY:
477 s->width = val * 4;
478 break;
479 case REG_VDISPLAY:
480 s->height = val / 2;
481 break;
482 case REG_CTLA:
483 s->ctla = val;
484 g364fb_update_depth(s);
485 g364fb_invalidate_display(s);
486 break;
487 case REG_CURS_POS:
488 g364_invalidate_cursor_position(s);
489 s->cursor_position = val;
490 g364_invalidate_cursor_position(s);
491 break;
492 case REG_RESET:
493 g364fb_reset(s);
494 break;
495 default:
496 error_report("g364: invalid write of 0x%" PRIx64
497 " at [" TARGET_FMT_plx "]", val, addr);
498 break;
499 }
500 }
501 qemu_irq_lower(s->irq);
502 }
503
504 static const MemoryRegionOps g364fb_ctrl_ops = {
505 .read = g364fb_ctrl_read,
506 .write = g364fb_ctrl_write,
507 .endianness = DEVICE_LITTLE_ENDIAN,
508 .impl.min_access_size = 4,
509 .impl.max_access_size = 4,
510 };
511
512 static int g364fb_post_load(void *opaque, int version_id)
513 {
514 G364State *s = opaque;
515
516 /* force refresh */
517 g364fb_update_depth(s);
518 g364fb_invalidate_display(s);
519
520 return 0;
521 }
522
523 static const VMStateDescription vmstate_g364fb = {
524 .name = "g364fb",
525 .version_id = 1,
526 .minimum_version_id = 1,
527 .minimum_version_id_old = 1,
528 .post_load = g364fb_post_load,
529 .fields = (VMStateField[]) {
530 VMSTATE_VBUFFER_UINT32(vram, G364State, 1, NULL, 0, vram_size),
531 VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3),
532 VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9),
533 VMSTATE_UINT16_ARRAY(cursor, G364State, 512),
534 VMSTATE_UINT32(cursor_position, G364State),
535 VMSTATE_UINT32(ctla, G364State),
536 VMSTATE_UINT32(top_of_screen, G364State),
537 VMSTATE_UINT32(width, G364State),
538 VMSTATE_UINT32(height, G364State),
539 VMSTATE_END_OF_LIST()
540 }
541 };
542
543 static void g364fb_init(DeviceState *dev, G364State *s)
544 {
545 s->vram = g_malloc0(s->vram_size);
546
547 s->ds = graphic_console_init(g364fb_update_display,
548 g364fb_invalidate_display,
549 g364fb_screen_dump, NULL, s);
550
551 memory_region_init_io(&s->mem_ctrl, &g364fb_ctrl_ops, s, "ctrl", 0x180000);
552 memory_region_init_ram_ptr(&s->mem_vram, "vram",
553 s->vram_size, s->vram);
554 vmstate_register_ram(&s->mem_vram, dev);
555 memory_region_set_coalescing(&s->mem_vram);
556 }
557
558 typedef struct {
559 SysBusDevice busdev;
560 G364State g364;
561 } G364SysBusState;
562
563 static int g364fb_sysbus_init(SysBusDevice *dev)
564 {
565 G364State *s = &FROM_SYSBUS(G364SysBusState, dev)->g364;
566
567 g364fb_init(&dev->qdev, s);
568 sysbus_init_irq(dev, &s->irq);
569 sysbus_init_mmio(dev, &s->mem_ctrl);
570 sysbus_init_mmio(dev, &s->mem_vram);
571
572 return 0;
573 }
574
575 static void g364fb_sysbus_reset(DeviceState *d)
576 {
577 G364SysBusState *s = DO_UPCAST(G364SysBusState, busdev.qdev, d);
578 g364fb_reset(&s->g364);
579 }
580
581 static Property g364fb_sysbus_properties[] = {
582 DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size,
583 8 * 1024 * 1024),
584 DEFINE_PROP_END_OF_LIST(),
585 };
586
587 static void g364fb_sysbus_class_init(ObjectClass *klass, void *data)
588 {
589 DeviceClass *dc = DEVICE_CLASS(klass);
590 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
591
592 k->init = g364fb_sysbus_init;
593 dc->desc = "G364 framebuffer";
594 dc->reset = g364fb_sysbus_reset;
595 dc->vmsd = &vmstate_g364fb;
596 dc->props = g364fb_sysbus_properties;
597 }
598
599 static TypeInfo g364fb_sysbus_info = {
600 .name = "sysbus-g364",
601 .parent = TYPE_SYS_BUS_DEVICE,
602 .instance_size = sizeof(G364SysBusState),
603 .class_init = g364fb_sysbus_class_init,
604 };
605
606 static void g364fb_register_types(void)
607 {
608 type_register_static(&g364fb_sysbus_info);
609 }
610
611 type_init(g364fb_register_types)