hw/gpio/puv3_gpio.c

   1 /*
   2  * GPIO device simulation in PKUnity SoC
   3  *
   4  * Copyright (C) 2010-2012 Guan Xuetao
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation, or any later version.
   9  * See the COPYING file in the top-level directory.
  10  */
  11 #include "qemu/osdep.h"
  12 #include "hw/hw.h"
  13 #include "hw/sysbus.h"
  14
  15 #undef DEBUG_PUV3
  16 #include "hw/unicore32/puv3.h"
  17
  18 #define TYPE_PUV3_GPIO "puv3_gpio"
  19 #define PUV3_GPIO(obj) OBJECT_CHECK(PUV3GPIOState, (obj), TYPE_PUV3_GPIO)
  20
  21 typedef struct PUV3GPIOState {
  22     SysBusDevice parent_obj;
  23
  24     MemoryRegion iomem;
  25     qemu_irq irq[9];
  26
  27     uint32_t reg_GPLR;
  28     uint32_t reg_GPDR;
  29     uint32_t reg_GPIR;
  30 } PUV3GPIOState;
  31
  32 static uint64_t puv3_gpio_read(void *opaque, hwaddr offset,
  33         unsigned size)
  34 {
  35     PUV3GPIOState *s = opaque;
  36     uint32_t ret = 0;
  37
  38     switch (offset) {
  39     case 0x00:
  40         ret = s->reg_GPLR;
  41         break;
  42     case 0x04:
  43         ret = s->reg_GPDR;
  44         break;
  45     case 0x20:
  46         ret = s->reg_GPIR;
  47         break;
  48     default:
  49         DPRINTF("Bad offset 0x%x\n", offset);
  50     }
  51     DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
  52
  53     return ret;
  54 }
  55
  56 static void puv3_gpio_write(void *opaque, hwaddr offset,
  57         uint64_t value, unsigned size)
  58 {
  59     PUV3GPIOState *s = opaque;
  60
  61     DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
  62     switch (offset) {
  63     case 0x04:
  64         s->reg_GPDR = value;
  65         break;
  66     case 0x08:
  67         if (s->reg_GPDR & value) {
  68             s->reg_GPLR |= value;
  69         } else {
  70             DPRINTF("Write gpio input port error!");
  71         }
  72         break;
  73     case 0x0c:
  74         if (s->reg_GPDR & value) {
  75             s->reg_GPLR &= ~value;
  76         } else {
  77             DPRINTF("Write gpio input port error!");
  78         }
  79         break;
  80     case 0x10: /* GRER */
  81     case 0x14: /* GFER */
  82     case 0x18: /* GEDR */
  83         break;
  84     case 0x20: /* GPIR */
  85         s->reg_GPIR = value;
  86         break;
  87     default:
  88         DPRINTF("Bad offset 0x%x\n", offset);
  89     }
  90 }
  91
  92 static const MemoryRegionOps puv3_gpio_ops = {
  93     .read = puv3_gpio_read,
  94     .write = puv3_gpio_write,
  95     .impl = {
  96         .min_access_size = 4,
  97         .max_access_size = 4,
  98     },
  99     .endianness = DEVICE_NATIVE_ENDIAN,
 100 };
 101
 102 static void puv3_gpio_realize(DeviceState *dev, Error **errp)
 103 {
 104     PUV3GPIOState *s = PUV3_GPIO(dev);
 105     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 106
 107     s->reg_GPLR = 0;
 108     s->reg_GPDR = 0;
 109
 110     /* FIXME: these irqs not handled yet */
 111     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW0]);
 112     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW1]);
 113     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW2]);
 114     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW3]);
 115     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW4]);
 116     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW5]);
 117     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW6]);
 118     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOLOW7]);
 119     sysbus_init_irq(sbd, &s->irq[PUV3_IRQS_GPIOHIGH]);
 120
 121     memory_region_init_io(&s->iomem, OBJECT(s), &puv3_gpio_ops, s, "puv3_gpio",
 122             PUV3_REGS_OFFSET);
 123     sysbus_init_mmio(sbd, &s->iomem);
 124 }
 125
 126 static void puv3_gpio_class_init(ObjectClass *klass, void *data)
 127 {
 128     DeviceClass *dc = DEVICE_CLASS(klass);
 129
 130     dc->realize = puv3_gpio_realize;
 131 }
 132
 133 static const TypeInfo puv3_gpio_info = {
 134     .name = TYPE_PUV3_GPIO,
 135     .parent = TYPE_SYS_BUS_DEVICE,
 136     .instance_size = sizeof(PUV3GPIOState),
 137     .class_init = puv3_gpio_class_init,
 138 };
 139
 140 static void puv3_gpio_register_type(void)
 141 {
 142     type_register_static(&puv3_gpio_info);
 143 }
 144
 145 type_init(puv3_gpio_register_type)