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2 * Heathrow PIC support (standard PowerMac PIC)
4 * Copyright (c) 2005 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 typedef struct HeathrowPIC
{
32 uint32_t level_triggered
;
39 static inline int check_irq(HeathrowPIC
*pic
)
41 return (pic
->events
| (pic
->levels
& pic
->level_triggered
)) & pic
->mask
;
44 /* update the CPU irq state */
45 static void heathrow_pic_update(HeathrowPICS
*s
)
47 if (check_irq(&s
->pics
[0]) || check_irq(&s
->pics
[1])) {
48 cpu_interrupt(cpu_single_env
, CPU_INTERRUPT_HARD
);
50 cpu_reset_interrupt(cpu_single_env
, CPU_INTERRUPT_HARD
);
54 static void pic_writel (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
56 HeathrowPICS
*s
= opaque
;
60 value
= bswap32(value
);
62 printf("pic_writel: %08x: %08x\n",
65 n
= ((addr
& 0xfff) - 0x10) >> 4;
72 heathrow_pic_update(s
);
75 /* do not reset level triggered IRQs */
76 value
&= ~pic
->level_triggered
;
77 pic
->events
&= ~value
;
78 heathrow_pic_update(s
);
85 static uint32_t pic_readl (void *opaque
, target_phys_addr_t addr
)
87 HeathrowPICS
*s
= opaque
;
92 n
= ((addr
& 0xfff) - 0x10) >> 4;
113 printf("pic_readl: %08x: %08x\n",
116 value
= bswap32(value
);
120 static CPUWriteMemoryFunc
*pic_write
[] = {
126 static CPUReadMemoryFunc
*pic_read
[] = {
133 void heathrow_pic_set_irq(void *opaque
, int num
, int level
)
135 HeathrowPICS
*s
= opaque
;
137 unsigned int irq_bit
;
141 static int last_level
[64];
142 if (last_level
[num
] != level
) {
143 printf("set_irq: num=0x%02x level=%d\n", num
, level
);
144 last_level
[num
] = level
;
148 pic
= &s
->pics
[1 - (num
>> 5)];
149 irq_bit
= 1 << (num
& 0x1f);
151 pic
->events
|= irq_bit
& ~pic
->level_triggered
;
152 pic
->levels
|= irq_bit
;
154 pic
->levels
&= ~irq_bit
;
156 heathrow_pic_update(s
);
159 HeathrowPICS
*heathrow_pic_init(int *pmem_index
)
163 s
= qemu_mallocz(sizeof(HeathrowPICS
));
164 s
->pics
[0].level_triggered
= 0;
165 s
->pics
[1].level_triggered
= 0x1ff00000;
166 *pmem_index
= cpu_register_io_memory(0, pic_read
, pic_write
, s
);