2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "hw/i386/x86.h"
28 #include "hw/i386/pc.h"
29 #include "hw/char/serial.h"
30 #include "hw/char/parallel.h"
31 #include "hw/i386/apic.h"
32 #include "hw/i386/topology.h"
33 #include "hw/i386/fw_cfg.h"
34 #include "sysemu/cpus.h"
35 #include "hw/block/fdc.h"
37 #include "hw/pci/pci.h"
38 #include "hw/pci/pci_bus.h"
39 #include "hw/nvram/fw_cfg.h"
40 #include "hw/timer/hpet.h"
41 #include "hw/firmware/smbios.h"
42 #include "hw/loader.h"
44 #include "migration/vmstate.h"
45 #include "multiboot.h"
46 #include "hw/rtc/mc146818rtc.h"
47 #include "hw/intc/i8259.h"
48 #include "hw/dma/i8257.h"
49 #include "hw/timer/i8254.h"
50 #include "hw/input/i8042.h"
52 #include "hw/audio/pcspk.h"
53 #include "hw/pci/msi.h"
54 #include "hw/sysbus.h"
55 #include "sysemu/sysemu.h"
56 #include "sysemu/tcg.h"
57 #include "sysemu/numa.h"
58 #include "sysemu/kvm.h"
59 #include "sysemu/qtest.h"
60 #include "sysemu/reset.h"
61 #include "sysemu/runstate.h"
63 #include "hw/xen/xen.h"
64 #include "hw/xen/start_info.h"
65 #include "ui/qemu-spice.h"
66 #include "exec/memory.h"
67 #include "exec/address-spaces.h"
68 #include "sysemu/arch_init.h"
69 #include "qemu/bitmap.h"
70 #include "qemu/config-file.h"
71 #include "qemu/error-report.h"
72 #include "qemu/option.h"
73 #include "qemu/cutils.h"
74 #include "hw/acpi/acpi.h"
75 #include "hw/acpi/cpu_hotplug.h"
76 #include "hw/boards.h"
77 #include "acpi-build.h"
78 #include "hw/mem/pc-dimm.h"
79 #include "hw/mem/nvdimm.h"
80 #include "qapi/error.h"
81 #include "qapi/qapi-visit-common.h"
82 #include "qapi/visitor.h"
83 #include "hw/core/cpu.h"
85 #include "hw/i386/intel_iommu.h"
86 #include "hw/net/ne2000-isa.h"
87 #include "standard-headers/asm-x86/bootparam.h"
88 #include "hw/virtio/virtio-pmem-pci.h"
89 #include "hw/mem/memory-device.h"
90 #include "sysemu/replay.h"
91 #include "qapi/qmp/qerror.h"
92 #include "config-devices.h"
93 #include "e820_memory_layout.h"
97 GlobalProperty pc_compat_4_2
[] = {
98 { "mch", "smbase-smram", "off" },
100 const size_t pc_compat_4_2_len
= G_N_ELEMENTS(pc_compat_4_2
);
102 GlobalProperty pc_compat_4_1
[] = {};
103 const size_t pc_compat_4_1_len
= G_N_ELEMENTS(pc_compat_4_1
);
105 GlobalProperty pc_compat_4_0
[] = {};
106 const size_t pc_compat_4_0_len
= G_N_ELEMENTS(pc_compat_4_0
);
108 GlobalProperty pc_compat_3_1
[] = {
109 { "intel-iommu", "dma-drain", "off" },
110 { "Opteron_G3" "-" TYPE_X86_CPU
, "rdtscp", "off" },
111 { "Opteron_G4" "-" TYPE_X86_CPU
, "rdtscp", "off" },
112 { "Opteron_G4" "-" TYPE_X86_CPU
, "npt", "off" },
113 { "Opteron_G4" "-" TYPE_X86_CPU
, "nrip-save", "off" },
114 { "Opteron_G5" "-" TYPE_X86_CPU
, "rdtscp", "off" },
115 { "Opteron_G5" "-" TYPE_X86_CPU
, "npt", "off" },
116 { "Opteron_G5" "-" TYPE_X86_CPU
, "nrip-save", "off" },
117 { "EPYC" "-" TYPE_X86_CPU
, "npt", "off" },
118 { "EPYC" "-" TYPE_X86_CPU
, "nrip-save", "off" },
119 { "EPYC-IBPB" "-" TYPE_X86_CPU
, "npt", "off" },
120 { "EPYC-IBPB" "-" TYPE_X86_CPU
, "nrip-save", "off" },
121 { "Skylake-Client" "-" TYPE_X86_CPU
, "mpx", "on" },
122 { "Skylake-Client-IBRS" "-" TYPE_X86_CPU
, "mpx", "on" },
123 { "Skylake-Server" "-" TYPE_X86_CPU
, "mpx", "on" },
124 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU
, "mpx", "on" },
125 { "Cascadelake-Server" "-" TYPE_X86_CPU
, "mpx", "on" },
126 { "Icelake-Client" "-" TYPE_X86_CPU
, "mpx", "on" },
127 { "Icelake-Server" "-" TYPE_X86_CPU
, "mpx", "on" },
128 { "Cascadelake-Server" "-" TYPE_X86_CPU
, "stepping", "5" },
129 { TYPE_X86_CPU
, "x-intel-pt-auto-level", "off" },
131 const size_t pc_compat_3_1_len
= G_N_ELEMENTS(pc_compat_3_1
);
133 GlobalProperty pc_compat_3_0
[] = {
134 { TYPE_X86_CPU
, "x-hv-synic-kvm-only", "on" },
135 { "Skylake-Server" "-" TYPE_X86_CPU
, "pku", "off" },
136 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU
, "pku", "off" },
138 const size_t pc_compat_3_0_len
= G_N_ELEMENTS(pc_compat_3_0
);
140 GlobalProperty pc_compat_2_12
[] = {
141 { TYPE_X86_CPU
, "legacy-cache", "on" },
142 { TYPE_X86_CPU
, "topoext", "off" },
143 { "EPYC-" TYPE_X86_CPU
, "xlevel", "0x8000000a" },
144 { "EPYC-IBPB-" TYPE_X86_CPU
, "xlevel", "0x8000000a" },
146 const size_t pc_compat_2_12_len
= G_N_ELEMENTS(pc_compat_2_12
);
148 GlobalProperty pc_compat_2_11
[] = {
149 { TYPE_X86_CPU
, "x-migrate-smi-count", "off" },
150 { "Skylake-Server" "-" TYPE_X86_CPU
, "clflushopt", "off" },
152 const size_t pc_compat_2_11_len
= G_N_ELEMENTS(pc_compat_2_11
);
154 GlobalProperty pc_compat_2_10
[] = {
155 { TYPE_X86_CPU
, "x-hv-max-vps", "0x40" },
156 { "i440FX-pcihost", "x-pci-hole64-fix", "off" },
157 { "q35-pcihost", "x-pci-hole64-fix", "off" },
159 const size_t pc_compat_2_10_len
= G_N_ELEMENTS(pc_compat_2_10
);
161 GlobalProperty pc_compat_2_9
[] = {
162 { "mch", "extended-tseg-mbytes", "0" },
164 const size_t pc_compat_2_9_len
= G_N_ELEMENTS(pc_compat_2_9
);
166 GlobalProperty pc_compat_2_8
[] = {
167 { TYPE_X86_CPU
, "tcg-cpuid", "off" },
168 { "kvmclock", "x-mach-use-reliable-get-clock", "off" },
169 { "ICH9-LPC", "x-smi-broadcast", "off" },
170 { TYPE_X86_CPU
, "vmware-cpuid-freq", "off" },
171 { "Haswell-" TYPE_X86_CPU
, "stepping", "1" },
173 const size_t pc_compat_2_8_len
= G_N_ELEMENTS(pc_compat_2_8
);
175 GlobalProperty pc_compat_2_7
[] = {
176 { TYPE_X86_CPU
, "l3-cache", "off" },
177 { TYPE_X86_CPU
, "full-cpuid-auto-level", "off" },
178 { "Opteron_G3" "-" TYPE_X86_CPU
, "family", "15" },
179 { "Opteron_G3" "-" TYPE_X86_CPU
, "model", "6" },
180 { "Opteron_G3" "-" TYPE_X86_CPU
, "stepping", "1" },
181 { "isa-pcspk", "migrate", "off" },
183 const size_t pc_compat_2_7_len
= G_N_ELEMENTS(pc_compat_2_7
);
185 GlobalProperty pc_compat_2_6
[] = {
186 { TYPE_X86_CPU
, "cpuid-0xb", "off" },
187 { "vmxnet3", "romfile", "" },
188 { TYPE_X86_CPU
, "fill-mtrr-mask", "off" },
189 { "apic-common", "legacy-instance-id", "on", }
191 const size_t pc_compat_2_6_len
= G_N_ELEMENTS(pc_compat_2_6
);
193 GlobalProperty pc_compat_2_5
[] = {};
194 const size_t pc_compat_2_5_len
= G_N_ELEMENTS(pc_compat_2_5
);
196 GlobalProperty pc_compat_2_4
[] = {
197 PC_CPU_MODEL_IDS("2.4.0")
198 { "Haswell-" TYPE_X86_CPU
, "abm", "off" },
199 { "Haswell-noTSX-" TYPE_X86_CPU
, "abm", "off" },
200 { "Broadwell-" TYPE_X86_CPU
, "abm", "off" },
201 { "Broadwell-noTSX-" TYPE_X86_CPU
, "abm", "off" },
202 { "host" "-" TYPE_X86_CPU
, "host-cache-info", "on" },
203 { TYPE_X86_CPU
, "check", "off" },
204 { "qemu64" "-" TYPE_X86_CPU
, "sse4a", "on" },
205 { "qemu64" "-" TYPE_X86_CPU
, "abm", "on" },
206 { "qemu64" "-" TYPE_X86_CPU
, "popcnt", "on" },
207 { "qemu32" "-" TYPE_X86_CPU
, "popcnt", "on" },
208 { "Opteron_G2" "-" TYPE_X86_CPU
, "rdtscp", "on" },
209 { "Opteron_G3" "-" TYPE_X86_CPU
, "rdtscp", "on" },
210 { "Opteron_G4" "-" TYPE_X86_CPU
, "rdtscp", "on" },
211 { "Opteron_G5" "-" TYPE_X86_CPU
, "rdtscp", "on", }
213 const size_t pc_compat_2_4_len
= G_N_ELEMENTS(pc_compat_2_4
);
215 GlobalProperty pc_compat_2_3
[] = {
216 PC_CPU_MODEL_IDS("2.3.0")
217 { TYPE_X86_CPU
, "arat", "off" },
218 { "qemu64" "-" TYPE_X86_CPU
, "min-level", "4" },
219 { "kvm64" "-" TYPE_X86_CPU
, "min-level", "5" },
220 { "pentium3" "-" TYPE_X86_CPU
, "min-level", "2" },
221 { "n270" "-" TYPE_X86_CPU
, "min-level", "5" },
222 { "Conroe" "-" TYPE_X86_CPU
, "min-level", "4" },
223 { "Penryn" "-" TYPE_X86_CPU
, "min-level", "4" },
224 { "Nehalem" "-" TYPE_X86_CPU
, "min-level", "4" },
225 { "n270" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
226 { "Penryn" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
227 { "Conroe" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
228 { "Nehalem" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
229 { "Westmere" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
230 { "SandyBridge" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
231 { "IvyBridge" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
232 { "Haswell" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
233 { "Haswell-noTSX" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
234 { "Broadwell" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
235 { "Broadwell-noTSX" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
236 { TYPE_X86_CPU
, "kvm-no-smi-migration", "on" },
238 const size_t pc_compat_2_3_len
= G_N_ELEMENTS(pc_compat_2_3
);
240 GlobalProperty pc_compat_2_2
[] = {
241 PC_CPU_MODEL_IDS("2.2.0")
242 { "kvm64" "-" TYPE_X86_CPU
, "vme", "off" },
243 { "kvm32" "-" TYPE_X86_CPU
, "vme", "off" },
244 { "Conroe" "-" TYPE_X86_CPU
, "vme", "off" },
245 { "Penryn" "-" TYPE_X86_CPU
, "vme", "off" },
246 { "Nehalem" "-" TYPE_X86_CPU
, "vme", "off" },
247 { "Westmere" "-" TYPE_X86_CPU
, "vme", "off" },
248 { "SandyBridge" "-" TYPE_X86_CPU
, "vme", "off" },
249 { "Haswell" "-" TYPE_X86_CPU
, "vme", "off" },
250 { "Broadwell" "-" TYPE_X86_CPU
, "vme", "off" },
251 { "Opteron_G1" "-" TYPE_X86_CPU
, "vme", "off" },
252 { "Opteron_G2" "-" TYPE_X86_CPU
, "vme", "off" },
253 { "Opteron_G3" "-" TYPE_X86_CPU
, "vme", "off" },
254 { "Opteron_G4" "-" TYPE_X86_CPU
, "vme", "off" },
255 { "Opteron_G5" "-" TYPE_X86_CPU
, "vme", "off" },
256 { "Haswell" "-" TYPE_X86_CPU
, "f16c", "off" },
257 { "Haswell" "-" TYPE_X86_CPU
, "rdrand", "off" },
258 { "Broadwell" "-" TYPE_X86_CPU
, "f16c", "off" },
259 { "Broadwell" "-" TYPE_X86_CPU
, "rdrand", "off" },
261 const size_t pc_compat_2_2_len
= G_N_ELEMENTS(pc_compat_2_2
);
263 GlobalProperty pc_compat_2_1
[] = {
264 PC_CPU_MODEL_IDS("2.1.0")
265 { "coreduo" "-" TYPE_X86_CPU
, "vmx", "on" },
266 { "core2duo" "-" TYPE_X86_CPU
, "vmx", "on" },
268 const size_t pc_compat_2_1_len
= G_N_ELEMENTS(pc_compat_2_1
);
270 GlobalProperty pc_compat_2_0
[] = {
271 PC_CPU_MODEL_IDS("2.0.0")
272 { "virtio-scsi-pci", "any_layout", "off" },
273 { "PIIX4_PM", "memory-hotplug-support", "off" },
274 { "apic", "version", "0x11" },
275 { "nec-usb-xhci", "superspeed-ports-first", "off" },
276 { "nec-usb-xhci", "force-pcie-endcap", "on" },
277 { "pci-serial", "prog_if", "0" },
278 { "pci-serial-2x", "prog_if", "0" },
279 { "pci-serial-4x", "prog_if", "0" },
280 { "virtio-net-pci", "guest_announce", "off" },
281 { "ICH9-LPC", "memory-hotplug-support", "off" },
282 { "xio3130-downstream", COMPAT_PROP_PCP
, "off" },
283 { "ioh3420", COMPAT_PROP_PCP
, "off" },
285 const size_t pc_compat_2_0_len
= G_N_ELEMENTS(pc_compat_2_0
);
287 GlobalProperty pc_compat_1_7
[] = {
288 PC_CPU_MODEL_IDS("1.7.0")
289 { TYPE_USB_DEVICE
, "msos-desc", "no" },
290 { "PIIX4_PM", "acpi-pci-hotplug-with-bridge-support", "off" },
291 { "hpet", HPET_INTCAP
, "4" },
293 const size_t pc_compat_1_7_len
= G_N_ELEMENTS(pc_compat_1_7
);
295 GlobalProperty pc_compat_1_6
[] = {
296 PC_CPU_MODEL_IDS("1.6.0")
297 { "e1000", "mitigation", "off" },
298 { "qemu64-" TYPE_X86_CPU
, "model", "2" },
299 { "qemu32-" TYPE_X86_CPU
, "model", "3" },
300 { "i440FX-pcihost", "short_root_bus", "1" },
301 { "q35-pcihost", "short_root_bus", "1" },
303 const size_t pc_compat_1_6_len
= G_N_ELEMENTS(pc_compat_1_6
);
305 GlobalProperty pc_compat_1_5
[] = {
306 PC_CPU_MODEL_IDS("1.5.0")
307 { "Conroe-" TYPE_X86_CPU
, "model", "2" },
308 { "Conroe-" TYPE_X86_CPU
, "min-level", "2" },
309 { "Penryn-" TYPE_X86_CPU
, "model", "2" },
310 { "Penryn-" TYPE_X86_CPU
, "min-level", "2" },
311 { "Nehalem-" TYPE_X86_CPU
, "model", "2" },
312 { "Nehalem-" TYPE_X86_CPU
, "min-level", "2" },
313 { "virtio-net-pci", "any_layout", "off" },
314 { TYPE_X86_CPU
, "pmu", "on" },
315 { "i440FX-pcihost", "short_root_bus", "0" },
316 { "q35-pcihost", "short_root_bus", "0" },
318 const size_t pc_compat_1_5_len
= G_N_ELEMENTS(pc_compat_1_5
);
320 GlobalProperty pc_compat_1_4
[] = {
321 PC_CPU_MODEL_IDS("1.4.0")
322 { "scsi-hd", "discard_granularity", "0" },
323 { "scsi-cd", "discard_granularity", "0" },
324 { "scsi-disk", "discard_granularity", "0" },
325 { "ide-hd", "discard_granularity", "0" },
326 { "ide-cd", "discard_granularity", "0" },
327 { "ide-drive", "discard_granularity", "0" },
328 { "virtio-blk-pci", "discard_granularity", "0" },
329 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string: */
330 { "virtio-serial-pci", "vectors", "0xFFFFFFFF" },
331 { "virtio-net-pci", "ctrl_guest_offloads", "off" },
332 { "e1000", "romfile", "pxe-e1000.rom" },
333 { "ne2k_pci", "romfile", "pxe-ne2k_pci.rom" },
334 { "pcnet", "romfile", "pxe-pcnet.rom" },
335 { "rtl8139", "romfile", "pxe-rtl8139.rom" },
336 { "virtio-net-pci", "romfile", "pxe-virtio.rom" },
337 { "486-" TYPE_X86_CPU
, "model", "0" },
338 { "n270" "-" TYPE_X86_CPU
, "movbe", "off" },
339 { "Westmere" "-" TYPE_X86_CPU
, "pclmulqdq", "off" },
341 const size_t pc_compat_1_4_len
= G_N_ELEMENTS(pc_compat_1_4
);
343 GSIState
*pc_gsi_create(qemu_irq
**irqs
, bool pci_enabled
)
347 s
= g_new0(GSIState
, 1);
348 if (kvm_ioapic_in_kernel()) {
349 kvm_pc_setup_irq_routing(pci_enabled
);
351 *irqs
= qemu_allocate_irqs(gsi_handler
, s
, GSI_NUM_PINS
);
356 static void ioport80_write(void *opaque
, hwaddr addr
, uint64_t data
,
361 static uint64_t ioport80_read(void *opaque
, hwaddr addr
, unsigned size
)
363 return 0xffffffffffffffffULL
;
366 /* MSDOS compatibility mode FPU exception support */
367 static void ioportF0_write(void *opaque
, hwaddr addr
, uint64_t data
,
375 static uint64_t ioportF0_read(void *opaque
, hwaddr addr
, unsigned size
)
377 return 0xffffffffffffffffULL
;
380 /* PC cmos mappings */
382 #define REG_EQUIPMENT_BYTE 0x14
384 int cmos_get_fd_drive_type(FloppyDriveType fd0
)
389 case FLOPPY_DRIVE_TYPE_144
:
390 /* 1.44 Mb 3"5 drive */
393 case FLOPPY_DRIVE_TYPE_288
:
394 /* 2.88 Mb 3"5 drive */
397 case FLOPPY_DRIVE_TYPE_120
:
398 /* 1.2 Mb 5"5 drive */
401 case FLOPPY_DRIVE_TYPE_NONE
:
409 static void cmos_init_hd(ISADevice
*s
, int type_ofs
, int info_ofs
,
410 int16_t cylinders
, int8_t heads
, int8_t sectors
)
412 rtc_set_memory(s
, type_ofs
, 47);
413 rtc_set_memory(s
, info_ofs
, cylinders
);
414 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
415 rtc_set_memory(s
, info_ofs
+ 2, heads
);
416 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
417 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
418 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
419 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
420 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
421 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
424 /* convert boot_device letter to something recognizable by the bios */
425 static int boot_device2nibble(char boot_device
)
427 switch(boot_device
) {
430 return 0x01; /* floppy boot */
432 return 0x02; /* hard drive boot */
434 return 0x03; /* CD-ROM boot */
436 return 0x04; /* Network boot */
441 static void set_boot_dev(ISADevice
*s
, const char *boot_device
, Error
**errp
)
443 #define PC_MAX_BOOT_DEVICES 3
444 int nbds
, bds
[3] = { 0, };
447 nbds
= strlen(boot_device
);
448 if (nbds
> PC_MAX_BOOT_DEVICES
) {
449 error_setg(errp
, "Too many boot devices for PC");
452 for (i
= 0; i
< nbds
; i
++) {
453 bds
[i
] = boot_device2nibble(boot_device
[i
]);
455 error_setg(errp
, "Invalid boot device for PC: '%c'",
460 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
461 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
464 static void pc_boot_set(void *opaque
, const char *boot_device
, Error
**errp
)
466 set_boot_dev(opaque
, boot_device
, errp
);
469 static void pc_cmos_init_floppy(ISADevice
*rtc_state
, ISADevice
*floppy
)
472 FloppyDriveType fd_type
[2] = { FLOPPY_DRIVE_TYPE_NONE
,
473 FLOPPY_DRIVE_TYPE_NONE
};
477 for (i
= 0; i
< 2; i
++) {
478 fd_type
[i
] = isa_fdc_get_drive_type(floppy
, i
);
481 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
482 cmos_get_fd_drive_type(fd_type
[1]);
483 rtc_set_memory(rtc_state
, 0x10, val
);
485 val
= rtc_get_memory(rtc_state
, REG_EQUIPMENT_BYTE
);
487 if (fd_type
[0] != FLOPPY_DRIVE_TYPE_NONE
) {
490 if (fd_type
[1] != FLOPPY_DRIVE_TYPE_NONE
) {
497 val
|= 0x01; /* 1 drive, ready for boot */
500 val
|= 0x41; /* 2 drives, ready for boot */
503 rtc_set_memory(rtc_state
, REG_EQUIPMENT_BYTE
, val
);
506 typedef struct pc_cmos_init_late_arg
{
507 ISADevice
*rtc_state
;
509 } pc_cmos_init_late_arg
;
511 typedef struct check_fdc_state
{
516 static int check_fdc(Object
*obj
, void *opaque
)
518 CheckFdcState
*state
= opaque
;
521 Error
*local_err
= NULL
;
523 fdc
= object_dynamic_cast(obj
, TYPE_ISA_FDC
);
528 iobase
= object_property_get_uint(obj
, "iobase", &local_err
);
529 if (local_err
|| iobase
!= 0x3f0) {
530 error_free(local_err
);
535 state
->multiple
= true;
537 state
->floppy
= ISA_DEVICE(obj
);
542 static const char * const fdc_container_path
[] = {
543 "/unattached", "/peripheral", "/peripheral-anon"
547 * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers
550 ISADevice
*pc_find_fdc0(void)
554 CheckFdcState state
= { 0 };
556 for (i
= 0; i
< ARRAY_SIZE(fdc_container_path
); i
++) {
557 container
= container_get(qdev_get_machine(), fdc_container_path
[i
]);
558 object_child_foreach(container
, check_fdc
, &state
);
561 if (state
.multiple
) {
562 warn_report("multiple floppy disk controllers with "
563 "iobase=0x3f0 have been found");
564 error_printf("the one being picked for CMOS setup might not reflect "
571 static void pc_cmos_init_late(void *opaque
)
573 pc_cmos_init_late_arg
*arg
= opaque
;
574 ISADevice
*s
= arg
->rtc_state
;
576 int8_t heads
, sectors
;
581 if (arg
->idebus
[0] && ide_get_geometry(arg
->idebus
[0], 0,
582 &cylinders
, &heads
, §ors
) >= 0) {
583 cmos_init_hd(s
, 0x19, 0x1b, cylinders
, heads
, sectors
);
586 if (arg
->idebus
[0] && ide_get_geometry(arg
->idebus
[0], 1,
587 &cylinders
, &heads
, §ors
) >= 0) {
588 cmos_init_hd(s
, 0x1a, 0x24, cylinders
, heads
, sectors
);
591 rtc_set_memory(s
, 0x12, val
);
594 for (i
= 0; i
< 4; i
++) {
595 /* NOTE: ide_get_geometry() returns the physical
596 geometry. It is always such that: 1 <= sects <= 63, 1
597 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
598 geometry can be different if a translation is done. */
599 if (arg
->idebus
[i
/ 2] &&
600 ide_get_geometry(arg
->idebus
[i
/ 2], i
% 2,
601 &cylinders
, &heads
, §ors
) >= 0) {
602 trans
= ide_get_bios_chs_trans(arg
->idebus
[i
/ 2], i
% 2) - 1;
603 assert((trans
& ~3) == 0);
604 val
|= trans
<< (i
* 2);
607 rtc_set_memory(s
, 0x39, val
);
609 pc_cmos_init_floppy(s
, pc_find_fdc0());
611 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
614 void pc_cmos_init(PCMachineState
*pcms
,
615 BusState
*idebus0
, BusState
*idebus1
,
619 static pc_cmos_init_late_arg arg
;
620 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
622 /* various important CMOS locations needed by PC/Bochs bios */
625 /* base memory (first MiB) */
626 val
= MIN(x86ms
->below_4g_mem_size
/ KiB
, 640);
627 rtc_set_memory(s
, 0x15, val
);
628 rtc_set_memory(s
, 0x16, val
>> 8);
629 /* extended memory (next 64MiB) */
630 if (x86ms
->below_4g_mem_size
> 1 * MiB
) {
631 val
= (x86ms
->below_4g_mem_size
- 1 * MiB
) / KiB
;
637 rtc_set_memory(s
, 0x17, val
);
638 rtc_set_memory(s
, 0x18, val
>> 8);
639 rtc_set_memory(s
, 0x30, val
);
640 rtc_set_memory(s
, 0x31, val
>> 8);
641 /* memory between 16MiB and 4GiB */
642 if (x86ms
->below_4g_mem_size
> 16 * MiB
) {
643 val
= (x86ms
->below_4g_mem_size
- 16 * MiB
) / (64 * KiB
);
649 rtc_set_memory(s
, 0x34, val
);
650 rtc_set_memory(s
, 0x35, val
>> 8);
651 /* memory above 4GiB */
652 val
= x86ms
->above_4g_mem_size
/ 65536;
653 rtc_set_memory(s
, 0x5b, val
);
654 rtc_set_memory(s
, 0x5c, val
>> 8);
655 rtc_set_memory(s
, 0x5d, val
>> 16);
657 object_property_add_link(OBJECT(pcms
), "rtc_state",
659 (Object
**)&x86ms
->rtc
,
660 object_property_allow_set_link
,
661 OBJ_PROP_LINK_STRONG
, &error_abort
);
662 object_property_set_link(OBJECT(pcms
), OBJECT(s
),
663 "rtc_state", &error_abort
);
665 set_boot_dev(s
, MACHINE(pcms
)->boot_order
, &error_fatal
);
668 val
|= 0x02; /* FPU is there */
669 val
|= 0x04; /* PS/2 mouse installed */
670 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
672 /* hard drives and FDC */
674 arg
.idebus
[0] = idebus0
;
675 arg
.idebus
[1] = idebus1
;
676 qemu_register_reset(pc_cmos_init_late
, &arg
);
679 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
681 X86CPU
*cpu
= opaque
;
683 /* XXX: send to all CPUs ? */
684 /* XXX: add logic to handle multiple A20 line sources */
685 x86_cpu_set_a20(cpu
, level
);
688 #define NE2000_NB_MAX 6
690 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
692 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
694 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
)
696 static int nb_ne2k
= 0;
698 if (nb_ne2k
== NE2000_NB_MAX
)
700 isa_ne2000_init(bus
, ne2000_io
[nb_ne2k
],
701 ne2000_irq
[nb_ne2k
], nd
);
705 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
707 X86CPU
*cpu
= opaque
;
710 cpu_interrupt(CPU(cpu
), CPU_INTERRUPT_SMI
);
715 * This function is very similar to smp_parse()
716 * in hw/core/machine.c but includes CPU die support.
718 void pc_smp_parse(MachineState
*ms
, QemuOpts
*opts
)
720 X86MachineState
*x86ms
= X86_MACHINE(ms
);
723 unsigned cpus
= qemu_opt_get_number(opts
, "cpus", 0);
724 unsigned sockets
= qemu_opt_get_number(opts
, "sockets", 0);
725 unsigned dies
= qemu_opt_get_number(opts
, "dies", 1);
726 unsigned cores
= qemu_opt_get_number(opts
, "cores", 0);
727 unsigned threads
= qemu_opt_get_number(opts
, "threads", 0);
729 /* compute missing values, prefer sockets over cores over threads */
730 if (cpus
== 0 || sockets
== 0) {
731 cores
= cores
> 0 ? cores
: 1;
732 threads
= threads
> 0 ? threads
: 1;
734 sockets
= sockets
> 0 ? sockets
: 1;
735 cpus
= cores
* threads
* dies
* sockets
;
738 qemu_opt_get_number(opts
, "maxcpus", cpus
);
739 sockets
= ms
->smp
.max_cpus
/ (cores
* threads
* dies
);
741 } else if (cores
== 0) {
742 threads
= threads
> 0 ? threads
: 1;
743 cores
= cpus
/ (sockets
* dies
* threads
);
744 cores
= cores
> 0 ? cores
: 1;
745 } else if (threads
== 0) {
746 threads
= cpus
/ (cores
* dies
* sockets
);
747 threads
= threads
> 0 ? threads
: 1;
748 } else if (sockets
* dies
* cores
* threads
< cpus
) {
749 error_report("cpu topology: "
750 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) < "
752 sockets
, dies
, cores
, threads
, cpus
);
757 qemu_opt_get_number(opts
, "maxcpus", cpus
);
759 if (ms
->smp
.max_cpus
< cpus
) {
760 error_report("maxcpus must be equal to or greater than smp");
764 if (sockets
* dies
* cores
* threads
> ms
->smp
.max_cpus
) {
765 error_report("cpu topology: "
766 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) > "
768 sockets
, dies
, cores
, threads
,
773 if (sockets
* dies
* cores
* threads
!= ms
->smp
.max_cpus
) {
774 warn_report("Invalid CPU topology deprecated: "
775 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) "
777 sockets
, dies
, cores
, threads
,
782 ms
->smp
.cores
= cores
;
783 ms
->smp
.threads
= threads
;
784 ms
->smp
.sockets
= sockets
;
785 x86ms
->smp_dies
= dies
;
788 if (ms
->smp
.cpus
> 1) {
789 Error
*blocker
= NULL
;
790 error_setg(&blocker
, QERR_REPLAY_NOT_SUPPORTED
, "smp");
791 replay_add_blocker(blocker
);
795 void pc_hot_add_cpu(MachineState
*ms
, const int64_t id
, Error
**errp
)
797 X86MachineState
*x86ms
= X86_MACHINE(ms
);
798 int64_t apic_id
= x86_cpu_apic_id_from_index(x86ms
, id
);
799 Error
*local_err
= NULL
;
802 error_setg(errp
, "Invalid CPU id: %" PRIi64
, id
);
806 if (apic_id
>= ACPI_CPU_HOTPLUG_ID_LIMIT
) {
807 error_setg(errp
, "Unable to add CPU: %" PRIi64
808 ", resulting APIC ID (%" PRIi64
") is too large",
814 x86_cpu_new(X86_MACHINE(ms
), apic_id
, &local_err
);
816 error_propagate(errp
, local_err
);
821 static void rtc_set_cpus_count(ISADevice
*rtc
, uint16_t cpus_count
)
823 if (cpus_count
> 0xff) {
824 /* If the number of CPUs can't be represented in 8 bits, the
825 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just
826 * to make old BIOSes fail more predictably.
828 rtc_set_memory(rtc
, 0x5f, 0);
830 rtc_set_memory(rtc
, 0x5f, cpus_count
- 1);
835 void pc_machine_done(Notifier
*notifier
, void *data
)
837 PCMachineState
*pcms
= container_of(notifier
,
838 PCMachineState
, machine_done
);
839 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
840 PCIBus
*bus
= pcms
->bus
;
842 /* set the number of CPUs */
843 rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
848 QLIST_FOREACH(bus
, &bus
->child
, sibling
) {
849 /* look for expander root buses */
850 if (pci_bus_is_root(bus
)) {
854 if (extra_hosts
&& x86ms
->fw_cfg
) {
855 uint64_t *val
= g_malloc(sizeof(*val
));
856 *val
= cpu_to_le64(extra_hosts
);
857 fw_cfg_add_file(x86ms
->fw_cfg
,
858 "etc/extra-pci-roots", val
, sizeof(*val
));
864 fw_cfg_build_smbios(MACHINE(pcms
), x86ms
->fw_cfg
);
865 fw_cfg_build_feature_control(MACHINE(pcms
), x86ms
->fw_cfg
);
866 /* update FW_CFG_NB_CPUS to account for -device added CPUs */
867 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
870 if (x86ms
->apic_id_limit
> 255 && !xen_enabled()) {
871 IntelIOMMUState
*iommu
= INTEL_IOMMU_DEVICE(x86_iommu_get_default());
873 if (!iommu
|| !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu
)) ||
874 iommu
->intr_eim
!= ON_OFF_AUTO_ON
) {
875 error_report("current -smp configuration requires "
876 "Extended Interrupt Mode enabled. "
877 "You can add an IOMMU using: "
878 "-device intel-iommu,intremap=on,eim=on");
884 void pc_guest_info_init(PCMachineState
*pcms
)
887 MachineState
*ms
= MACHINE(pcms
);
888 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
890 x86ms
->apic_xrupt_override
= kvm_allows_irq0_override();
891 pcms
->numa_nodes
= ms
->numa_state
->num_nodes
;
892 pcms
->node_mem
= g_malloc0(pcms
->numa_nodes
*
893 sizeof *pcms
->node_mem
);
894 for (i
= 0; i
< ms
->numa_state
->num_nodes
; i
++) {
895 pcms
->node_mem
[i
] = ms
->numa_state
->nodes
[i
].node_mem
;
898 pcms
->machine_done
.notify
= pc_machine_done
;
899 qemu_add_machine_init_done_notifier(&pcms
->machine_done
);
902 /* setup pci memory address space mapping into system address space */
903 void pc_pci_as_mapping_init(Object
*owner
, MemoryRegion
*system_memory
,
904 MemoryRegion
*pci_address_space
)
906 /* Set to lower priority than RAM */
907 memory_region_add_subregion_overlap(system_memory
, 0x0,
908 pci_address_space
, -1);
911 void xen_load_linux(PCMachineState
*pcms
)
915 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
916 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
918 assert(MACHINE(pcms
)->kernel_filename
!= NULL
);
920 fw_cfg
= fw_cfg_init_io(FW_CFG_IO_BASE
);
921 fw_cfg_add_i16(fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
924 x86_load_linux(x86ms
, fw_cfg
, pcmc
->acpi_data_size
,
925 pcmc
->pvh_enabled
, pcmc
->linuxboot_dma_enabled
);
926 for (i
= 0; i
< nb_option_roms
; i
++) {
927 assert(!strcmp(option_rom
[i
].name
, "linuxboot.bin") ||
928 !strcmp(option_rom
[i
].name
, "linuxboot_dma.bin") ||
929 !strcmp(option_rom
[i
].name
, "pvh.bin") ||
930 !strcmp(option_rom
[i
].name
, "multiboot.bin"));
931 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
933 x86ms
->fw_cfg
= fw_cfg
;
936 void pc_memory_init(PCMachineState
*pcms
,
937 MemoryRegion
*system_memory
,
938 MemoryRegion
*rom_memory
,
939 MemoryRegion
**ram_memory
)
942 MemoryRegion
*option_rom_mr
;
943 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
945 MachineState
*machine
= MACHINE(pcms
);
946 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
947 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
948 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
950 assert(machine
->ram_size
== x86ms
->below_4g_mem_size
+
951 x86ms
->above_4g_mem_size
);
953 linux_boot
= (machine
->kernel_filename
!= NULL
);
956 * Split single memory region and use aliases to address portions of it,
957 * done for backwards compatibility with older qemus.
959 *ram_memory
= machine
->ram
;
960 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
961 memory_region_init_alias(ram_below_4g
, NULL
, "ram-below-4g", machine
->ram
,
962 0, x86ms
->below_4g_mem_size
);
963 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
964 e820_add_entry(0, x86ms
->below_4g_mem_size
, E820_RAM
);
965 if (x86ms
->above_4g_mem_size
> 0) {
966 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
967 memory_region_init_alias(ram_above_4g
, NULL
, "ram-above-4g",
969 x86ms
->below_4g_mem_size
,
970 x86ms
->above_4g_mem_size
);
971 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
973 e820_add_entry(0x100000000ULL
, x86ms
->above_4g_mem_size
, E820_RAM
);
976 if (!pcmc
->has_reserved_memory
&&
977 (machine
->ram_slots
||
978 (machine
->maxram_size
> machine
->ram_size
))) {
980 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s",
985 /* always allocate the device memory information */
986 machine
->device_memory
= g_malloc0(sizeof(*machine
->device_memory
));
988 /* initialize device memory address space */
989 if (pcmc
->has_reserved_memory
&&
990 (machine
->ram_size
< machine
->maxram_size
)) {
991 ram_addr_t device_mem_size
= machine
->maxram_size
- machine
->ram_size
;
993 if (machine
->ram_slots
> ACPI_MAX_RAM_SLOTS
) {
994 error_report("unsupported amount of memory slots: %"PRIu64
,
999 if (QEMU_ALIGN_UP(machine
->maxram_size
,
1000 TARGET_PAGE_SIZE
) != machine
->maxram_size
) {
1001 error_report("maximum memory size must by aligned to multiple of "
1002 "%d bytes", TARGET_PAGE_SIZE
);
1006 machine
->device_memory
->base
=
1007 ROUND_UP(0x100000000ULL
+ x86ms
->above_4g_mem_size
, 1 * GiB
);
1009 if (pcmc
->enforce_aligned_dimm
) {
1010 /* size device region assuming 1G page max alignment per slot */
1011 device_mem_size
+= (1 * GiB
) * machine
->ram_slots
;
1014 if ((machine
->device_memory
->base
+ device_mem_size
) <
1016 error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT
,
1017 machine
->maxram_size
);
1021 memory_region_init(&machine
->device_memory
->mr
, OBJECT(pcms
),
1022 "device-memory", device_mem_size
);
1023 memory_region_add_subregion(system_memory
, machine
->device_memory
->base
,
1024 &machine
->device_memory
->mr
);
1027 /* Initialize PC system firmware */
1028 pc_system_firmware_init(pcms
, rom_memory
);
1030 option_rom_mr
= g_malloc(sizeof(*option_rom_mr
));
1031 memory_region_init_ram(option_rom_mr
, NULL
, "pc.rom", PC_ROM_SIZE
,
1033 if (pcmc
->pci_enabled
) {
1034 memory_region_set_readonly(option_rom_mr
, true);
1036 memory_region_add_subregion_overlap(rom_memory
,
1041 fw_cfg
= fw_cfg_arch_create(machine
,
1042 x86ms
->boot_cpus
, x86ms
->apic_id_limit
);
1046 if (pcmc
->has_reserved_memory
&& machine
->device_memory
->base
) {
1047 uint64_t *val
= g_malloc(sizeof(*val
));
1048 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1049 uint64_t res_mem_end
= machine
->device_memory
->base
;
1051 if (!pcmc
->broken_reserved_end
) {
1052 res_mem_end
+= memory_region_size(&machine
->device_memory
->mr
);
1054 *val
= cpu_to_le64(ROUND_UP(res_mem_end
, 1 * GiB
));
1055 fw_cfg_add_file(fw_cfg
, "etc/reserved-memory-end", val
, sizeof(*val
));
1059 x86_load_linux(x86ms
, fw_cfg
, pcmc
->acpi_data_size
,
1060 pcmc
->pvh_enabled
, pcmc
->linuxboot_dma_enabled
);
1063 for (i
= 0; i
< nb_option_roms
; i
++) {
1064 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1066 x86ms
->fw_cfg
= fw_cfg
;
1068 /* Init default IOAPIC address space */
1069 x86ms
->ioapic_as
= &address_space_memory
;
1071 /* Init ACPI memory hotplug IO base address */
1072 pcms
->memhp_io_base
= ACPI_MEMORY_HOTPLUG_BASE
;
1076 * The 64bit pci hole starts after "above 4G RAM" and
1077 * potentially the space reserved for memory hotplug.
1079 uint64_t pc_pci_hole64_start(void)
1081 PCMachineState
*pcms
= PC_MACHINE(qdev_get_machine());
1082 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1083 MachineState
*ms
= MACHINE(pcms
);
1084 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
1085 uint64_t hole64_start
= 0;
1087 if (pcmc
->has_reserved_memory
&& ms
->device_memory
->base
) {
1088 hole64_start
= ms
->device_memory
->base
;
1089 if (!pcmc
->broken_reserved_end
) {
1090 hole64_start
+= memory_region_size(&ms
->device_memory
->mr
);
1093 hole64_start
= 0x100000000ULL
+ x86ms
->above_4g_mem_size
;
1096 return ROUND_UP(hole64_start
, 1 * GiB
);
1099 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1101 DeviceState
*dev
= NULL
;
1103 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_VGA
);
1105 PCIDevice
*pcidev
= pci_vga_init(pci_bus
);
1106 dev
= pcidev
? &pcidev
->qdev
: NULL
;
1107 } else if (isa_bus
) {
1108 ISADevice
*isadev
= isa_vga_init(isa_bus
);
1109 dev
= isadev
? DEVICE(isadev
) : NULL
;
1111 rom_reset_order_override();
1115 static const MemoryRegionOps ioport80_io_ops
= {
1116 .write
= ioport80_write
,
1117 .read
= ioport80_read
,
1118 .endianness
= DEVICE_NATIVE_ENDIAN
,
1120 .min_access_size
= 1,
1121 .max_access_size
= 1,
1125 static const MemoryRegionOps ioportF0_io_ops
= {
1126 .write
= ioportF0_write
,
1127 .read
= ioportF0_read
,
1128 .endianness
= DEVICE_NATIVE_ENDIAN
,
1130 .min_access_size
= 1,
1131 .max_access_size
= 1,
1135 static void pc_superio_init(ISABus
*isa_bus
, bool create_fdctrl
, bool no_vmport
)
1138 DriveInfo
*fd
[MAX_FD
];
1140 ISADevice
*i8042
, *port92
, *vmmouse
;
1142 serial_hds_isa_init(isa_bus
, 0, MAX_ISA_SERIAL_PORTS
);
1143 parallel_hds_isa_init(isa_bus
, MAX_PARALLEL_PORTS
);
1145 for (i
= 0; i
< MAX_FD
; i
++) {
1146 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1147 create_fdctrl
|= !!fd
[i
];
1149 if (create_fdctrl
) {
1150 fdctrl_init_isa(isa_bus
, fd
);
1153 i8042
= isa_create_simple(isa_bus
, "i8042");
1155 vmport_init(isa_bus
);
1156 vmmouse
= isa_try_create(isa_bus
, "vmmouse");
1161 object_property_set_link(OBJECT(vmmouse
), OBJECT(i8042
),
1162 "i8042", &error_abort
);
1163 qdev_init_nofail(DEVICE(vmmouse
));
1165 port92
= isa_create_simple(isa_bus
, TYPE_PORT92
);
1167 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1168 i8042_setup_a20_line(i8042
, a20_line
[0]);
1169 qdev_connect_gpio_out_named(DEVICE(port92
),
1170 PORT92_A20_LINE
, 0, a20_line
[1]);
1174 void pc_basic_device_init(ISABus
*isa_bus
, qemu_irq
*gsi
,
1175 ISADevice
**rtc_state
,
1182 DeviceState
*hpet
= NULL
;
1183 int pit_isa_irq
= 0;
1184 qemu_irq pit_alt_irq
= NULL
;
1185 qemu_irq rtc_irq
= NULL
;
1186 ISADevice
*pit
= NULL
;
1187 MemoryRegion
*ioport80_io
= g_new(MemoryRegion
, 1);
1188 MemoryRegion
*ioportF0_io
= g_new(MemoryRegion
, 1);
1190 memory_region_init_io(ioport80_io
, NULL
, &ioport80_io_ops
, NULL
, "ioport80", 1);
1191 memory_region_add_subregion(isa_bus
->address_space_io
, 0x80, ioport80_io
);
1193 memory_region_init_io(ioportF0_io
, NULL
, &ioportF0_io_ops
, NULL
, "ioportF0", 1);
1194 memory_region_add_subregion(isa_bus
->address_space_io
, 0xf0, ioportF0_io
);
1197 * Check if an HPET shall be created.
1199 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1200 * when the HPET wants to take over. Thus we have to disable the latter.
1202 if (!no_hpet
&& (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1203 hpet
= qdev_try_create(NULL
, TYPE_HPET
);
1205 /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
1206 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
1209 uint8_t compat
= object_property_get_uint(OBJECT(hpet
),
1212 qdev_prop_set_uint32(hpet
, HPET_INTCAP
, hpet_irqs
);
1214 qdev_init_nofail(hpet
);
1215 sysbus_mmio_map(SYS_BUS_DEVICE(hpet
), 0, HPET_BASE
);
1217 for (i
= 0; i
< GSI_NUM_PINS
; i
++) {
1218 sysbus_connect_irq(SYS_BUS_DEVICE(hpet
), i
, gsi
[i
]);
1221 pit_alt_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_PIT_INT
);
1222 rtc_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_RTC_INT
);
1225 *rtc_state
= mc146818_rtc_init(isa_bus
, 2000, rtc_irq
);
1227 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1229 if (!xen_enabled() && has_pit
) {
1230 if (kvm_pit_in_kernel()) {
1231 pit
= kvm_pit_init(isa_bus
, 0x40);
1233 pit
= i8254_pit_init(isa_bus
, 0x40, pit_isa_irq
, pit_alt_irq
);
1236 /* connect PIT to output control line of the HPET */
1237 qdev_connect_gpio_out(hpet
, 0, qdev_get_gpio_in(DEVICE(pit
), 0));
1239 pcspk_init(isa_bus
, pit
);
1242 i8257_dma_init(isa_bus
, 0);
1245 pc_superio_init(isa_bus
, create_fdctrl
, no_vmport
);
1248 void pc_nic_init(PCMachineClass
*pcmc
, ISABus
*isa_bus
, PCIBus
*pci_bus
)
1252 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC
);
1253 for (i
= 0; i
< nb_nics
; i
++) {
1254 NICInfo
*nd
= &nd_table
[i
];
1255 const char *model
= nd
->model
? nd
->model
: pcmc
->default_nic_model
;
1257 if (g_str_equal(model
, "ne2k_isa")) {
1258 pc_init_ne2k_isa(isa_bus
, nd
);
1260 pci_nic_init_nofail(nd
, pci_bus
, model
, NULL
);
1263 rom_reset_order_override();
1266 void pc_i8259_create(ISABus
*isa_bus
, qemu_irq
*i8259_irqs
)
1270 if (kvm_pic_in_kernel()) {
1271 i8259
= kvm_i8259_init(isa_bus
);
1272 } else if (xen_enabled()) {
1273 i8259
= xen_interrupt_controller_init();
1275 i8259
= i8259_init(isa_bus
, x86_allocate_cpu_irq());
1278 for (size_t i
= 0; i
< ISA_NUM_IRQS
; i
++) {
1279 i8259_irqs
[i
] = i8259
[i
];
1285 static void pc_memory_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
1288 const PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1289 const PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1290 const MachineState
*ms
= MACHINE(hotplug_dev
);
1291 const bool is_nvdimm
= object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
);
1292 const uint64_t legacy_align
= TARGET_PAGE_SIZE
;
1293 Error
*local_err
= NULL
;
1296 * When -no-acpi is used with Q35 machine type, no ACPI is built,
1297 * but pcms->acpi_dev is still created. Check !acpi_enabled in
1298 * addition to cover this case.
1300 if (!pcms
->acpi_dev
|| !x86_machine_is_acpi_enabled(X86_MACHINE(pcms
))) {
1302 "memory hotplug is not enabled: missing acpi device or acpi disabled");
1306 if (is_nvdimm
&& !ms
->nvdimms_state
->is_enabled
) {
1307 error_setg(errp
, "nvdimm is not enabled: missing 'nvdimm' in '-M'");
1311 hotplug_handler_pre_plug(pcms
->acpi_dev
, dev
, &local_err
);
1313 error_propagate(errp
, local_err
);
1317 pc_dimm_pre_plug(PC_DIMM(dev
), MACHINE(hotplug_dev
),
1318 pcmc
->enforce_aligned_dimm
? NULL
: &legacy_align
, errp
);
1321 static void pc_memory_plug(HotplugHandler
*hotplug_dev
,
1322 DeviceState
*dev
, Error
**errp
)
1324 Error
*local_err
= NULL
;
1325 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1326 MachineState
*ms
= MACHINE(hotplug_dev
);
1327 bool is_nvdimm
= object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
);
1329 pc_dimm_plug(PC_DIMM(dev
), MACHINE(pcms
), &local_err
);
1335 nvdimm_plug(ms
->nvdimms_state
);
1338 hotplug_handler_plug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &error_abort
);
1340 error_propagate(errp
, local_err
);
1343 static void pc_memory_unplug_request(HotplugHandler
*hotplug_dev
,
1344 DeviceState
*dev
, Error
**errp
)
1346 Error
*local_err
= NULL
;
1347 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1350 * When -no-acpi is used with Q35 machine type, no ACPI is built,
1351 * but pcms->acpi_dev is still created. Check !acpi_enabled in
1352 * addition to cover this case.
1354 if (!pcms
->acpi_dev
|| !x86_machine_is_acpi_enabled(X86_MACHINE(pcms
))) {
1355 error_setg(&local_err
,
1356 "memory hotplug is not enabled: missing acpi device or acpi disabled");
1360 if (object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
)) {
1361 error_setg(&local_err
,
1362 "nvdimm device hot unplug is not supported yet.");
1366 hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
,
1369 error_propagate(errp
, local_err
);
1372 static void pc_memory_unplug(HotplugHandler
*hotplug_dev
,
1373 DeviceState
*dev
, Error
**errp
)
1375 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1376 Error
*local_err
= NULL
;
1378 hotplug_handler_unplug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1383 pc_dimm_unplug(PC_DIMM(dev
), MACHINE(pcms
));
1384 object_property_set_bool(OBJECT(dev
), false, "realized", NULL
);
1386 error_propagate(errp
, local_err
);
1389 static int pc_apic_cmp(const void *a
, const void *b
)
1391 CPUArchId
*apic_a
= (CPUArchId
*)a
;
1392 CPUArchId
*apic_b
= (CPUArchId
*)b
;
1394 return apic_a
->arch_id
- apic_b
->arch_id
;
1397 /* returns pointer to CPUArchId descriptor that matches CPU's apic_id
1398 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no
1399 * entry corresponding to CPU's apic_id returns NULL.
1401 static CPUArchId
*pc_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
1403 CPUArchId apic_id
, *found_cpu
;
1405 apic_id
.arch_id
= id
;
1406 found_cpu
= bsearch(&apic_id
, ms
->possible_cpus
->cpus
,
1407 ms
->possible_cpus
->len
, sizeof(*ms
->possible_cpus
->cpus
),
1409 if (found_cpu
&& idx
) {
1410 *idx
= found_cpu
- ms
->possible_cpus
->cpus
;
1415 static void pc_cpu_plug(HotplugHandler
*hotplug_dev
,
1416 DeviceState
*dev
, Error
**errp
)
1418 CPUArchId
*found_cpu
;
1419 Error
*local_err
= NULL
;
1420 X86CPU
*cpu
= X86_CPU(dev
);
1421 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1422 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
1424 if (pcms
->acpi_dev
) {
1425 hotplug_handler_plug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1431 /* increment the number of CPUs */
1434 rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
1436 if (x86ms
->fw_cfg
) {
1437 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
1440 found_cpu
= pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, NULL
);
1441 found_cpu
->cpu
= OBJECT(dev
);
1443 error_propagate(errp
, local_err
);
1445 static void pc_cpu_unplug_request_cb(HotplugHandler
*hotplug_dev
,
1446 DeviceState
*dev
, Error
**errp
)
1449 Error
*local_err
= NULL
;
1450 X86CPU
*cpu
= X86_CPU(dev
);
1451 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1453 if (!pcms
->acpi_dev
) {
1454 error_setg(&local_err
, "CPU hot unplug not supported without ACPI");
1458 pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, &idx
);
1461 error_setg(&local_err
, "Boot CPU is unpluggable");
1465 hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
,
1472 error_propagate(errp
, local_err
);
1476 static void pc_cpu_unplug_cb(HotplugHandler
*hotplug_dev
,
1477 DeviceState
*dev
, Error
**errp
)
1479 CPUArchId
*found_cpu
;
1480 Error
*local_err
= NULL
;
1481 X86CPU
*cpu
= X86_CPU(dev
);
1482 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1483 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
1485 hotplug_handler_unplug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1490 found_cpu
= pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, NULL
);
1491 found_cpu
->cpu
= NULL
;
1492 object_property_set_bool(OBJECT(dev
), false, "realized", NULL
);
1494 /* decrement the number of CPUs */
1496 /* Update the number of CPUs in CMOS */
1497 rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
1498 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
1500 error_propagate(errp
, local_err
);
1503 static void pc_cpu_pre_plug(HotplugHandler
*hotplug_dev
,
1504 DeviceState
*dev
, Error
**errp
)
1508 CPUArchId
*cpu_slot
;
1509 X86CPUTopoIDs topo_ids
;
1510 X86CPU
*cpu
= X86_CPU(dev
);
1511 CPUX86State
*env
= &cpu
->env
;
1512 MachineState
*ms
= MACHINE(hotplug_dev
);
1513 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1514 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
1515 unsigned int smp_cores
= ms
->smp
.cores
;
1516 unsigned int smp_threads
= ms
->smp
.threads
;
1517 X86CPUTopoInfo topo_info
;
1519 if(!object_dynamic_cast(OBJECT(cpu
), ms
->cpu_type
)) {
1520 error_setg(errp
, "Invalid CPU type, expected cpu type: '%s'",
1525 init_topo_info(&topo_info
, x86ms
);
1527 env
->nr_dies
= x86ms
->smp_dies
;
1528 env
->nr_nodes
= topo_info
.nodes_per_pkg
;
1531 * If APIC ID is not set,
1532 * set it based on socket/die/core/thread properties.
1534 if (cpu
->apic_id
== UNASSIGNED_APIC_ID
) {
1535 int max_socket
= (ms
->smp
.max_cpus
- 1) /
1536 smp_threads
/ smp_cores
/ x86ms
->smp_dies
;
1539 * die-id was optional in QEMU 4.0 and older, so keep it optional
1540 * if there's only one die per socket.
1542 if (cpu
->die_id
< 0 && x86ms
->smp_dies
== 1) {
1546 if (cpu
->socket_id
< 0) {
1547 error_setg(errp
, "CPU socket-id is not set");
1549 } else if (cpu
->socket_id
> max_socket
) {
1550 error_setg(errp
, "Invalid CPU socket-id: %u must be in range 0:%u",
1551 cpu
->socket_id
, max_socket
);
1554 if (cpu
->die_id
< 0) {
1555 error_setg(errp
, "CPU die-id is not set");
1557 } else if (cpu
->die_id
> x86ms
->smp_dies
- 1) {
1558 error_setg(errp
, "Invalid CPU die-id: %u must be in range 0:%u",
1559 cpu
->die_id
, x86ms
->smp_dies
- 1);
1562 if (cpu
->core_id
< 0) {
1563 error_setg(errp
, "CPU core-id is not set");
1565 } else if (cpu
->core_id
> (smp_cores
- 1)) {
1566 error_setg(errp
, "Invalid CPU core-id: %u must be in range 0:%u",
1567 cpu
->core_id
, smp_cores
- 1);
1570 if (cpu
->thread_id
< 0) {
1571 error_setg(errp
, "CPU thread-id is not set");
1573 } else if (cpu
->thread_id
> (smp_threads
- 1)) {
1574 error_setg(errp
, "Invalid CPU thread-id: %u must be in range 0:%u",
1575 cpu
->thread_id
, smp_threads
- 1);
1579 topo_ids
.pkg_id
= cpu
->socket_id
;
1580 topo_ids
.die_id
= cpu
->die_id
;
1581 topo_ids
.core_id
= cpu
->core_id
;
1582 topo_ids
.smt_id
= cpu
->thread_id
;
1583 cpu
->apic_id
= x86ms
->apicid_from_topo_ids(&topo_info
, &topo_ids
);
1586 cpu_slot
= pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, &idx
);
1588 MachineState
*ms
= MACHINE(pcms
);
1590 x86ms
->topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
1592 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
1593 " APIC ID %" PRIu32
", valid index range 0:%d",
1594 topo_ids
.pkg_id
, topo_ids
.die_id
, topo_ids
.core_id
, topo_ids
.smt_id
,
1595 cpu
->apic_id
, ms
->possible_cpus
->len
- 1);
1599 if (cpu_slot
->cpu
) {
1600 error_setg(errp
, "CPU[%d] with APIC ID %" PRIu32
" exists",
1605 /* if 'address' properties socket-id/core-id/thread-id are not set, set them
1606 * so that machine_query_hotpluggable_cpus would show correct values
1608 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
1609 * once -smp refactoring is complete and there will be CPU private
1610 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
1611 x86ms
->topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
1612 if (cpu
->socket_id
!= -1 && cpu
->socket_id
!= topo_ids
.pkg_id
) {
1613 error_setg(errp
, "property socket-id: %u doesn't match set apic-id:"
1614 " 0x%x (socket-id: %u)", cpu
->socket_id
, cpu
->apic_id
,
1618 cpu
->socket_id
= topo_ids
.pkg_id
;
1620 if (cpu
->die_id
!= -1 && cpu
->die_id
!= topo_ids
.die_id
) {
1621 error_setg(errp
, "property die-id: %u doesn't match set apic-id:"
1622 " 0x%x (die-id: %u)", cpu
->die_id
, cpu
->apic_id
, topo_ids
.die_id
);
1625 cpu
->die_id
= topo_ids
.die_id
;
1627 if (cpu
->core_id
!= -1 && cpu
->core_id
!= topo_ids
.core_id
) {
1628 error_setg(errp
, "property core-id: %u doesn't match set apic-id:"
1629 " 0x%x (core-id: %u)", cpu
->core_id
, cpu
->apic_id
,
1633 cpu
->core_id
= topo_ids
.core_id
;
1635 if (cpu
->thread_id
!= -1 && cpu
->thread_id
!= topo_ids
.smt_id
) {
1636 error_setg(errp
, "property thread-id: %u doesn't match set apic-id:"
1637 " 0x%x (thread-id: %u)", cpu
->thread_id
, cpu
->apic_id
,
1641 cpu
->thread_id
= topo_ids
.smt_id
;
1643 if (hyperv_feat_enabled(cpu
, HYPERV_FEAT_VPINDEX
) &&
1644 !kvm_hv_vpindex_settable()) {
1645 error_setg(errp
, "kernel doesn't allow setting HyperV VP_INDEX");
1650 cs
->cpu_index
= idx
;
1652 numa_cpu_pre_plug(cpu_slot
, dev
, errp
);
1655 static void pc_virtio_pmem_pci_pre_plug(HotplugHandler
*hotplug_dev
,
1656 DeviceState
*dev
, Error
**errp
)
1658 HotplugHandler
*hotplug_dev2
= qdev_get_bus_hotplug_handler(dev
);
1659 Error
*local_err
= NULL
;
1661 if (!hotplug_dev2
) {
1663 * Without a bus hotplug handler, we cannot control the plug/unplug
1664 * order. This should never be the case on x86, however better add
1667 error_setg(errp
, "virtio-pmem-pci not supported on this bus.");
1671 * First, see if we can plug this memory device at all. If that
1672 * succeeds, branch of to the actual hotplug handler.
1674 memory_device_pre_plug(MEMORY_DEVICE(dev
), MACHINE(hotplug_dev
), NULL
,
1677 hotplug_handler_pre_plug(hotplug_dev2
, dev
, &local_err
);
1679 error_propagate(errp
, local_err
);
1682 static void pc_virtio_pmem_pci_plug(HotplugHandler
*hotplug_dev
,
1683 DeviceState
*dev
, Error
**errp
)
1685 HotplugHandler
*hotplug_dev2
= qdev_get_bus_hotplug_handler(dev
);
1686 Error
*local_err
= NULL
;
1689 * Plug the memory device first and then branch off to the actual
1690 * hotplug handler. If that one fails, we can easily undo the memory
1693 memory_device_plug(MEMORY_DEVICE(dev
), MACHINE(hotplug_dev
));
1694 hotplug_handler_plug(hotplug_dev2
, dev
, &local_err
);
1696 memory_device_unplug(MEMORY_DEVICE(dev
), MACHINE(hotplug_dev
));
1698 error_propagate(errp
, local_err
);
1701 static void pc_virtio_pmem_pci_unplug_request(HotplugHandler
*hotplug_dev
,
1702 DeviceState
*dev
, Error
**errp
)
1704 /* We don't support virtio pmem hot unplug */
1705 error_setg(errp
, "virtio pmem device unplug not supported.");
1708 static void pc_virtio_pmem_pci_unplug(HotplugHandler
*hotplug_dev
,
1709 DeviceState
*dev
, Error
**errp
)
1711 /* We don't support virtio pmem hot unplug */
1714 static void pc_machine_device_pre_plug_cb(HotplugHandler
*hotplug_dev
,
1715 DeviceState
*dev
, Error
**errp
)
1717 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1718 pc_memory_pre_plug(hotplug_dev
, dev
, errp
);
1719 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1720 pc_cpu_pre_plug(hotplug_dev
, dev
, errp
);
1721 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
)) {
1722 pc_virtio_pmem_pci_pre_plug(hotplug_dev
, dev
, errp
);
1726 static void pc_machine_device_plug_cb(HotplugHandler
*hotplug_dev
,
1727 DeviceState
*dev
, Error
**errp
)
1729 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1730 pc_memory_plug(hotplug_dev
, dev
, errp
);
1731 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1732 pc_cpu_plug(hotplug_dev
, dev
, errp
);
1733 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
)) {
1734 pc_virtio_pmem_pci_plug(hotplug_dev
, dev
, errp
);
1738 static void pc_machine_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
1739 DeviceState
*dev
, Error
**errp
)
1741 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1742 pc_memory_unplug_request(hotplug_dev
, dev
, errp
);
1743 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1744 pc_cpu_unplug_request_cb(hotplug_dev
, dev
, errp
);
1745 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
)) {
1746 pc_virtio_pmem_pci_unplug_request(hotplug_dev
, dev
, errp
);
1748 error_setg(errp
, "acpi: device unplug request for not supported device"
1749 " type: %s", object_get_typename(OBJECT(dev
)));
1753 static void pc_machine_device_unplug_cb(HotplugHandler
*hotplug_dev
,
1754 DeviceState
*dev
, Error
**errp
)
1756 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1757 pc_memory_unplug(hotplug_dev
, dev
, errp
);
1758 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1759 pc_cpu_unplug_cb(hotplug_dev
, dev
, errp
);
1760 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
)) {
1761 pc_virtio_pmem_pci_unplug(hotplug_dev
, dev
, errp
);
1763 error_setg(errp
, "acpi: device unplug for not supported device"
1764 " type: %s", object_get_typename(OBJECT(dev
)));
1768 static HotplugHandler
*pc_get_hotplug_handler(MachineState
*machine
,
1771 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
1772 object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) ||
1773 object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
)) {
1774 return HOTPLUG_HANDLER(machine
);
1781 pc_machine_get_device_memory_region_size(Object
*obj
, Visitor
*v
,
1782 const char *name
, void *opaque
,
1785 MachineState
*ms
= MACHINE(obj
);
1788 if (ms
->device_memory
) {
1789 value
= memory_region_size(&ms
->device_memory
->mr
);
1792 visit_type_int(v
, name
, &value
, errp
);
1795 static void pc_machine_get_vmport(Object
*obj
, Visitor
*v
, const char *name
,
1796 void *opaque
, Error
**errp
)
1798 PCMachineState
*pcms
= PC_MACHINE(obj
);
1799 OnOffAuto vmport
= pcms
->vmport
;
1801 visit_type_OnOffAuto(v
, name
, &vmport
, errp
);
1804 static void pc_machine_set_vmport(Object
*obj
, Visitor
*v
, const char *name
,
1805 void *opaque
, Error
**errp
)
1807 PCMachineState
*pcms
= PC_MACHINE(obj
);
1809 visit_type_OnOffAuto(v
, name
, &pcms
->vmport
, errp
);
1812 static bool pc_machine_get_smbus(Object
*obj
, Error
**errp
)
1814 PCMachineState
*pcms
= PC_MACHINE(obj
);
1816 return pcms
->smbus_enabled
;
1819 static void pc_machine_set_smbus(Object
*obj
, bool value
, Error
**errp
)
1821 PCMachineState
*pcms
= PC_MACHINE(obj
);
1823 pcms
->smbus_enabled
= value
;
1826 static bool pc_machine_get_sata(Object
*obj
, Error
**errp
)
1828 PCMachineState
*pcms
= PC_MACHINE(obj
);
1830 return pcms
->sata_enabled
;
1833 static void pc_machine_set_sata(Object
*obj
, bool value
, Error
**errp
)
1835 PCMachineState
*pcms
= PC_MACHINE(obj
);
1837 pcms
->sata_enabled
= value
;
1840 static bool pc_machine_get_pit(Object
*obj
, Error
**errp
)
1842 PCMachineState
*pcms
= PC_MACHINE(obj
);
1844 return pcms
->pit_enabled
;
1847 static void pc_machine_set_pit(Object
*obj
, bool value
, Error
**errp
)
1849 PCMachineState
*pcms
= PC_MACHINE(obj
);
1851 pcms
->pit_enabled
= value
;
1854 static void pc_machine_initfn(Object
*obj
)
1856 PCMachineState
*pcms
= PC_MACHINE(obj
);
1858 #ifdef CONFIG_VMPORT
1859 pcms
->vmport
= ON_OFF_AUTO_AUTO
;
1861 pcms
->vmport
= ON_OFF_AUTO_OFF
;
1862 #endif /* CONFIG_VMPORT */
1863 /* acpi build is enabled by default if machine supports it */
1864 pcms
->acpi_build_enabled
= PC_MACHINE_GET_CLASS(pcms
)->has_acpi_build
;
1865 pcms
->smbus_enabled
= true;
1866 pcms
->sata_enabled
= true;
1867 pcms
->pit_enabled
= true;
1869 pc_system_flash_create(pcms
);
1872 static void pc_machine_reset(MachineState
*machine
)
1877 qemu_devices_reset();
1879 /* Reset APIC after devices have been reset to cancel
1880 * any changes that qemu_devices_reset() might have done.
1885 if (cpu
->apic_state
) {
1886 device_legacy_reset(cpu
->apic_state
);
1891 static void pc_machine_wakeup(MachineState
*machine
)
1893 cpu_synchronize_all_states();
1894 pc_machine_reset(machine
);
1895 cpu_synchronize_all_post_reset();
1898 static bool pc_hotplug_allowed(MachineState
*ms
, DeviceState
*dev
, Error
**errp
)
1900 X86IOMMUState
*iommu
= x86_iommu_get_default();
1901 IntelIOMMUState
*intel_iommu
;
1904 object_dynamic_cast((Object
*)iommu
, TYPE_INTEL_IOMMU_DEVICE
) &&
1905 object_dynamic_cast((Object
*)dev
, "vfio-pci")) {
1906 intel_iommu
= INTEL_IOMMU_DEVICE(iommu
);
1907 if (!intel_iommu
->caching_mode
) {
1908 error_setg(errp
, "Device assignment is not allowed without "
1909 "enabling caching-mode=on for Intel IOMMU.");
1917 static void pc_machine_class_init(ObjectClass
*oc
, void *data
)
1919 MachineClass
*mc
= MACHINE_CLASS(oc
);
1920 PCMachineClass
*pcmc
= PC_MACHINE_CLASS(oc
);
1921 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
1923 pcmc
->pci_enabled
= true;
1924 pcmc
->has_acpi_build
= true;
1925 pcmc
->rsdp_in_ram
= true;
1926 pcmc
->smbios_defaults
= true;
1927 pcmc
->smbios_uuid_encoded
= true;
1928 pcmc
->gigabyte_align
= true;
1929 pcmc
->has_reserved_memory
= true;
1930 pcmc
->kvmclock_enabled
= true;
1931 pcmc
->enforce_aligned_dimm
= true;
1932 /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported
1933 * to be used at the moment, 32K should be enough for a while. */
1934 pcmc
->acpi_data_size
= 0x20000 + 0x8000;
1935 pcmc
->linuxboot_dma_enabled
= true;
1936 pcmc
->pvh_enabled
= true;
1937 assert(!mc
->get_hotplug_handler
);
1938 mc
->get_hotplug_handler
= pc_get_hotplug_handler
;
1939 mc
->hotplug_allowed
= pc_hotplug_allowed
;
1940 mc
->cpu_index_to_instance_props
= x86_cpu_index_to_props
;
1941 mc
->get_default_cpu_node_id
= x86_get_default_cpu_node_id
;
1942 mc
->possible_cpu_arch_ids
= x86_possible_cpu_arch_ids
;
1943 mc
->auto_enable_numa_with_memhp
= true;
1944 mc
->has_hotpluggable_cpus
= true;
1945 mc
->default_boot_order
= "cad";
1946 mc
->hot_add_cpu
= pc_hot_add_cpu
;
1947 mc
->smp_parse
= pc_smp_parse
;
1948 mc
->block_default_type
= IF_IDE
;
1950 mc
->reset
= pc_machine_reset
;
1951 mc
->wakeup
= pc_machine_wakeup
;
1952 hc
->pre_plug
= pc_machine_device_pre_plug_cb
;
1953 hc
->plug
= pc_machine_device_plug_cb
;
1954 hc
->unplug_request
= pc_machine_device_unplug_request_cb
;
1955 hc
->unplug
= pc_machine_device_unplug_cb
;
1956 mc
->default_cpu_type
= TARGET_DEFAULT_CPU_TYPE
;
1957 mc
->nvdimm_supported
= true;
1958 mc
->numa_mem_supported
= true;
1959 mc
->default_ram_id
= "pc.ram";
1961 object_class_property_add(oc
, PC_MACHINE_DEVMEM_REGION_SIZE
, "int",
1962 pc_machine_get_device_memory_region_size
, NULL
,
1963 NULL
, NULL
, &error_abort
);
1965 object_class_property_add(oc
, PC_MACHINE_VMPORT
, "OnOffAuto",
1966 pc_machine_get_vmport
, pc_machine_set_vmport
,
1967 NULL
, NULL
, &error_abort
);
1968 object_class_property_set_description(oc
, PC_MACHINE_VMPORT
,
1969 "Enable vmport (pc & q35)", &error_abort
);
1971 object_class_property_add_bool(oc
, PC_MACHINE_SMBUS
,
1972 pc_machine_get_smbus
, pc_machine_set_smbus
, &error_abort
);
1974 object_class_property_add_bool(oc
, PC_MACHINE_SATA
,
1975 pc_machine_get_sata
, pc_machine_set_sata
, &error_abort
);
1977 object_class_property_add_bool(oc
, PC_MACHINE_PIT
,
1978 pc_machine_get_pit
, pc_machine_set_pit
, &error_abort
);
1981 static const TypeInfo pc_machine_info
= {
1982 .name
= TYPE_PC_MACHINE
,
1983 .parent
= TYPE_X86_MACHINE
,
1985 .instance_size
= sizeof(PCMachineState
),
1986 .instance_init
= pc_machine_initfn
,
1987 .class_size
= sizeof(PCMachineClass
),
1988 .class_init
= pc_machine_class_init
,
1989 .interfaces
= (InterfaceInfo
[]) {
1990 { TYPE_HOTPLUG_HANDLER
},
1995 static void pc_machine_register_types(void)
1997 type_register_static(&pc_machine_info
);
2000 type_init(pc_machine_register_types
)