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NUMA: Enable adding NUMA node implicitly
[mirror_qemu.git] / hw / i386 / pc_piix.c
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26
27 #include "hw/hw.h"
28 #include "hw/loader.h"
29 #include "hw/i386/pc.h"
30 #include "hw/i386/apic.h"
31 #include "hw/smbios/smbios.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_ids.h"
34 #include "hw/usb.h"
35 #include "net/net.h"
36 #include "hw/boards.h"
37 #include "hw/ide.h"
38 #include "sysemu/kvm.h"
39 #include "hw/kvm/clock.h"
40 #include "sysemu/sysemu.h"
41 #include "hw/sysbus.h"
42 #include "sysemu/arch_init.h"
43 #include "sysemu/block-backend.h"
44 #include "hw/i2c/smbus.h"
45 #include "hw/xen/xen.h"
46 #include "exec/memory.h"
47 #include "exec/address-spaces.h"
48 #include "hw/acpi/acpi.h"
49 #include "cpu.h"
50 #include "qemu/error-report.h"
51 #ifdef CONFIG_XEN
52 #include <xen/hvm/hvm_info_table.h>
53 #include "hw/xen/xen_pt.h"
54 #endif
55 #include "migration/global_state.h"
56 #include "migration/misc.h"
57 #include "kvm_i386.h"
58 #include "sysemu/numa.h"
59
60 #define MAX_IDE_BUS 2
61
62 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
63 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
64 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
65
66 /* PC hardware initialisation */
67 static void pc_init1(MachineState *machine,
68 const char *host_type, const char *pci_type)
69 {
70 PCMachineState *pcms = PC_MACHINE(machine);
71 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
72 MemoryRegion *system_memory = get_system_memory();
73 MemoryRegion *system_io = get_system_io();
74 int i;
75 PCIBus *pci_bus;
76 ISABus *isa_bus;
77 PCII440FXState *i440fx_state;
78 int piix3_devfn = -1;
79 qemu_irq *i8259;
80 qemu_irq smi_irq;
81 GSIState *gsi_state;
82 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
83 BusState *idebus[MAX_IDE_BUS];
84 ISADevice *rtc_state;
85 MemoryRegion *ram_memory;
86 MemoryRegion *pci_memory;
87 MemoryRegion *rom_memory;
88 ram_addr_t lowmem;
89
90 /*
91 * Calculate ram split, for memory below and above 4G. It's a bit
92 * complicated for backward compatibility reasons ...
93 *
94 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
95 * default value for max_ram_below_4g now.
96 *
97 * - Then, to gigabyte align the memory, we move the split to 3G
98 * (lowmem = 0xc0000000). But only in case we have to split in
99 * the first place, i.e. ram_size is larger than (traditional)
100 * lowmem. And for new machine types (gigabyte_align = true)
101 * only, for live migration compatibility reasons.
102 *
103 * - Next the max-ram-below-4g option was added, which allowed to
104 * reduce lowmem to a smaller value, to allow a larger PCI I/O
105 * window below 4G. qemu doesn't enforce gigabyte alignment here,
106 * but prints a warning.
107 *
108 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
109 * so legacy non-PAE guests can get as much memory as possible in
110 * the 32bit address space below 4G.
111 *
112 * - Note that Xen has its own ram setp code in xen_ram_init(),
113 * called via xen_hvm_init().
114 *
115 * Examples:
116 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
117 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
118 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
119 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
120 */
121 if (xen_enabled()) {
122 xen_hvm_init(pcms, &ram_memory);
123 } else {
124 if (!pcms->max_ram_below_4g) {
125 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
126 }
127 lowmem = pcms->max_ram_below_4g;
128 if (machine->ram_size >= pcms->max_ram_below_4g) {
129 if (pcmc->gigabyte_align) {
130 if (lowmem > 0xc0000000) {
131 lowmem = 0xc0000000;
132 }
133 if (lowmem & ((1ULL << 30) - 1)) {
134 warn_report("Large machine and max_ram_below_4g "
135 "(%" PRIu64 ") not a multiple of 1G; "
136 "possible bad performance.",
137 pcms->max_ram_below_4g);
138 }
139 }
140 }
141
142 if (machine->ram_size >= lowmem) {
143 pcms->above_4g_mem_size = machine->ram_size - lowmem;
144 pcms->below_4g_mem_size = lowmem;
145 } else {
146 pcms->above_4g_mem_size = 0;
147 pcms->below_4g_mem_size = machine->ram_size;
148 }
149 }
150
151 pc_cpus_init(pcms);
152
153 if (kvm_enabled() && pcmc->kvmclock_enabled) {
154 kvmclock_create();
155 }
156
157 if (pcmc->pci_enabled) {
158 pci_memory = g_new(MemoryRegion, 1);
159 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
160 rom_memory = pci_memory;
161 } else {
162 pci_memory = NULL;
163 rom_memory = system_memory;
164 }
165
166 pc_guest_info_init(pcms);
167
168 if (pcmc->smbios_defaults) {
169 MachineClass *mc = MACHINE_GET_CLASS(machine);
170 /* These values are guest ABI, do not change */
171 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
172 mc->name, pcmc->smbios_legacy_mode,
173 pcmc->smbios_uuid_encoded,
174 SMBIOS_ENTRY_POINT_21);
175 }
176
177 /* allocate ram and load rom/bios */
178 if (!xen_enabled()) {
179 pc_memory_init(pcms, system_memory,
180 rom_memory, &ram_memory);
181 } else if (machine->kernel_filename != NULL) {
182 /* For xen HVM direct kernel boot, load linux here */
183 xen_load_linux(pcms);
184 }
185
186 gsi_state = g_malloc0(sizeof(*gsi_state));
187 if (kvm_ioapic_in_kernel()) {
188 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
189 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
190 GSI_NUM_PINS);
191 } else {
192 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
193 }
194
195 if (pcmc->pci_enabled) {
196 pci_bus = i440fx_init(host_type,
197 pci_type,
198 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi,
199 system_memory, system_io, machine->ram_size,
200 pcms->below_4g_mem_size,
201 pcms->above_4g_mem_size,
202 pci_memory, ram_memory);
203 pcms->bus = pci_bus;
204 } else {
205 pci_bus = NULL;
206 i440fx_state = NULL;
207 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
208 &error_abort);
209 no_hpet = 1;
210 }
211 isa_bus_irqs(isa_bus, pcms->gsi);
212
213 if (kvm_pic_in_kernel()) {
214 i8259 = kvm_i8259_init(isa_bus);
215 } else if (xen_enabled()) {
216 i8259 = xen_interrupt_controller_init();
217 } else {
218 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
219 }
220
221 for (i = 0; i < ISA_NUM_IRQS; i++) {
222 gsi_state->i8259_irq[i] = i8259[i];
223 }
224 g_free(i8259);
225 if (pcmc->pci_enabled) {
226 ioapic_init_gsi(gsi_state, "i440fx");
227 }
228
229 pc_register_ferr_irq(pcms->gsi[13]);
230
231 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
232
233 assert(pcms->vmport != ON_OFF_AUTO__MAX);
234 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
235 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
236 }
237
238 /* init basic PC hardware */
239 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true,
240 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit, 0x4);
241
242 pc_nic_init(isa_bus, pci_bus);
243
244 ide_drive_get(hd, ARRAY_SIZE(hd));
245 if (pcmc->pci_enabled) {
246 PCIDevice *dev;
247 if (xen_enabled()) {
248 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
249 } else {
250 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
251 }
252 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
253 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
254 } else {
255 for(i = 0; i < MAX_IDE_BUS; i++) {
256 ISADevice *dev;
257 char busname[] = "ide.0";
258 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
259 ide_irq[i],
260 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
261 /*
262 * The ide bus name is ide.0 for the first bus and ide.1 for the
263 * second one.
264 */
265 busname[4] = '0' + i;
266 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
267 }
268 }
269
270 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
271
272 if (pcmc->pci_enabled && machine_usb(machine)) {
273 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
274 }
275
276 if (pcmc->pci_enabled && acpi_enabled) {
277 DeviceState *piix4_pm;
278 I2CBus *smbus;
279
280 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
281 /* TODO: Populate SPD eeprom data. */
282 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
283 pcms->gsi[9], smi_irq,
284 pc_machine_is_smm_enabled(pcms),
285 &piix4_pm);
286 smbus_eeprom_init(smbus, 8, NULL, 0);
287
288 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
289 TYPE_HOTPLUG_HANDLER,
290 (Object **)&pcms->acpi_dev,
291 object_property_allow_set_link,
292 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
293 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
294 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
295 }
296
297 if (pcmc->pci_enabled) {
298 pc_pci_device_init(pci_bus);
299 }
300
301 if (pcms->acpi_nvdimm_state.is_enabled) {
302 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
303 pcms->fw_cfg, OBJECT(pcms));
304 }
305 }
306
307 /* Looking for a pc_compat_2_4() function? It doesn't exist.
308 * pc_compat_*() functions that run on machine-init time and
309 * change global QEMU state are deprecated. Please don't create
310 * one, and implement any pc-*-2.4 (and newer) compat code in
311 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
312 */
313
314 static void pc_compat_2_3(MachineState *machine)
315 {
316 PCMachineState *pcms = PC_MACHINE(machine);
317 if (kvm_enabled()) {
318 pcms->smm = ON_OFF_AUTO_OFF;
319 }
320 }
321
322 static void pc_compat_2_2(MachineState *machine)
323 {
324 pc_compat_2_3(machine);
325 machine->suppress_vmdesc = true;
326 }
327
328 static void pc_compat_2_1(MachineState *machine)
329 {
330 pc_compat_2_2(machine);
331 x86_cpu_change_kvm_default("svm", NULL);
332 }
333
334 static void pc_compat_2_0(MachineState *machine)
335 {
336 pc_compat_2_1(machine);
337 }
338
339 static void pc_compat_1_7(MachineState *machine)
340 {
341 pc_compat_2_0(machine);
342 x86_cpu_change_kvm_default("x2apic", NULL);
343 }
344
345 static void pc_compat_1_6(MachineState *machine)
346 {
347 pc_compat_1_7(machine);
348 }
349
350 static void pc_compat_1_5(MachineState *machine)
351 {
352 pc_compat_1_6(machine);
353 }
354
355 static void pc_compat_1_4(MachineState *machine)
356 {
357 pc_compat_1_5(machine);
358 }
359
360 static void pc_compat_1_3(MachineState *machine)
361 {
362 pc_compat_1_4(machine);
363 enable_compat_apic_id_mode();
364 }
365
366 /* PC compat function for pc-0.14 to pc-1.2 */
367 static void pc_compat_1_2(MachineState *machine)
368 {
369 pc_compat_1_3(machine);
370 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
371 }
372
373 /* PC compat function for pc-0.10 to pc-0.13 */
374 static void pc_compat_0_13(MachineState *machine)
375 {
376 pc_compat_1_2(machine);
377 }
378
379 static void pc_init_isa(MachineState *machine)
380 {
381 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
382 }
383
384 #ifdef CONFIG_XEN
385 static void pc_xen_hvm_init_pci(MachineState *machine)
386 {
387 const char *pci_type = has_igd_gfx_passthru ?
388 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
389
390 pc_init1(machine,
391 TYPE_I440FX_PCI_HOST_BRIDGE,
392 pci_type);
393 }
394
395 static void pc_xen_hvm_init(MachineState *machine)
396 {
397 PCIBus *bus;
398
399 if (!xen_enabled()) {
400 error_report("xenfv machine requires the xen accelerator");
401 exit(1);
402 }
403
404 pc_xen_hvm_init_pci(machine);
405
406 bus = pci_find_primary_bus();
407 if (bus != NULL) {
408 pci_create_simple(bus, -1, "xen-platform");
409 }
410 }
411 #endif
412
413 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
414 static void pc_init_##suffix(MachineState *machine) \
415 { \
416 void (*compat)(MachineState *m) = (compatfn); \
417 if (compat) { \
418 compat(machine); \
419 } \
420 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
421 TYPE_I440FX_PCI_DEVICE); \
422 } \
423 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
424
425 static void pc_i440fx_machine_options(MachineClass *m)
426 {
427 m->family = "pc_piix";
428 m->desc = "Standard PC (i440FX + PIIX, 1996)";
429 m->default_machine_opts = "firmware=bios-256k.bin";
430 m->default_display = "std";
431 }
432
433 static void pc_i440fx_2_11_machine_options(MachineClass *m)
434 {
435 pc_i440fx_machine_options(m);
436 m->alias = "pc";
437 m->is_default = 1;
438 }
439
440 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
441 pc_i440fx_2_11_machine_options);
442
443 static void pc_i440fx_2_10_machine_options(MachineClass *m)
444 {
445 pc_i440fx_2_11_machine_options(m);
446 m->is_default = 0;
447 m->alias = NULL;
448 SET_MACHINE_COMPAT(m, PC_COMPAT_2_10);
449 m->auto_enable_numa_with_memhp = false;
450 }
451
452 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
453 pc_i440fx_2_10_machine_options);
454
455 static void pc_i440fx_2_9_machine_options(MachineClass *m)
456 {
457 pc_i440fx_2_10_machine_options(m);
458 SET_MACHINE_COMPAT(m, PC_COMPAT_2_9);
459 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
460 }
461
462 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
463 pc_i440fx_2_9_machine_options);
464
465 static void pc_i440fx_2_8_machine_options(MachineClass *m)
466 {
467 pc_i440fx_2_9_machine_options(m);
468 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8);
469 }
470
471 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
472 pc_i440fx_2_8_machine_options);
473
474
475 static void pc_i440fx_2_7_machine_options(MachineClass *m)
476 {
477 pc_i440fx_2_8_machine_options(m);
478 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7);
479 }
480
481 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
482 pc_i440fx_2_7_machine_options);
483
484
485 static void pc_i440fx_2_6_machine_options(MachineClass *m)
486 {
487 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
488 pc_i440fx_2_7_machine_options(m);
489 pcmc->legacy_cpu_hotplug = true;
490 pcmc->linuxboot_dma_enabled = false;
491 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
492 }
493
494 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
495 pc_i440fx_2_6_machine_options);
496
497
498 static void pc_i440fx_2_5_machine_options(MachineClass *m)
499 {
500 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
501 pc_i440fx_2_6_machine_options(m);
502 pcmc->save_tsc_khz = false;
503 m->legacy_fw_cfg_order = 1;
504 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
505 }
506
507 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
508 pc_i440fx_2_5_machine_options);
509
510
511 static void pc_i440fx_2_4_machine_options(MachineClass *m)
512 {
513 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
514 pc_i440fx_2_5_machine_options(m);
515 m->hw_version = "2.4.0";
516 pcmc->broken_reserved_end = true;
517 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
518 }
519
520 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
521 pc_i440fx_2_4_machine_options)
522
523
524 static void pc_i440fx_2_3_machine_options(MachineClass *m)
525 {
526 pc_i440fx_2_4_machine_options(m);
527 m->hw_version = "2.3.0";
528 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
529 }
530
531 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3,
532 pc_i440fx_2_3_machine_options);
533
534
535 static void pc_i440fx_2_2_machine_options(MachineClass *m)
536 {
537 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
538 pc_i440fx_2_3_machine_options(m);
539 m->hw_version = "2.2.0";
540 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
541 pcmc->rsdp_in_ram = false;
542 }
543
544 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2,
545 pc_i440fx_2_2_machine_options);
546
547
548 static void pc_i440fx_2_1_machine_options(MachineClass *m)
549 {
550 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
551 pc_i440fx_2_2_machine_options(m);
552 m->hw_version = "2.1.0";
553 m->default_display = NULL;
554 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
555 pcmc->smbios_uuid_encoded = false;
556 pcmc->enforce_aligned_dimm = false;
557 }
558
559 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1,
560 pc_i440fx_2_1_machine_options);
561
562
563
564 static void pc_i440fx_2_0_machine_options(MachineClass *m)
565 {
566 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
567 pc_i440fx_2_1_machine_options(m);
568 m->hw_version = "2.0.0";
569 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
570 pcmc->smbios_legacy_mode = true;
571 pcmc->has_reserved_memory = false;
572 /* This value depends on the actual DSDT and SSDT compiled into
573 * the source QEMU; unfortunately it depends on the binary and
574 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
575 * both QEMU 1.7 and QEMU 2.0.
576 *
577 * Large variations cause migration to fail for more than one
578 * consecutive value of the "-smp" maxcpus option.
579 *
580 * For small variations of the kind caused by different iasl versions,
581 * the 4k rounding usually leaves slack. However, there could be still
582 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
583 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
584 *
585 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
586 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
587 */
588 pcmc->legacy_acpi_table_size = 6652;
589 pcmc->acpi_data_size = 0x10000;
590 }
591
592 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0,
593 pc_i440fx_2_0_machine_options);
594
595
596 static void pc_i440fx_1_7_machine_options(MachineClass *m)
597 {
598 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
599 pc_i440fx_2_0_machine_options(m);
600 m->hw_version = "1.7.0";
601 m->default_machine_opts = NULL;
602 m->option_rom_has_mr = true;
603 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
604 pcmc->smbios_defaults = false;
605 pcmc->gigabyte_align = false;
606 pcmc->legacy_acpi_table_size = 6414;
607 }
608
609 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7,
610 pc_i440fx_1_7_machine_options);
611
612
613 static void pc_i440fx_1_6_machine_options(MachineClass *m)
614 {
615 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
616 pc_i440fx_1_7_machine_options(m);
617 m->hw_version = "1.6.0";
618 m->rom_file_has_mr = false;
619 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
620 pcmc->has_acpi_build = false;
621 }
622
623 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6,
624 pc_i440fx_1_6_machine_options);
625
626
627 static void pc_i440fx_1_5_machine_options(MachineClass *m)
628 {
629 pc_i440fx_1_6_machine_options(m);
630 m->hw_version = "1.5.0";
631 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
632 }
633
634 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5,
635 pc_i440fx_1_5_machine_options);
636
637
638 static void pc_i440fx_1_4_machine_options(MachineClass *m)
639 {
640 pc_i440fx_1_5_machine_options(m);
641 m->hw_version = "1.4.0";
642 m->hot_add_cpu = NULL;
643 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
644 }
645
646 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4,
647 pc_i440fx_1_4_machine_options);
648
649
650 #define PC_COMPAT_1_3 \
651 PC_CPU_MODEL_IDS("1.3.0") \
652 {\
653 .driver = "usb-tablet",\
654 .property = "usb_version",\
655 .value = stringify(1),\
656 },{\
657 .driver = "virtio-net-pci",\
658 .property = "ctrl_mac_addr",\
659 .value = "off", \
660 },{ \
661 .driver = "virtio-net-pci", \
662 .property = "mq", \
663 .value = "off", \
664 }, {\
665 .driver = "e1000",\
666 .property = "autonegotiation",\
667 .value = "off",\
668 },
669
670
671 static void pc_i440fx_1_3_machine_options(MachineClass *m)
672 {
673 pc_i440fx_1_4_machine_options(m);
674 m->hw_version = "1.3.0";
675 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3);
676 }
677
678 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
679 pc_i440fx_1_3_machine_options);
680
681
682 #define PC_COMPAT_1_2 \
683 PC_CPU_MODEL_IDS("1.2.0") \
684 {\
685 .driver = "nec-usb-xhci",\
686 .property = "msi",\
687 .value = "off",\
688 },{\
689 .driver = "nec-usb-xhci",\
690 .property = "msix",\
691 .value = "off",\
692 },{\
693 .driver = "ivshmem",\
694 .property = "use64",\
695 .value = "0",\
696 },{\
697 .driver = "qxl",\
698 .property = "revision",\
699 .value = stringify(3),\
700 },{\
701 .driver = "qxl-vga",\
702 .property = "revision",\
703 .value = stringify(3),\
704 },{\
705 .driver = "VGA",\
706 .property = "mmio",\
707 .value = "off",\
708 },
709
710 static void pc_i440fx_1_2_machine_options(MachineClass *m)
711 {
712 pc_i440fx_1_3_machine_options(m);
713 m->hw_version = "1.2.0";
714 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2);
715 }
716
717 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
718 pc_i440fx_1_2_machine_options);
719
720
721 #define PC_COMPAT_1_1 \
722 PC_CPU_MODEL_IDS("1.1.0") \
723 {\
724 .driver = "virtio-scsi-pci",\
725 .property = "hotplug",\
726 .value = "off",\
727 },{\
728 .driver = "virtio-scsi-pci",\
729 .property = "param_change",\
730 .value = "off",\
731 },{\
732 .driver = "VGA",\
733 .property = "vgamem_mb",\
734 .value = stringify(8),\
735 },{\
736 .driver = "vmware-svga",\
737 .property = "vgamem_mb",\
738 .value = stringify(8),\
739 },{\
740 .driver = "qxl-vga",\
741 .property = "vgamem_mb",\
742 .value = stringify(8),\
743 },{\
744 .driver = "qxl",\
745 .property = "vgamem_mb",\
746 .value = stringify(8),\
747 },{\
748 .driver = "virtio-blk-pci",\
749 .property = "config-wce",\
750 .value = "off",\
751 },
752
753 static void pc_i440fx_1_1_machine_options(MachineClass *m)
754 {
755 pc_i440fx_1_2_machine_options(m);
756 m->hw_version = "1.1.0";
757 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1);
758 }
759
760 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
761 pc_i440fx_1_1_machine_options);
762
763
764 #define PC_COMPAT_1_0 \
765 PC_CPU_MODEL_IDS("1.0") \
766 {\
767 .driver = TYPE_ISA_FDC,\
768 .property = "check_media_rate",\
769 .value = "off",\
770 }, {\
771 .driver = "virtio-balloon-pci",\
772 .property = "class",\
773 .value = stringify(PCI_CLASS_MEMORY_RAM),\
774 },{\
775 .driver = "apic-common",\
776 .property = "vapic",\
777 .value = "off",\
778 },{\
779 .driver = TYPE_USB_DEVICE,\
780 .property = "full-path",\
781 .value = "no",\
782 },
783
784 static void pc_i440fx_1_0_machine_options(MachineClass *m)
785 {
786 pc_i440fx_1_1_machine_options(m);
787 m->hw_version = "1.0";
788 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0);
789 }
790
791 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
792 pc_i440fx_1_0_machine_options);
793
794
795 #define PC_COMPAT_0_15 \
796 PC_CPU_MODEL_IDS("0.15")
797
798 static void pc_i440fx_0_15_machine_options(MachineClass *m)
799 {
800 pc_i440fx_1_0_machine_options(m);
801 m->hw_version = "0.15";
802 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15);
803 }
804
805 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
806 pc_i440fx_0_15_machine_options);
807
808
809 #define PC_COMPAT_0_14 \
810 PC_CPU_MODEL_IDS("0.14") \
811 {\
812 .driver = "virtio-blk-pci",\
813 .property = "event_idx",\
814 .value = "off",\
815 },{\
816 .driver = "virtio-serial-pci",\
817 .property = "event_idx",\
818 .value = "off",\
819 },{\
820 .driver = "virtio-net-pci",\
821 .property = "event_idx",\
822 .value = "off",\
823 },{\
824 .driver = "virtio-balloon-pci",\
825 .property = "event_idx",\
826 .value = "off",\
827 },{\
828 .driver = "qxl",\
829 .property = "revision",\
830 .value = stringify(2),\
831 },{\
832 .driver = "qxl-vga",\
833 .property = "revision",\
834 .value = stringify(2),\
835 },
836
837 static void pc_i440fx_0_14_machine_options(MachineClass *m)
838 {
839 pc_i440fx_0_15_machine_options(m);
840 m->hw_version = "0.14";
841 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14);
842 }
843
844 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
845 pc_i440fx_0_14_machine_options);
846
847
848 #define PC_COMPAT_0_13 \
849 PC_CPU_MODEL_IDS("0.13") \
850 {\
851 .driver = TYPE_PCI_DEVICE,\
852 .property = "command_serr_enable",\
853 .value = "off",\
854 },{\
855 .driver = "AC97",\
856 .property = "use_broken_id",\
857 .value = stringify(1),\
858 },{\
859 .driver = "virtio-9p-pci",\
860 .property = "vectors",\
861 .value = stringify(0),\
862 },{\
863 .driver = "VGA",\
864 .property = "rombar",\
865 .value = stringify(0),\
866 },{\
867 .driver = "vmware-svga",\
868 .property = "rombar",\
869 .value = stringify(0),\
870 },
871
872 static void pc_i440fx_0_13_machine_options(MachineClass *m)
873 {
874 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
875 pc_i440fx_0_14_machine_options(m);
876 m->hw_version = "0.13";
877 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13);
878 pcmc->kvmclock_enabled = false;
879 }
880
881 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
882 pc_i440fx_0_13_machine_options);
883
884
885 #define PC_COMPAT_0_12 \
886 PC_CPU_MODEL_IDS("0.12") \
887 {\
888 .driver = "virtio-serial-pci",\
889 .property = "max_ports",\
890 .value = stringify(1),\
891 },{\
892 .driver = "virtio-serial-pci",\
893 .property = "vectors",\
894 .value = stringify(0),\
895 },{\
896 .driver = "usb-mouse",\
897 .property = "serial",\
898 .value = "1",\
899 },{\
900 .driver = "usb-tablet",\
901 .property = "serial",\
902 .value = "1",\
903 },{\
904 .driver = "usb-kbd",\
905 .property = "serial",\
906 .value = "1",\
907 },
908
909 static void pc_i440fx_0_12_machine_options(MachineClass *m)
910 {
911 pc_i440fx_0_13_machine_options(m);
912 m->hw_version = "0.12";
913 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12);
914 }
915
916 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
917 pc_i440fx_0_12_machine_options);
918
919
920 #define PC_COMPAT_0_11 \
921 PC_CPU_MODEL_IDS("0.11") \
922 {\
923 .driver = "virtio-blk-pci",\
924 .property = "vectors",\
925 .value = stringify(0),\
926 },{\
927 .driver = TYPE_PCI_DEVICE,\
928 .property = "rombar",\
929 .value = stringify(0),\
930 },{\
931 .driver = "ide-drive",\
932 .property = "ver",\
933 .value = "0.11",\
934 },{\
935 .driver = "scsi-disk",\
936 .property = "ver",\
937 .value = "0.11",\
938 },
939
940 static void pc_i440fx_0_11_machine_options(MachineClass *m)
941 {
942 pc_i440fx_0_12_machine_options(m);
943 m->hw_version = "0.11";
944 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11);
945 }
946
947 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13,
948 pc_i440fx_0_11_machine_options);
949
950
951 #define PC_COMPAT_0_10 \
952 PC_CPU_MODEL_IDS("0.10") \
953 {\
954 .driver = "virtio-blk-pci",\
955 .property = "class",\
956 .value = stringify(PCI_CLASS_STORAGE_OTHER),\
957 },{\
958 .driver = "virtio-serial-pci",\
959 .property = "class",\
960 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\
961 },{\
962 .driver = "virtio-net-pci",\
963 .property = "vectors",\
964 .value = stringify(0),\
965 },{\
966 .driver = "ide-drive",\
967 .property = "ver",\
968 .value = "0.10",\
969 },{\
970 .driver = "scsi-disk",\
971 .property = "ver",\
972 .value = "0.10",\
973 },
974
975 static void pc_i440fx_0_10_machine_options(MachineClass *m)
976 {
977 pc_i440fx_0_11_machine_options(m);
978 m->hw_version = "0.10";
979 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10);
980 }
981
982 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13,
983 pc_i440fx_0_10_machine_options);
984
985 typedef struct {
986 uint16_t gpu_device_id;
987 uint16_t pch_device_id;
988 uint8_t pch_revision_id;
989 } IGDDeviceIDInfo;
990
991 /* In real world different GPU should have different PCH. But actually
992 * the different PCH DIDs likely map to different PCH SKUs. We do the
993 * same thing for the GPU. For PCH, the different SKUs are going to be
994 * all the same silicon design and implementation, just different
995 * features turn on and off with fuses. The SW interfaces should be
996 * consistent across all SKUs in a given family (eg LPT). But just same
997 * features may not be supported.
998 *
999 * Most of these different PCH features probably don't matter to the
1000 * Gfx driver, but obviously any difference in display port connections
1001 * will so it should be fine with any PCH in case of passthrough.
1002 *
1003 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
1004 * scenarios, 0x9cc3 for BDW(Broadwell).
1005 */
1006 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
1007 /* HSW Classic */
1008 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
1009 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
1010 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
1011 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
1012 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
1013 /* HSW ULT */
1014 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
1015 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
1016 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
1017 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
1018 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
1019 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
1020 /* HSW CRW */
1021 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
1022 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
1023 /* HSW Server */
1024 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
1025 /* HSW SRVR */
1026 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
1027 /* BSW */
1028 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
1029 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
1030 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
1031 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
1032 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
1033 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
1034 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
1035 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
1036 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
1037 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
1038 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
1039 };
1040
1041 static void isa_bridge_class_init(ObjectClass *klass, void *data)
1042 {
1043 DeviceClass *dc = DEVICE_CLASS(klass);
1044 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1045
1046 dc->desc = "ISA bridge faked to support IGD PT";
1047 k->vendor_id = PCI_VENDOR_ID_INTEL;
1048 k->class_id = PCI_CLASS_BRIDGE_ISA;
1049 };
1050
1051 static TypeInfo isa_bridge_info = {
1052 .name = "igd-passthrough-isa-bridge",
1053 .parent = TYPE_PCI_DEVICE,
1054 .instance_size = sizeof(PCIDevice),
1055 .class_init = isa_bridge_class_init,
1056 .interfaces = (InterfaceInfo[]) {
1057 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1058 { },
1059 },
1060 };
1061
1062 static void pt_graphics_register_types(void)
1063 {
1064 type_register_static(&isa_bridge_info);
1065 }
1066 type_init(pt_graphics_register_types)
1067
1068 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
1069 {
1070 struct PCIDevice *bridge_dev;
1071 int i, num;
1072 uint16_t pch_dev_id = 0xffff;
1073 uint8_t pch_rev_id;
1074
1075 num = ARRAY_SIZE(igd_combo_id_infos);
1076 for (i = 0; i < num; i++) {
1077 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
1078 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
1079 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
1080 }
1081 }
1082
1083 if (pch_dev_id == 0xffff) {
1084 return;
1085 }
1086
1087 /* Currently IGD drivers always need to access PCH by 1f.0. */
1088 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
1089 "igd-passthrough-isa-bridge");
1090
1091 /*
1092 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
1093 */
1094 if (!bridge_dev) {
1095 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
1096 return;
1097 }
1098 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
1099 pci_config_set_revision(bridge_dev->config, pch_rev_id);
1100 }
1101
1102 static void isapc_machine_options(MachineClass *m)
1103 {
1104 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
1105 m->desc = "ISA-only PC";
1106 m->max_cpus = 1;
1107 m->option_rom_has_mr = true;
1108 m->rom_file_has_mr = false;
1109 pcmc->pci_enabled = false;
1110 pcmc->has_acpi_build = false;
1111 pcmc->smbios_defaults = false;
1112 pcmc->gigabyte_align = false;
1113 pcmc->smbios_legacy_mode = true;
1114 pcmc->has_reserved_memory = false;
1115 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
1116 }
1117
1118 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1119 isapc_machine_options);
1120
1121
1122 #ifdef CONFIG_XEN
1123 static void xenfv_machine_options(MachineClass *m)
1124 {
1125 m->desc = "Xen Fully-virtualized PC";
1126 m->max_cpus = HVM_MAX_VCPUS;
1127 m->default_machine_opts = "accel=xen";
1128 }
1129
1130 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1131 xenfv_machine_options);
1132 #endif
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