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1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26
27 #include "hw/hw.h"
28 #include "hw/loader.h"
29 #include "hw/i386/pc.h"
30 #include "hw/i386/apic.h"
31 #include "hw/smbios/smbios.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_ids.h"
34 #include "hw/usb.h"
35 #include "net/net.h"
36 #include "hw/boards.h"
37 #include "hw/ide.h"
38 #include "sysemu/kvm.h"
39 #include "hw/kvm/clock.h"
40 #include "sysemu/sysemu.h"
41 #include "hw/sysbus.h"
42 #include "sysemu/arch_init.h"
43 #include "sysemu/block-backend.h"
44 #include "hw/i2c/smbus.h"
45 #include "hw/xen/xen.h"
46 #include "exec/memory.h"
47 #include "exec/address-spaces.h"
48 #include "hw/acpi/acpi.h"
49 #include "cpu.h"
50 #include "qemu/error-report.h"
51 #ifdef CONFIG_XEN
52 #include <xen/hvm/hvm_info_table.h>
53 #include "hw/xen/xen_pt.h"
54 #endif
55 #include "migration/migration.h"
56 #include "kvm_i386.h"
57
58 #define MAX_IDE_BUS 2
59
60 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
61 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
62 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
63
64 /* PC hardware initialisation */
65 static void pc_init1(MachineState *machine,
66 const char *host_type, const char *pci_type)
67 {
68 PCMachineState *pcms = PC_MACHINE(machine);
69 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
70 MemoryRegion *system_memory = get_system_memory();
71 MemoryRegion *system_io = get_system_io();
72 int i;
73 PCIBus *pci_bus;
74 ISABus *isa_bus;
75 PCII440FXState *i440fx_state;
76 int piix3_devfn = -1;
77 qemu_irq *i8259;
78 qemu_irq smi_irq;
79 GSIState *gsi_state;
80 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
81 BusState *idebus[MAX_IDE_BUS];
82 ISADevice *rtc_state;
83 MemoryRegion *ram_memory;
84 MemoryRegion *pci_memory;
85 MemoryRegion *rom_memory;
86 ram_addr_t lowmem;
87
88 /*
89 * Calculate ram split, for memory below and above 4G. It's a bit
90 * complicated for backward compatibility reasons ...
91 *
92 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
93 * default value for max_ram_below_4g now.
94 *
95 * - Then, to gigabyte align the memory, we move the split to 3G
96 * (lowmem = 0xc0000000). But only in case we have to split in
97 * the first place, i.e. ram_size is larger than (traditional)
98 * lowmem. And for new machine types (gigabyte_align = true)
99 * only, for live migration compatibility reasons.
100 *
101 * - Next the max-ram-below-4g option was added, which allowed to
102 * reduce lowmem to a smaller value, to allow a larger PCI I/O
103 * window below 4G. qemu doesn't enforce gigabyte alignment here,
104 * but prints a warning.
105 *
106 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
107 * so legacy non-PAE guests can get as much memory as possible in
108 * the 32bit address space below 4G.
109 *
110 * - Note that Xen has its own ram setp code in xen_ram_init(),
111 * called via xen_hvm_init().
112 *
113 * Examples:
114 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
115 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
116 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
117 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
118 */
119 if (xen_enabled()) {
120 xen_hvm_init(pcms, &ram_memory);
121 } else {
122 if (!pcms->max_ram_below_4g) {
123 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
124 }
125 lowmem = pcms->max_ram_below_4g;
126 if (machine->ram_size >= pcms->max_ram_below_4g) {
127 if (pcmc->gigabyte_align) {
128 if (lowmem > 0xc0000000) {
129 lowmem = 0xc0000000;
130 }
131 if (lowmem & ((1ULL << 30) - 1)) {
132 error_report("Warning: Large machine and max_ram_below_4g "
133 "(%" PRIu64 ") not a multiple of 1G; "
134 "possible bad performance.",
135 pcms->max_ram_below_4g);
136 }
137 }
138 }
139
140 if (machine->ram_size >= lowmem) {
141 pcms->above_4g_mem_size = machine->ram_size - lowmem;
142 pcms->below_4g_mem_size = lowmem;
143 } else {
144 pcms->above_4g_mem_size = 0;
145 pcms->below_4g_mem_size = machine->ram_size;
146 }
147 }
148
149 pc_cpus_init(pcms);
150
151 if (kvm_enabled() && pcmc->kvmclock_enabled) {
152 kvmclock_create();
153 }
154
155 if (pcmc->pci_enabled) {
156 pci_memory = g_new(MemoryRegion, 1);
157 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
158 rom_memory = pci_memory;
159 } else {
160 pci_memory = NULL;
161 rom_memory = system_memory;
162 }
163
164 pc_guest_info_init(pcms);
165
166 if (pcmc->smbios_defaults) {
167 MachineClass *mc = MACHINE_GET_CLASS(machine);
168 /* These values are guest ABI, do not change */
169 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
170 mc->name, pcmc->smbios_legacy_mode,
171 pcmc->smbios_uuid_encoded,
172 SMBIOS_ENTRY_POINT_21);
173 }
174
175 /* allocate ram and load rom/bios */
176 if (!xen_enabled()) {
177 pc_memory_init(pcms, system_memory,
178 rom_memory, &ram_memory);
179 } else if (machine->kernel_filename != NULL) {
180 /* For xen HVM direct kernel boot, load linux here */
181 xen_load_linux(pcms);
182 }
183
184 gsi_state = g_malloc0(sizeof(*gsi_state));
185 if (kvm_ioapic_in_kernel()) {
186 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
187 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
188 GSI_NUM_PINS);
189 } else {
190 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
191 }
192
193 if (pcmc->pci_enabled) {
194 pci_bus = i440fx_init(host_type,
195 pci_type,
196 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi,
197 system_memory, system_io, machine->ram_size,
198 pcms->below_4g_mem_size,
199 pcms->above_4g_mem_size,
200 pci_memory, ram_memory);
201 pcms->bus = pci_bus;
202 } else {
203 pci_bus = NULL;
204 i440fx_state = NULL;
205 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
206 &error_abort);
207 no_hpet = 1;
208 }
209 isa_bus_irqs(isa_bus, pcms->gsi);
210
211 if (kvm_pic_in_kernel()) {
212 i8259 = kvm_i8259_init(isa_bus);
213 } else if (xen_enabled()) {
214 i8259 = xen_interrupt_controller_init();
215 } else {
216 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
217 }
218
219 for (i = 0; i < ISA_NUM_IRQS; i++) {
220 gsi_state->i8259_irq[i] = i8259[i];
221 }
222 g_free(i8259);
223 if (pcmc->pci_enabled) {
224 ioapic_init_gsi(gsi_state, "i440fx");
225 }
226
227 pc_register_ferr_irq(pcms->gsi[13]);
228
229 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
230
231 assert(pcms->vmport != ON_OFF_AUTO__MAX);
232 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
233 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
234 }
235
236 /* init basic PC hardware */
237 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true,
238 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit, 0x4);
239
240 pc_nic_init(isa_bus, pci_bus);
241
242 ide_drive_get(hd, ARRAY_SIZE(hd));
243 if (pcmc->pci_enabled) {
244 PCIDevice *dev;
245 if (xen_enabled()) {
246 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
247 } else {
248 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
249 }
250 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
251 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
252 } else {
253 for(i = 0; i < MAX_IDE_BUS; i++) {
254 ISADevice *dev;
255 char busname[] = "ide.0";
256 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
257 ide_irq[i],
258 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
259 /*
260 * The ide bus name is ide.0 for the first bus and ide.1 for the
261 * second one.
262 */
263 busname[4] = '0' + i;
264 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
265 }
266 }
267
268 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
269
270 if (pcmc->pci_enabled && machine_usb(machine)) {
271 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
272 }
273
274 if (pcmc->pci_enabled && acpi_enabled) {
275 DeviceState *piix4_pm;
276 I2CBus *smbus;
277
278 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
279 /* TODO: Populate SPD eeprom data. */
280 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
281 pcms->gsi[9], smi_irq,
282 pc_machine_is_smm_enabled(pcms),
283 &piix4_pm);
284 smbus_eeprom_init(smbus, 8, NULL, 0);
285
286 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
287 TYPE_HOTPLUG_HANDLER,
288 (Object **)&pcms->acpi_dev,
289 object_property_allow_set_link,
290 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
291 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
292 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
293 }
294
295 if (pcmc->pci_enabled) {
296 pc_pci_device_init(pci_bus);
297 }
298
299 if (pcms->acpi_nvdimm_state.is_enabled) {
300 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
301 pcms->fw_cfg, OBJECT(pcms));
302 }
303 }
304
305 /* Looking for a pc_compat_2_4() function? It doesn't exist.
306 * pc_compat_*() functions that run on machine-init time and
307 * change global QEMU state are deprecated. Please don't create
308 * one, and implement any pc-*-2.4 (and newer) compat code in
309 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
310 */
311
312 static void pc_compat_2_3(MachineState *machine)
313 {
314 PCMachineState *pcms = PC_MACHINE(machine);
315 savevm_skip_section_footers();
316 if (kvm_enabled()) {
317 pcms->smm = ON_OFF_AUTO_OFF;
318 }
319 global_state_set_optional();
320 savevm_skip_configuration();
321 }
322
323 static void pc_compat_2_2(MachineState *machine)
324 {
325 pc_compat_2_3(machine);
326 machine->suppress_vmdesc = true;
327 }
328
329 static void pc_compat_2_1(MachineState *machine)
330 {
331 pc_compat_2_2(machine);
332 x86_cpu_change_kvm_default("svm", NULL);
333 }
334
335 static void pc_compat_2_0(MachineState *machine)
336 {
337 pc_compat_2_1(machine);
338 }
339
340 static void pc_compat_1_7(MachineState *machine)
341 {
342 pc_compat_2_0(machine);
343 x86_cpu_change_kvm_default("x2apic", NULL);
344 }
345
346 static void pc_compat_1_6(MachineState *machine)
347 {
348 pc_compat_1_7(machine);
349 }
350
351 static void pc_compat_1_5(MachineState *machine)
352 {
353 pc_compat_1_6(machine);
354 }
355
356 static void pc_compat_1_4(MachineState *machine)
357 {
358 pc_compat_1_5(machine);
359 }
360
361 static void pc_compat_1_3(MachineState *machine)
362 {
363 pc_compat_1_4(machine);
364 enable_compat_apic_id_mode();
365 }
366
367 /* PC compat function for pc-0.14 to pc-1.2 */
368 static void pc_compat_1_2(MachineState *machine)
369 {
370 pc_compat_1_3(machine);
371 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
372 }
373
374 /* PC compat function for pc-0.10 to pc-0.13 */
375 static void pc_compat_0_13(MachineState *machine)
376 {
377 pc_compat_1_2(machine);
378 }
379
380 static void pc_init_isa(MachineState *machine)
381 {
382 if (!machine->cpu_model) {
383 machine->cpu_model = "486";
384 }
385 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
386 enable_compat_apic_id_mode();
387 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
388 }
389
390 #ifdef CONFIG_XEN
391 static void pc_xen_hvm_init_pci(MachineState *machine)
392 {
393 const char *pci_type = has_igd_gfx_passthru ?
394 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
395
396 pc_init1(machine,
397 TYPE_I440FX_PCI_HOST_BRIDGE,
398 pci_type);
399 }
400
401 static void pc_xen_hvm_init(MachineState *machine)
402 {
403 PCIBus *bus;
404
405 if (!xen_enabled()) {
406 error_report("xenfv machine requires the xen accelerator");
407 exit(1);
408 }
409
410 pc_xen_hvm_init_pci(machine);
411
412 bus = pci_find_primary_bus();
413 if (bus != NULL) {
414 pci_create_simple(bus, -1, "xen-platform");
415 }
416 }
417 #endif
418
419 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
420 static void pc_init_##suffix(MachineState *machine) \
421 { \
422 void (*compat)(MachineState *m) = (compatfn); \
423 if (compat) { \
424 compat(machine); \
425 } \
426 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
427 TYPE_I440FX_PCI_DEVICE); \
428 } \
429 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
430
431 static void pc_i440fx_machine_options(MachineClass *m)
432 {
433 m->family = "pc_piix";
434 m->desc = "Standard PC (i440FX + PIIX, 1996)";
435 m->hot_add_cpu = pc_hot_add_cpu;
436 m->default_machine_opts = "firmware=bios-256k.bin";
437 m->default_display = "std";
438 }
439
440 static void pc_i440fx_2_9_machine_options(MachineClass *m)
441 {
442 pc_i440fx_machine_options(m);
443 m->alias = "pc";
444 m->is_default = 1;
445 }
446
447 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
448 pc_i440fx_2_9_machine_options);
449
450 static void pc_i440fx_2_8_machine_options(MachineClass *m)
451 {
452 pc_i440fx_2_9_machine_options(m);
453 m->is_default = 0;
454 m->alias = NULL;
455 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8);
456 }
457
458 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
459 pc_i440fx_2_8_machine_options);
460
461
462 static void pc_i440fx_2_7_machine_options(MachineClass *m)
463 {
464 pc_i440fx_2_8_machine_options(m);
465 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7);
466 }
467
468 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
469 pc_i440fx_2_7_machine_options);
470
471
472 static void pc_i440fx_2_6_machine_options(MachineClass *m)
473 {
474 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
475 pc_i440fx_2_7_machine_options(m);
476 pcmc->legacy_cpu_hotplug = true;
477 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
478 }
479
480 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
481 pc_i440fx_2_6_machine_options);
482
483
484 static void pc_i440fx_2_5_machine_options(MachineClass *m)
485 {
486 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
487 pc_i440fx_2_6_machine_options(m);
488 pcmc->save_tsc_khz = false;
489 m->legacy_fw_cfg_order = 1;
490 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
491 }
492
493 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
494 pc_i440fx_2_5_machine_options);
495
496
497 static void pc_i440fx_2_4_machine_options(MachineClass *m)
498 {
499 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
500 pc_i440fx_2_5_machine_options(m);
501 m->hw_version = "2.4.0";
502 pcmc->broken_reserved_end = true;
503 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
504 }
505
506 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
507 pc_i440fx_2_4_machine_options)
508
509
510 static void pc_i440fx_2_3_machine_options(MachineClass *m)
511 {
512 pc_i440fx_2_4_machine_options(m);
513 m->hw_version = "2.3.0";
514 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
515 }
516
517 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3,
518 pc_i440fx_2_3_machine_options);
519
520
521 static void pc_i440fx_2_2_machine_options(MachineClass *m)
522 {
523 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
524 pc_i440fx_2_3_machine_options(m);
525 m->hw_version = "2.2.0";
526 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
527 pcmc->rsdp_in_ram = false;
528 }
529
530 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2,
531 pc_i440fx_2_2_machine_options);
532
533
534 static void pc_i440fx_2_1_machine_options(MachineClass *m)
535 {
536 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
537 pc_i440fx_2_2_machine_options(m);
538 m->hw_version = "2.1.0";
539 m->default_display = NULL;
540 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
541 pcmc->smbios_uuid_encoded = false;
542 pcmc->enforce_aligned_dimm = false;
543 }
544
545 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1,
546 pc_i440fx_2_1_machine_options);
547
548
549
550 static void pc_i440fx_2_0_machine_options(MachineClass *m)
551 {
552 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
553 pc_i440fx_2_1_machine_options(m);
554 m->hw_version = "2.0.0";
555 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
556 pcmc->smbios_legacy_mode = true;
557 pcmc->has_reserved_memory = false;
558 /* This value depends on the actual DSDT and SSDT compiled into
559 * the source QEMU; unfortunately it depends on the binary and
560 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
561 * both QEMU 1.7 and QEMU 2.0.
562 *
563 * Large variations cause migration to fail for more than one
564 * consecutive value of the "-smp" maxcpus option.
565 *
566 * For small variations of the kind caused by different iasl versions,
567 * the 4k rounding usually leaves slack. However, there could be still
568 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
569 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
570 *
571 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
572 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
573 */
574 pcmc->legacy_acpi_table_size = 6652;
575 pcmc->acpi_data_size = 0x10000;
576 }
577
578 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0,
579 pc_i440fx_2_0_machine_options);
580
581
582 static void pc_i440fx_1_7_machine_options(MachineClass *m)
583 {
584 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
585 pc_i440fx_2_0_machine_options(m);
586 m->hw_version = "1.7.0";
587 m->default_machine_opts = NULL;
588 m->option_rom_has_mr = true;
589 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
590 pcmc->smbios_defaults = false;
591 pcmc->gigabyte_align = false;
592 pcmc->legacy_acpi_table_size = 6414;
593 }
594
595 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7,
596 pc_i440fx_1_7_machine_options);
597
598
599 static void pc_i440fx_1_6_machine_options(MachineClass *m)
600 {
601 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
602 pc_i440fx_1_7_machine_options(m);
603 m->hw_version = "1.6.0";
604 m->rom_file_has_mr = false;
605 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
606 pcmc->has_acpi_build = false;
607 }
608
609 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6,
610 pc_i440fx_1_6_machine_options);
611
612
613 static void pc_i440fx_1_5_machine_options(MachineClass *m)
614 {
615 pc_i440fx_1_6_machine_options(m);
616 m->hw_version = "1.5.0";
617 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
618 }
619
620 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5,
621 pc_i440fx_1_5_machine_options);
622
623
624 static void pc_i440fx_1_4_machine_options(MachineClass *m)
625 {
626 pc_i440fx_1_5_machine_options(m);
627 m->hw_version = "1.4.0";
628 m->hot_add_cpu = NULL;
629 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
630 }
631
632 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4,
633 pc_i440fx_1_4_machine_options);
634
635
636 #define PC_COMPAT_1_3 \
637 PC_CPU_MODEL_IDS("1.3.0") \
638 {\
639 .driver = "usb-tablet",\
640 .property = "usb_version",\
641 .value = stringify(1),\
642 },{\
643 .driver = "virtio-net-pci",\
644 .property = "ctrl_mac_addr",\
645 .value = "off", \
646 },{ \
647 .driver = "virtio-net-pci", \
648 .property = "mq", \
649 .value = "off", \
650 }, {\
651 .driver = "e1000",\
652 .property = "autonegotiation",\
653 .value = "off",\
654 },
655
656
657 static void pc_i440fx_1_3_machine_options(MachineClass *m)
658 {
659 pc_i440fx_1_4_machine_options(m);
660 m->hw_version = "1.3.0";
661 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3);
662 }
663
664 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
665 pc_i440fx_1_3_machine_options);
666
667
668 #define PC_COMPAT_1_2 \
669 PC_CPU_MODEL_IDS("1.2.0") \
670 {\
671 .driver = "nec-usb-xhci",\
672 .property = "msi",\
673 .value = "off",\
674 },{\
675 .driver = "nec-usb-xhci",\
676 .property = "msix",\
677 .value = "off",\
678 },{\
679 .driver = "ivshmem",\
680 .property = "use64",\
681 .value = "0",\
682 },{\
683 .driver = "qxl",\
684 .property = "revision",\
685 .value = stringify(3),\
686 },{\
687 .driver = "qxl-vga",\
688 .property = "revision",\
689 .value = stringify(3),\
690 },{\
691 .driver = "VGA",\
692 .property = "mmio",\
693 .value = "off",\
694 },
695
696 static void pc_i440fx_1_2_machine_options(MachineClass *m)
697 {
698 pc_i440fx_1_3_machine_options(m);
699 m->hw_version = "1.2.0";
700 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2);
701 }
702
703 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
704 pc_i440fx_1_2_machine_options);
705
706
707 #define PC_COMPAT_1_1 \
708 PC_CPU_MODEL_IDS("1.1.0") \
709 {\
710 .driver = "virtio-scsi-pci",\
711 .property = "hotplug",\
712 .value = "off",\
713 },{\
714 .driver = "virtio-scsi-pci",\
715 .property = "param_change",\
716 .value = "off",\
717 },{\
718 .driver = "VGA",\
719 .property = "vgamem_mb",\
720 .value = stringify(8),\
721 },{\
722 .driver = "vmware-svga",\
723 .property = "vgamem_mb",\
724 .value = stringify(8),\
725 },{\
726 .driver = "qxl-vga",\
727 .property = "vgamem_mb",\
728 .value = stringify(8),\
729 },{\
730 .driver = "qxl",\
731 .property = "vgamem_mb",\
732 .value = stringify(8),\
733 },{\
734 .driver = "virtio-blk-pci",\
735 .property = "config-wce",\
736 .value = "off",\
737 },
738
739 static void pc_i440fx_1_1_machine_options(MachineClass *m)
740 {
741 pc_i440fx_1_2_machine_options(m);
742 m->hw_version = "1.1.0";
743 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1);
744 }
745
746 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
747 pc_i440fx_1_1_machine_options);
748
749
750 #define PC_COMPAT_1_0 \
751 PC_CPU_MODEL_IDS("1.0") \
752 {\
753 .driver = TYPE_ISA_FDC,\
754 .property = "check_media_rate",\
755 .value = "off",\
756 }, {\
757 .driver = "virtio-balloon-pci",\
758 .property = "class",\
759 .value = stringify(PCI_CLASS_MEMORY_RAM),\
760 },{\
761 .driver = "apic-common",\
762 .property = "vapic",\
763 .value = "off",\
764 },{\
765 .driver = TYPE_USB_DEVICE,\
766 .property = "full-path",\
767 .value = "no",\
768 },
769
770 static void pc_i440fx_1_0_machine_options(MachineClass *m)
771 {
772 pc_i440fx_1_1_machine_options(m);
773 m->hw_version = "1.0";
774 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0);
775 }
776
777 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
778 pc_i440fx_1_0_machine_options);
779
780
781 #define PC_COMPAT_0_15 \
782 PC_CPU_MODEL_IDS("0.15")
783
784 static void pc_i440fx_0_15_machine_options(MachineClass *m)
785 {
786 pc_i440fx_1_0_machine_options(m);
787 m->hw_version = "0.15";
788 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15);
789 }
790
791 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
792 pc_i440fx_0_15_machine_options);
793
794
795 #define PC_COMPAT_0_14 \
796 PC_CPU_MODEL_IDS("0.14") \
797 {\
798 .driver = "virtio-blk-pci",\
799 .property = "event_idx",\
800 .value = "off",\
801 },{\
802 .driver = "virtio-serial-pci",\
803 .property = "event_idx",\
804 .value = "off",\
805 },{\
806 .driver = "virtio-net-pci",\
807 .property = "event_idx",\
808 .value = "off",\
809 },{\
810 .driver = "virtio-balloon-pci",\
811 .property = "event_idx",\
812 .value = "off",\
813 },{\
814 .driver = "qxl",\
815 .property = "revision",\
816 .value = stringify(2),\
817 },{\
818 .driver = "qxl-vga",\
819 .property = "revision",\
820 .value = stringify(2),\
821 },
822
823 static void pc_i440fx_0_14_machine_options(MachineClass *m)
824 {
825 pc_i440fx_0_15_machine_options(m);
826 m->hw_version = "0.14";
827 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14);
828 }
829
830 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
831 pc_i440fx_0_14_machine_options);
832
833
834 #define PC_COMPAT_0_13 \
835 PC_CPU_MODEL_IDS("0.13") \
836 {\
837 .driver = TYPE_PCI_DEVICE,\
838 .property = "command_serr_enable",\
839 .value = "off",\
840 },{\
841 .driver = "AC97",\
842 .property = "use_broken_id",\
843 .value = stringify(1),\
844 },{\
845 .driver = "virtio-9p-pci",\
846 .property = "vectors",\
847 .value = stringify(0),\
848 },{\
849 .driver = "VGA",\
850 .property = "rombar",\
851 .value = stringify(0),\
852 },{\
853 .driver = "vmware-svga",\
854 .property = "rombar",\
855 .value = stringify(0),\
856 },
857
858 static void pc_i440fx_0_13_machine_options(MachineClass *m)
859 {
860 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
861 pc_i440fx_0_14_machine_options(m);
862 m->hw_version = "0.13";
863 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13);
864 pcmc->kvmclock_enabled = false;
865 }
866
867 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
868 pc_i440fx_0_13_machine_options);
869
870
871 #define PC_COMPAT_0_12 \
872 PC_CPU_MODEL_IDS("0.12") \
873 {\
874 .driver = "virtio-serial-pci",\
875 .property = "max_ports",\
876 .value = stringify(1),\
877 },{\
878 .driver = "virtio-serial-pci",\
879 .property = "vectors",\
880 .value = stringify(0),\
881 },{\
882 .driver = "usb-mouse",\
883 .property = "serial",\
884 .value = "1",\
885 },{\
886 .driver = "usb-tablet",\
887 .property = "serial",\
888 .value = "1",\
889 },{\
890 .driver = "usb-kbd",\
891 .property = "serial",\
892 .value = "1",\
893 },
894
895 static void pc_i440fx_0_12_machine_options(MachineClass *m)
896 {
897 pc_i440fx_0_13_machine_options(m);
898 m->hw_version = "0.12";
899 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12);
900 }
901
902 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
903 pc_i440fx_0_12_machine_options);
904
905
906 #define PC_COMPAT_0_11 \
907 PC_CPU_MODEL_IDS("0.11") \
908 {\
909 .driver = "virtio-blk-pci",\
910 .property = "vectors",\
911 .value = stringify(0),\
912 },{\
913 .driver = TYPE_PCI_DEVICE,\
914 .property = "rombar",\
915 .value = stringify(0),\
916 },{\
917 .driver = "ide-drive",\
918 .property = "ver",\
919 .value = "0.11",\
920 },{\
921 .driver = "scsi-disk",\
922 .property = "ver",\
923 .value = "0.11",\
924 },
925
926 static void pc_i440fx_0_11_machine_options(MachineClass *m)
927 {
928 pc_i440fx_0_12_machine_options(m);
929 m->hw_version = "0.11";
930 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11);
931 }
932
933 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13,
934 pc_i440fx_0_11_machine_options);
935
936
937 #define PC_COMPAT_0_10 \
938 PC_CPU_MODEL_IDS("0.10") \
939 {\
940 .driver = "virtio-blk-pci",\
941 .property = "class",\
942 .value = stringify(PCI_CLASS_STORAGE_OTHER),\
943 },{\
944 .driver = "virtio-serial-pci",\
945 .property = "class",\
946 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\
947 },{\
948 .driver = "virtio-net-pci",\
949 .property = "vectors",\
950 .value = stringify(0),\
951 },{\
952 .driver = "ide-drive",\
953 .property = "ver",\
954 .value = "0.10",\
955 },{\
956 .driver = "scsi-disk",\
957 .property = "ver",\
958 .value = "0.10",\
959 },
960
961 static void pc_i440fx_0_10_machine_options(MachineClass *m)
962 {
963 pc_i440fx_0_11_machine_options(m);
964 m->hw_version = "0.10";
965 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10);
966 }
967
968 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13,
969 pc_i440fx_0_10_machine_options);
970
971 typedef struct {
972 uint16_t gpu_device_id;
973 uint16_t pch_device_id;
974 uint8_t pch_revision_id;
975 } IGDDeviceIDInfo;
976
977 /* In real world different GPU should have different PCH. But actually
978 * the different PCH DIDs likely map to different PCH SKUs. We do the
979 * same thing for the GPU. For PCH, the different SKUs are going to be
980 * all the same silicon design and implementation, just different
981 * features turn on and off with fuses. The SW interfaces should be
982 * consistent across all SKUs in a given family (eg LPT). But just same
983 * features may not be supported.
984 *
985 * Most of these different PCH features probably don't matter to the
986 * Gfx driver, but obviously any difference in display port connections
987 * will so it should be fine with any PCH in case of passthrough.
988 *
989 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
990 * scenarios, 0x9cc3 for BDW(Broadwell).
991 */
992 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
993 /* HSW Classic */
994 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
995 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
996 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
997 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
998 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
999 /* HSW ULT */
1000 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
1001 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
1002 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
1003 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
1004 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
1005 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
1006 /* HSW CRW */
1007 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
1008 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
1009 /* HSW Server */
1010 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
1011 /* HSW SRVR */
1012 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
1013 /* BSW */
1014 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
1015 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
1016 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
1017 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
1018 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
1019 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
1020 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
1021 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
1022 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
1023 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
1024 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
1025 };
1026
1027 static void isa_bridge_class_init(ObjectClass *klass, void *data)
1028 {
1029 DeviceClass *dc = DEVICE_CLASS(klass);
1030 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1031
1032 dc->desc = "ISA bridge faked to support IGD PT";
1033 k->vendor_id = PCI_VENDOR_ID_INTEL;
1034 k->class_id = PCI_CLASS_BRIDGE_ISA;
1035 };
1036
1037 static TypeInfo isa_bridge_info = {
1038 .name = "igd-passthrough-isa-bridge",
1039 .parent = TYPE_PCI_DEVICE,
1040 .instance_size = sizeof(PCIDevice),
1041 .class_init = isa_bridge_class_init,
1042 };
1043
1044 static void pt_graphics_register_types(void)
1045 {
1046 type_register_static(&isa_bridge_info);
1047 }
1048 type_init(pt_graphics_register_types)
1049
1050 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
1051 {
1052 struct PCIDevice *bridge_dev;
1053 int i, num;
1054 uint16_t pch_dev_id = 0xffff;
1055 uint8_t pch_rev_id;
1056
1057 num = ARRAY_SIZE(igd_combo_id_infos);
1058 for (i = 0; i < num; i++) {
1059 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
1060 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
1061 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
1062 }
1063 }
1064
1065 if (pch_dev_id == 0xffff) {
1066 return;
1067 }
1068
1069 /* Currently IGD drivers always need to access PCH by 1f.0. */
1070 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
1071 "igd-passthrough-isa-bridge");
1072
1073 /*
1074 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
1075 */
1076 if (!bridge_dev) {
1077 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
1078 return;
1079 }
1080 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
1081 pci_config_set_revision(bridge_dev->config, pch_rev_id);
1082 }
1083
1084 static void isapc_machine_options(MachineClass *m)
1085 {
1086 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
1087 m->desc = "ISA-only PC";
1088 m->max_cpus = 1;
1089 m->option_rom_has_mr = true;
1090 m->rom_file_has_mr = false;
1091 pcmc->pci_enabled = false;
1092 pcmc->has_acpi_build = false;
1093 pcmc->smbios_defaults = false;
1094 pcmc->gigabyte_align = false;
1095 pcmc->smbios_legacy_mode = true;
1096 pcmc->has_reserved_memory = false;
1097 }
1098
1099 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1100 isapc_machine_options);
1101
1102
1103 #ifdef CONFIG_XEN
1104 static void xenfv_machine_options(MachineClass *m)
1105 {
1106 m->desc = "Xen Fully-virtualized PC";
1107 m->max_cpus = HVM_MAX_VCPUS;
1108 m->default_machine_opts = "accel=xen";
1109 m->hot_add_cpu = pc_hot_add_cpu;
1110 }
1111
1112 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1113 xenfv_machine_options);
1114 #endif