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q35: Move options common to all classes to pc_i440fx_machine_options()
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1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include <glib.h>
26
27 #include "hw/hw.h"
28 #include "hw/loader.h"
29 #include "hw/i386/pc.h"
30 #include "hw/i386/apic.h"
31 #include "hw/smbios/smbios.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_ids.h"
34 #include "hw/usb.h"
35 #include "net/net.h"
36 #include "hw/boards.h"
37 #include "hw/ide.h"
38 #include "sysemu/kvm.h"
39 #include "hw/kvm/clock.h"
40 #include "sysemu/sysemu.h"
41 #include "hw/sysbus.h"
42 #include "hw/cpu/icc_bus.h"
43 #include "sysemu/arch_init.h"
44 #include "sysemu/block-backend.h"
45 #include "hw/i2c/smbus.h"
46 #include "hw/xen/xen.h"
47 #include "exec/memory.h"
48 #include "exec/address-spaces.h"
49 #include "hw/acpi/acpi.h"
50 #include "cpu.h"
51 #include "qemu/error-report.h"
52 #ifdef CONFIG_XEN
53 #include <xen/hvm/hvm_info_table.h>
54 #include "hw/xen/xen_pt.h"
55 #endif
56 #include "migration/migration.h"
57
58 #define MAX_IDE_BUS 2
59
60 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
61 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
62 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
63
64 static bool pci_enabled = true;
65 static bool has_acpi_build = true;
66 static bool rsdp_in_ram = true;
67 static int legacy_acpi_table_size;
68 static bool smbios_defaults = true;
69 static bool smbios_legacy_mode;
70 static bool smbios_uuid_encoded = true;
71 /* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
72 * host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
73 * pages in the host.
74 */
75 static bool gigabyte_align = true;
76 static bool has_reserved_memory = true;
77 static bool kvmclock_enabled = true;
78
79 /* PC hardware initialisation */
80 static void pc_init1(MachineState *machine,
81 const char *host_type, const char *pci_type)
82 {
83 PCMachineState *pcms = PC_MACHINE(machine);
84 MemoryRegion *system_memory = get_system_memory();
85 MemoryRegion *system_io = get_system_io();
86 int i;
87 PCIBus *pci_bus;
88 ISABus *isa_bus;
89 PCII440FXState *i440fx_state;
90 int piix3_devfn = -1;
91 qemu_irq *gsi;
92 qemu_irq *i8259;
93 qemu_irq smi_irq;
94 GSIState *gsi_state;
95 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
96 BusState *idebus[MAX_IDE_BUS];
97 ISADevice *rtc_state;
98 MemoryRegion *ram_memory;
99 MemoryRegion *pci_memory;
100 MemoryRegion *rom_memory;
101 DeviceState *icc_bridge;
102 PcGuestInfo *guest_info;
103 ram_addr_t lowmem;
104
105 /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory).
106 * If it doesn't, we need to split it in chunks below and above 4G.
107 * In any case, try to make sure that guest addresses aligned at
108 * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
109 * For old machine types, use whatever split we used historically to avoid
110 * breaking migration.
111 */
112 if (machine->ram_size >= 0xe0000000) {
113 lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000;
114 } else {
115 lowmem = 0xe0000000;
116 }
117
118 /* Handle the machine opt max-ram-below-4g. It is basically doing
119 * min(qemu limit, user limit).
120 */
121 if (lowmem > pcms->max_ram_below_4g) {
122 lowmem = pcms->max_ram_below_4g;
123 if (machine->ram_size - lowmem > lowmem &&
124 lowmem & ((1ULL << 30) - 1)) {
125 error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
126 ") not a multiple of 1G; possible bad performance.",
127 pcms->max_ram_below_4g);
128 }
129 }
130
131 if (machine->ram_size >= lowmem) {
132 pcms->above_4g_mem_size = machine->ram_size - lowmem;
133 pcms->below_4g_mem_size = lowmem;
134 } else {
135 pcms->above_4g_mem_size = 0;
136 pcms->below_4g_mem_size = machine->ram_size;
137 }
138
139 if (xen_enabled() && xen_hvm_init(pcms, &ram_memory) != 0) {
140 fprintf(stderr, "xen hardware virtual machine initialisation failed\n");
141 exit(1);
142 }
143
144 icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE);
145 object_property_add_child(qdev_get_machine(), "icc-bridge",
146 OBJECT(icc_bridge), NULL);
147
148 pc_cpus_init(machine->cpu_model, icc_bridge);
149
150 if (kvm_enabled() && kvmclock_enabled) {
151 kvmclock_create();
152 }
153
154 if (pci_enabled) {
155 pci_memory = g_new(MemoryRegion, 1);
156 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
157 rom_memory = pci_memory;
158 } else {
159 pci_memory = NULL;
160 rom_memory = system_memory;
161 }
162
163 guest_info = pc_guest_info_init(pcms);
164
165 guest_info->has_acpi_build = has_acpi_build;
166 guest_info->legacy_acpi_table_size = legacy_acpi_table_size;
167
168 guest_info->isapc_ram_fw = !pci_enabled;
169 guest_info->has_reserved_memory = has_reserved_memory;
170 guest_info->rsdp_in_ram = rsdp_in_ram;
171
172 if (smbios_defaults) {
173 MachineClass *mc = MACHINE_GET_CLASS(machine);
174 /* These values are guest ABI, do not change */
175 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
176 mc->name, smbios_legacy_mode, smbios_uuid_encoded,
177 SMBIOS_ENTRY_POINT_21);
178 }
179
180 /* allocate ram and load rom/bios */
181 if (!xen_enabled()) {
182 pc_memory_init(pcms, system_memory,
183 rom_memory, &ram_memory, guest_info);
184 } else if (machine->kernel_filename != NULL) {
185 /* For xen HVM direct kernel boot, load linux here */
186 xen_load_linux(pcms, guest_info);
187 }
188
189 gsi_state = g_malloc0(sizeof(*gsi_state));
190 if (kvm_irqchip_in_kernel()) {
191 kvm_pc_setup_irq_routing(pci_enabled);
192 gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
193 GSI_NUM_PINS);
194 } else {
195 gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
196 }
197
198 if (pci_enabled) {
199 pci_bus = i440fx_init(host_type,
200 pci_type,
201 &i440fx_state, &piix3_devfn, &isa_bus, gsi,
202 system_memory, system_io, machine->ram_size,
203 pcms->below_4g_mem_size,
204 pcms->above_4g_mem_size,
205 pci_memory, ram_memory);
206 } else {
207 pci_bus = NULL;
208 i440fx_state = NULL;
209 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io);
210 no_hpet = 1;
211 }
212 isa_bus_irqs(isa_bus, gsi);
213
214 if (kvm_irqchip_in_kernel()) {
215 i8259 = kvm_i8259_init(isa_bus);
216 } else if (xen_enabled()) {
217 i8259 = xen_interrupt_controller_init();
218 } else {
219 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
220 }
221
222 for (i = 0; i < ISA_NUM_IRQS; i++) {
223 gsi_state->i8259_irq[i] = i8259[i];
224 }
225 g_free(i8259);
226 if (pci_enabled) {
227 ioapic_init_gsi(gsi_state, "i440fx");
228 }
229 qdev_init_nofail(icc_bridge);
230
231 pc_register_ferr_irq(gsi[13]);
232
233 pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL);
234
235 assert(pcms->vmport != ON_OFF_AUTO_MAX);
236 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
237 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
238 }
239
240 /* init basic PC hardware */
241 pc_basic_device_init(isa_bus, gsi, &rtc_state, true,
242 (pcms->vmport != ON_OFF_AUTO_ON), 0x4);
243
244 pc_nic_init(isa_bus, pci_bus);
245
246 ide_drive_get(hd, ARRAY_SIZE(hd));
247 if (pci_enabled) {
248 PCIDevice *dev;
249 if (xen_enabled()) {
250 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
251 } else {
252 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
253 }
254 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
255 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
256 } else {
257 for(i = 0; i < MAX_IDE_BUS; i++) {
258 ISADevice *dev;
259 char busname[] = "ide.0";
260 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
261 ide_irq[i],
262 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
263 /*
264 * The ide bus name is ide.0 for the first bus and ide.1 for the
265 * second one.
266 */
267 busname[4] = '0' + i;
268 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
269 }
270 }
271
272 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
273
274 if (pci_enabled && usb_enabled()) {
275 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
276 }
277
278 if (pci_enabled && acpi_enabled) {
279 DeviceState *piix4_pm;
280 I2CBus *smbus;
281
282 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
283 /* TODO: Populate SPD eeprom data. */
284 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
285 gsi[9], smi_irq,
286 pc_machine_is_smm_enabled(pcms),
287 &piix4_pm);
288 smbus_eeprom_init(smbus, 8, NULL, 0);
289
290 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
291 TYPE_HOTPLUG_HANDLER,
292 (Object **)&pcms->acpi_dev,
293 object_property_allow_set_link,
294 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
295 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
296 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
297 }
298
299 if (pci_enabled) {
300 pc_pci_device_init(pci_bus);
301 }
302 }
303
304 static void pc_compat_2_3(MachineState *machine)
305 {
306 PCMachineState *pcms = PC_MACHINE(machine);
307 savevm_skip_section_footers();
308 if (kvm_enabled()) {
309 pcms->smm = ON_OFF_AUTO_OFF;
310 }
311 global_state_set_optional();
312 savevm_skip_configuration();
313 }
314
315 static void pc_compat_2_2(MachineState *machine)
316 {
317 pc_compat_2_3(machine);
318 rsdp_in_ram = false;
319 machine->suppress_vmdesc = true;
320 }
321
322 static void pc_compat_2_1(MachineState *machine)
323 {
324 PCMachineState *pcms = PC_MACHINE(machine);
325
326 pc_compat_2_2(machine);
327 smbios_uuid_encoded = false;
328 x86_cpu_compat_kvm_no_autodisable(FEAT_8000_0001_ECX, CPUID_EXT3_SVM);
329 pcms->enforce_aligned_dimm = false;
330 }
331
332 static void pc_compat_2_0(MachineState *machine)
333 {
334 pc_compat_2_1(machine);
335 /* This value depends on the actual DSDT and SSDT compiled into
336 * the source QEMU; unfortunately it depends on the binary and
337 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
338 * both QEMU 1.7 and QEMU 2.0.
339 *
340 * Large variations cause migration to fail for more than one
341 * consecutive value of the "-smp" maxcpus option.
342 *
343 * For small variations of the kind caused by different iasl versions,
344 * the 4k rounding usually leaves slack. However, there could be still
345 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
346 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
347 *
348 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
349 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
350 */
351 legacy_acpi_table_size = 6652;
352 smbios_legacy_mode = true;
353 has_reserved_memory = false;
354 pc_set_legacy_acpi_data_size();
355 }
356
357 static void pc_compat_1_7(MachineState *machine)
358 {
359 pc_compat_2_0(machine);
360 smbios_defaults = false;
361 gigabyte_align = false;
362 option_rom_has_mr = true;
363 legacy_acpi_table_size = 6414;
364 x86_cpu_compat_kvm_no_autoenable(FEAT_1_ECX, CPUID_EXT_X2APIC);
365 }
366
367 static void pc_compat_1_6(MachineState *machine)
368 {
369 pc_compat_1_7(machine);
370 rom_file_has_mr = false;
371 has_acpi_build = false;
372 }
373
374 static void pc_compat_1_5(MachineState *machine)
375 {
376 pc_compat_1_6(machine);
377 }
378
379 static void pc_compat_1_4(MachineState *machine)
380 {
381 pc_compat_1_5(machine);
382 }
383
384 static void pc_compat_1_3(MachineState *machine)
385 {
386 pc_compat_1_4(machine);
387 enable_compat_apic_id_mode();
388 }
389
390 /* PC compat function for pc-0.14 to pc-1.2 */
391 static void pc_compat_1_2(MachineState *machine)
392 {
393 pc_compat_1_3(machine);
394 x86_cpu_compat_kvm_no_autoenable(FEAT_KVM, 1 << KVM_FEATURE_PV_EOI);
395 }
396
397 /* PC compat function for pc-0.10 to pc-0.13 */
398 static void pc_compat_0_13(MachineState *machine)
399 {
400 pc_compat_1_2(machine);
401 kvmclock_enabled = false;
402 }
403
404 static void pc_init_isa(MachineState *machine)
405 {
406 pci_enabled = false;
407 has_acpi_build = false;
408 smbios_defaults = false;
409 gigabyte_align = false;
410 smbios_legacy_mode = true;
411 has_reserved_memory = false;
412 option_rom_has_mr = true;
413 rom_file_has_mr = false;
414 if (!machine->cpu_model) {
415 machine->cpu_model = "486";
416 }
417 x86_cpu_compat_kvm_no_autoenable(FEAT_KVM, 1 << KVM_FEATURE_PV_EOI);
418 enable_compat_apic_id_mode();
419 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
420 }
421
422 #ifdef CONFIG_XEN
423 static void pc_xen_hvm_init_pci(MachineState *machine)
424 {
425 const char *pci_type = has_igd_gfx_passthru ?
426 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
427
428 pc_init1(machine,
429 TYPE_I440FX_PCI_HOST_BRIDGE,
430 pci_type);
431 }
432
433 static void pc_xen_hvm_init(MachineState *machine)
434 {
435 PCIBus *bus;
436
437 pc_xen_hvm_init_pci(machine);
438
439 bus = pci_find_primary_bus();
440 if (bus != NULL) {
441 pci_create_simple(bus, -1, "xen-platform");
442 }
443 }
444 #endif
445
446 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
447 static void pc_init_##suffix(MachineState *machine) \
448 { \
449 void (*compat)(MachineState *m) = (compatfn); \
450 if (compat) { \
451 compat(machine); \
452 } \
453 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
454 TYPE_I440FX_PCI_DEVICE); \
455 } \
456 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
457
458 static void pc_i440fx_machine_options(MachineClass *m)
459 {
460 m->family = "pc_piix";
461 m->desc = "Standard PC (i440FX + PIIX, 1996)";
462 m->hot_add_cpu = pc_hot_add_cpu;
463 m->default_machine_opts = "firmware=bios-256k.bin";
464 m->default_display = "std";
465 }
466
467 static void pc_i440fx_2_4_machine_options(MachineClass *m)
468 {
469 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
470 pc_i440fx_machine_options(m);
471 pcmc->broken_reserved_end = true;
472 m->alias = "pc";
473 m->is_default = 1;
474 }
475
476 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
477 pc_i440fx_2_4_machine_options)
478
479
480 static void pc_i440fx_2_3_machine_options(MachineClass *m)
481 {
482 pc_i440fx_2_4_machine_options(m);
483 m->alias = NULL;
484 m->is_default = 0;
485 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
486 }
487
488 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3,
489 pc_i440fx_2_3_machine_options);
490
491
492 static void pc_i440fx_2_2_machine_options(MachineClass *m)
493 {
494 pc_i440fx_2_3_machine_options(m);
495 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
496 }
497
498 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2,
499 pc_i440fx_2_2_machine_options);
500
501
502 static void pc_i440fx_2_1_machine_options(MachineClass *m)
503 {
504 pc_i440fx_2_2_machine_options(m);
505 m->default_display = NULL;
506 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
507 }
508
509 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1,
510 pc_i440fx_2_1_machine_options);
511
512
513
514 static void pc_i440fx_2_0_machine_options(MachineClass *m)
515 {
516 pc_i440fx_2_1_machine_options(m);
517 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
518 }
519
520 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0,
521 pc_i440fx_2_0_machine_options);
522
523
524 static void pc_i440fx_1_7_machine_options(MachineClass *m)
525 {
526 pc_i440fx_2_0_machine_options(m);
527 m->default_machine_opts = NULL;
528 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
529 }
530
531 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7,
532 pc_i440fx_1_7_machine_options);
533
534
535 static void pc_i440fx_1_6_machine_options(MachineClass *m)
536 {
537 pc_i440fx_1_7_machine_options(m);
538 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
539 }
540
541 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6,
542 pc_i440fx_1_6_machine_options);
543
544
545 static void pc_i440fx_1_5_machine_options(MachineClass *m)
546 {
547 pc_i440fx_1_6_machine_options(m);
548 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
549 }
550
551 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5,
552 pc_i440fx_1_5_machine_options);
553
554
555 static void pc_i440fx_1_4_machine_options(MachineClass *m)
556 {
557 pc_i440fx_1_5_machine_options(m);
558 m->hot_add_cpu = NULL;
559 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
560 }
561
562 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4,
563 pc_i440fx_1_4_machine_options);
564
565
566 #define PC_COMPAT_1_3 \
567 PC_COMPAT_1_4 \
568 {\
569 .driver = "usb-tablet",\
570 .property = "usb_version",\
571 .value = stringify(1),\
572 },{\
573 .driver = "virtio-net-pci",\
574 .property = "ctrl_mac_addr",\
575 .value = "off", \
576 },{ \
577 .driver = "virtio-net-pci", \
578 .property = "mq", \
579 .value = "off", \
580 }, {\
581 .driver = "e1000",\
582 .property = "autonegotiation",\
583 .value = "off",\
584 },
585
586
587 static void pc_i440fx_1_3_machine_options(MachineClass *m)
588 {
589 pc_i440fx_1_4_machine_options(m);
590 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3);
591 }
592
593 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
594 pc_i440fx_1_3_machine_options);
595
596
597 #define PC_COMPAT_1_2 \
598 PC_COMPAT_1_3 \
599 {\
600 .driver = "nec-usb-xhci",\
601 .property = "msi",\
602 .value = "off",\
603 },{\
604 .driver = "nec-usb-xhci",\
605 .property = "msix",\
606 .value = "off",\
607 },{\
608 .driver = "ivshmem",\
609 .property = "use64",\
610 .value = "0",\
611 },{\
612 .driver = "qxl",\
613 .property = "revision",\
614 .value = stringify(3),\
615 },{\
616 .driver = "qxl-vga",\
617 .property = "revision",\
618 .value = stringify(3),\
619 },{\
620 .driver = "VGA",\
621 .property = "mmio",\
622 .value = "off",\
623 },
624
625 static void pc_i440fx_1_2_machine_options(MachineClass *m)
626 {
627 pc_i440fx_1_3_machine_options(m);
628 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2);
629 }
630
631 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
632 pc_i440fx_1_2_machine_options);
633
634
635 #define PC_COMPAT_1_1 \
636 PC_COMPAT_1_2 \
637 {\
638 .driver = "virtio-scsi-pci",\
639 .property = "hotplug",\
640 .value = "off",\
641 },{\
642 .driver = "virtio-scsi-pci",\
643 .property = "param_change",\
644 .value = "off",\
645 },{\
646 .driver = "VGA",\
647 .property = "vgamem_mb",\
648 .value = stringify(8),\
649 },{\
650 .driver = "vmware-svga",\
651 .property = "vgamem_mb",\
652 .value = stringify(8),\
653 },{\
654 .driver = "qxl-vga",\
655 .property = "vgamem_mb",\
656 .value = stringify(8),\
657 },{\
658 .driver = "qxl",\
659 .property = "vgamem_mb",\
660 .value = stringify(8),\
661 },{\
662 .driver = "virtio-blk-pci",\
663 .property = "config-wce",\
664 .value = "off",\
665 },
666
667 static void pc_i440fx_1_1_machine_options(MachineClass *m)
668 {
669 pc_i440fx_1_2_machine_options(m);
670 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1);
671 }
672
673 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
674 pc_i440fx_1_1_machine_options);
675
676
677 #define PC_COMPAT_1_0 \
678 PC_COMPAT_1_1 \
679 {\
680 .driver = TYPE_ISA_FDC,\
681 .property = "check_media_rate",\
682 .value = "off",\
683 }, {\
684 .driver = "virtio-balloon-pci",\
685 .property = "class",\
686 .value = stringify(PCI_CLASS_MEMORY_RAM),\
687 },{\
688 .driver = "apic-common",\
689 .property = "vapic",\
690 .value = "off",\
691 },{\
692 .driver = TYPE_USB_DEVICE,\
693 .property = "full-path",\
694 .value = "no",\
695 },
696
697 static void pc_i440fx_1_0_machine_options(MachineClass *m)
698 {
699 pc_i440fx_1_1_machine_options(m);
700 m->hw_version = "1.0";
701 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0);
702 }
703
704 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
705 pc_i440fx_1_0_machine_options);
706
707
708 #define PC_COMPAT_0_15 \
709 PC_COMPAT_1_0
710
711 static void pc_i440fx_0_15_machine_options(MachineClass *m)
712 {
713 pc_i440fx_1_0_machine_options(m);
714 m->hw_version = "0.15";
715 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15);
716 }
717
718 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
719 pc_i440fx_0_15_machine_options);
720
721
722 #define PC_COMPAT_0_14 \
723 PC_COMPAT_0_15 \
724 {\
725 .driver = "virtio-blk-pci",\
726 .property = "event_idx",\
727 .value = "off",\
728 },{\
729 .driver = "virtio-serial-pci",\
730 .property = "event_idx",\
731 .value = "off",\
732 },{\
733 .driver = "virtio-net-pci",\
734 .property = "event_idx",\
735 .value = "off",\
736 },{\
737 .driver = "virtio-balloon-pci",\
738 .property = "event_idx",\
739 .value = "off",\
740 },{\
741 .driver = "qxl",\
742 .property = "revision",\
743 .value = stringify(2),\
744 },{\
745 .driver = "qxl-vga",\
746 .property = "revision",\
747 .value = stringify(2),\
748 },
749
750 static void pc_i440fx_0_14_machine_options(MachineClass *m)
751 {
752 pc_i440fx_0_15_machine_options(m);
753 m->hw_version = "0.14";
754 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14);
755 }
756
757 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
758 pc_i440fx_0_14_machine_options);
759
760
761 #define PC_COMPAT_0_13 \
762 PC_COMPAT_0_14 \
763 {\
764 .driver = TYPE_PCI_DEVICE,\
765 .property = "command_serr_enable",\
766 .value = "off",\
767 },{\
768 .driver = "AC97",\
769 .property = "use_broken_id",\
770 .value = stringify(1),\
771 },{\
772 .driver = "virtio-9p-pci",\
773 .property = "vectors",\
774 .value = stringify(0),\
775 },{\
776 .driver = "VGA",\
777 .property = "rombar",\
778 .value = stringify(0),\
779 },{\
780 .driver = "vmware-svga",\
781 .property = "rombar",\
782 .value = stringify(0),\
783 },
784
785 static void pc_i440fx_0_13_machine_options(MachineClass *m)
786 {
787 pc_i440fx_0_14_machine_options(m);
788 m->hw_version = "0.13";
789 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13);
790 }
791
792 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
793 pc_i440fx_0_13_machine_options);
794
795
796 #define PC_COMPAT_0_12 \
797 PC_COMPAT_0_13 \
798 {\
799 .driver = "virtio-serial-pci",\
800 .property = "max_ports",\
801 .value = stringify(1),\
802 },{\
803 .driver = "virtio-serial-pci",\
804 .property = "vectors",\
805 .value = stringify(0),\
806 },{\
807 .driver = "usb-mouse",\
808 .property = "serial",\
809 .value = "1",\
810 },{\
811 .driver = "usb-tablet",\
812 .property = "serial",\
813 .value = "1",\
814 },{\
815 .driver = "usb-kbd",\
816 .property = "serial",\
817 .value = "1",\
818 },
819
820 static void pc_i440fx_0_12_machine_options(MachineClass *m)
821 {
822 pc_i440fx_0_13_machine_options(m);
823 m->hw_version = "0.12";
824 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12);
825 }
826
827 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
828 pc_i440fx_0_12_machine_options);
829
830
831 #define PC_COMPAT_0_11 \
832 PC_COMPAT_0_12 \
833 {\
834 .driver = "virtio-blk-pci",\
835 .property = "vectors",\
836 .value = stringify(0),\
837 },{\
838 .driver = TYPE_PCI_DEVICE,\
839 .property = "rombar",\
840 .value = stringify(0),\
841 },{\
842 .driver = "ide-drive",\
843 .property = "ver",\
844 .value = "0.11",\
845 },{\
846 .driver = "scsi-disk",\
847 .property = "ver",\
848 .value = "0.11",\
849 },
850
851 static void pc_i440fx_0_11_machine_options(MachineClass *m)
852 {
853 pc_i440fx_0_12_machine_options(m);
854 m->hw_version = "0.11";
855 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11);
856 }
857
858 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13,
859 pc_i440fx_0_11_machine_options);
860
861
862 #define PC_COMPAT_0_10 \
863 PC_COMPAT_0_11 \
864 {\
865 .driver = "virtio-blk-pci",\
866 .property = "class",\
867 .value = stringify(PCI_CLASS_STORAGE_OTHER),\
868 },{\
869 .driver = "virtio-serial-pci",\
870 .property = "class",\
871 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\
872 },{\
873 .driver = "virtio-net-pci",\
874 .property = "vectors",\
875 .value = stringify(0),\
876 },{\
877 .driver = "ide-drive",\
878 .property = "ver",\
879 .value = "0.10",\
880 },{\
881 .driver = "scsi-disk",\
882 .property = "ver",\
883 .value = "0.10",\
884 },
885
886 static void pc_i440fx_0_10_machine_options(MachineClass *m)
887 {
888 pc_i440fx_0_11_machine_options(m);
889 m->hw_version = "0.10";
890 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10);
891 }
892
893 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13,
894 pc_i440fx_0_10_machine_options);
895
896 typedef struct {
897 uint16_t gpu_device_id;
898 uint16_t pch_device_id;
899 uint8_t pch_revision_id;
900 } IGDDeviceIDInfo;
901
902 /* In real world different GPU should have different PCH. But actually
903 * the different PCH DIDs likely map to different PCH SKUs. We do the
904 * same thing for the GPU. For PCH, the different SKUs are going to be
905 * all the same silicon design and implementation, just different
906 * features turn on and off with fuses. The SW interfaces should be
907 * consistent across all SKUs in a given family (eg LPT). But just same
908 * features may not be supported.
909 *
910 * Most of these different PCH features probably don't matter to the
911 * Gfx driver, but obviously any difference in display port connections
912 * will so it should be fine with any PCH in case of passthrough.
913 *
914 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
915 * scenarios, 0x9cc3 for BDW(Broadwell).
916 */
917 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
918 /* HSW Classic */
919 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
920 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
921 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
922 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
923 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
924 /* HSW ULT */
925 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
926 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
927 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
928 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
929 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
930 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
931 /* HSW CRW */
932 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
933 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
934 /* HSW Server */
935 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
936 /* HSW SRVR */
937 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
938 /* BSW */
939 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
940 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
941 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
942 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
943 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
944 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
945 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
946 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
947 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
948 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
949 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
950 };
951
952 static void isa_bridge_class_init(ObjectClass *klass, void *data)
953 {
954 DeviceClass *dc = DEVICE_CLASS(klass);
955 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
956
957 dc->desc = "ISA bridge faked to support IGD PT";
958 k->vendor_id = PCI_VENDOR_ID_INTEL;
959 k->class_id = PCI_CLASS_BRIDGE_ISA;
960 };
961
962 static TypeInfo isa_bridge_info = {
963 .name = "igd-passthrough-isa-bridge",
964 .parent = TYPE_PCI_DEVICE,
965 .instance_size = sizeof(PCIDevice),
966 .class_init = isa_bridge_class_init,
967 };
968
969 static void pt_graphics_register_types(void)
970 {
971 type_register_static(&isa_bridge_info);
972 }
973 type_init(pt_graphics_register_types)
974
975 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
976 {
977 struct PCIDevice *bridge_dev;
978 int i, num;
979 uint16_t pch_dev_id = 0xffff;
980 uint8_t pch_rev_id;
981
982 num = ARRAY_SIZE(igd_combo_id_infos);
983 for (i = 0; i < num; i++) {
984 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
985 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
986 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
987 }
988 }
989
990 if (pch_dev_id == 0xffff) {
991 return;
992 }
993
994 /* Currently IGD drivers always need to access PCH by 1f.0. */
995 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
996 "igd-passthrough-isa-bridge");
997
998 /*
999 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
1000 */
1001 if (!bridge_dev) {
1002 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
1003 return;
1004 }
1005 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
1006 pci_config_set_revision(bridge_dev->config, pch_rev_id);
1007 }
1008
1009 static void isapc_machine_options(MachineClass *m)
1010 {
1011 m->desc = "ISA-only PC";
1012 m->max_cpus = 1;
1013 }
1014
1015 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1016 isapc_machine_options);
1017
1018
1019 #ifdef CONFIG_XEN
1020 static void xenfv_machine_options(MachineClass *m)
1021 {
1022 m->desc = "Xen Fully-virtualized PC";
1023 m->max_cpus = HVM_MAX_VCPUS;
1024 m->default_machine_opts = "accel=xen";
1025 m->hot_add_cpu = pc_hot_add_cpu;
1026 }
1027
1028 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1029 xenfv_machine_options);
1030 #endif