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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190816' into...
[mirror_qemu.git] / hw / i386 / pc_piix.c
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "config-devices.h"
27
28 #include "qemu/units.h"
29 #include "hw/loader.h"
30 #include "hw/i386/pc.h"
31 #include "hw/i386/apic.h"
32 #include "hw/display/ramfb.h"
33 #include "hw/firmware/smbios.h"
34 #include "hw/pci/pci.h"
35 #include "hw/pci/pci_ids.h"
36 #include "hw/usb.h"
37 #include "net/net.h"
38 #include "hw/ide.h"
39 #include "hw/irq.h"
40 #include "sysemu/kvm.h"
41 #include "hw/kvm/clock.h"
42 #include "sysemu/sysemu.h"
43 #include "hw/sysbus.h"
44 #include "sysemu/arch_init.h"
45 #include "hw/i2c/smbus_eeprom.h"
46 #include "hw/xen/xen.h"
47 #include "exec/memory.h"
48 #include "exec/address-spaces.h"
49 #include "hw/acpi/acpi.h"
50 #include "cpu.h"
51 #include "qapi/error.h"
52 #include "qemu/error-report.h"
53 #ifdef CONFIG_XEN
54 #include <xen/hvm/hvm_info_table.h>
55 #include "hw/xen/xen_pt.h"
56 #endif
57 #include "migration/global_state.h"
58 #include "migration/misc.h"
59 #include "kvm_i386.h"
60 #include "sysemu/numa.h"
61
62 #define MAX_IDE_BUS 2
63
64 #ifdef CONFIG_IDE_ISA
65 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
66 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
67 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
68 #endif
69
70 /* PC hardware initialisation */
71 static void pc_init1(MachineState *machine,
72 const char *host_type, const char *pci_type)
73 {
74 PCMachineState *pcms = PC_MACHINE(machine);
75 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
76 MemoryRegion *system_memory = get_system_memory();
77 MemoryRegion *system_io = get_system_io();
78 int i;
79 PCIBus *pci_bus;
80 ISABus *isa_bus;
81 PCII440FXState *i440fx_state;
82 int piix3_devfn = -1;
83 qemu_irq *i8259;
84 qemu_irq smi_irq;
85 GSIState *gsi_state;
86 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
87 BusState *idebus[MAX_IDE_BUS];
88 ISADevice *rtc_state;
89 MemoryRegion *ram_memory;
90 MemoryRegion *pci_memory;
91 MemoryRegion *rom_memory;
92 ram_addr_t lowmem;
93
94 /*
95 * Calculate ram split, for memory below and above 4G. It's a bit
96 * complicated for backward compatibility reasons ...
97 *
98 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
99 * default value for max_ram_below_4g now.
100 *
101 * - Then, to gigabyte align the memory, we move the split to 3G
102 * (lowmem = 0xc0000000). But only in case we have to split in
103 * the first place, i.e. ram_size is larger than (traditional)
104 * lowmem. And for new machine types (gigabyte_align = true)
105 * only, for live migration compatibility reasons.
106 *
107 * - Next the max-ram-below-4g option was added, which allowed to
108 * reduce lowmem to a smaller value, to allow a larger PCI I/O
109 * window below 4G. qemu doesn't enforce gigabyte alignment here,
110 * but prints a warning.
111 *
112 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
113 * so legacy non-PAE guests can get as much memory as possible in
114 * the 32bit address space below 4G.
115 *
116 * - Note that Xen has its own ram setp code in xen_ram_init(),
117 * called via xen_hvm_init().
118 *
119 * Examples:
120 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
121 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
122 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
123 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
124 */
125 if (xen_enabled()) {
126 xen_hvm_init(pcms, &ram_memory);
127 } else {
128 if (!pcms->max_ram_below_4g) {
129 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
130 }
131 lowmem = pcms->max_ram_below_4g;
132 if (machine->ram_size >= pcms->max_ram_below_4g) {
133 if (pcmc->gigabyte_align) {
134 if (lowmem > 0xc0000000) {
135 lowmem = 0xc0000000;
136 }
137 if (lowmem & (1 * GiB - 1)) {
138 warn_report("Large machine and max_ram_below_4g "
139 "(%" PRIu64 ") not a multiple of 1G; "
140 "possible bad performance.",
141 pcms->max_ram_below_4g);
142 }
143 }
144 }
145
146 if (machine->ram_size >= lowmem) {
147 pcms->above_4g_mem_size = machine->ram_size - lowmem;
148 pcms->below_4g_mem_size = lowmem;
149 } else {
150 pcms->above_4g_mem_size = 0;
151 pcms->below_4g_mem_size = machine->ram_size;
152 }
153 }
154
155 pc_cpus_init(pcms);
156
157 if (kvm_enabled() && pcmc->kvmclock_enabled) {
158 kvmclock_create();
159 }
160
161 if (pcmc->pci_enabled) {
162 pci_memory = g_new(MemoryRegion, 1);
163 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
164 rom_memory = pci_memory;
165 } else {
166 pci_memory = NULL;
167 rom_memory = system_memory;
168 }
169
170 pc_guest_info_init(pcms);
171
172 if (pcmc->smbios_defaults) {
173 MachineClass *mc = MACHINE_GET_CLASS(machine);
174 /* These values are guest ABI, do not change */
175 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
176 mc->name, pcmc->smbios_legacy_mode,
177 pcmc->smbios_uuid_encoded,
178 SMBIOS_ENTRY_POINT_21);
179 }
180
181 /* allocate ram and load rom/bios */
182 if (!xen_enabled()) {
183 pc_memory_init(pcms, system_memory,
184 rom_memory, &ram_memory);
185 } else if (machine->kernel_filename != NULL) {
186 /* For xen HVM direct kernel boot, load linux here */
187 xen_load_linux(pcms);
188 }
189
190 gsi_state = g_malloc0(sizeof(*gsi_state));
191 if (kvm_ioapic_in_kernel()) {
192 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
193 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
194 GSI_NUM_PINS);
195 } else {
196 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
197 }
198
199 if (pcmc->pci_enabled) {
200 pci_bus = i440fx_init(host_type,
201 pci_type,
202 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi,
203 system_memory, system_io, machine->ram_size,
204 pcms->below_4g_mem_size,
205 pcms->above_4g_mem_size,
206 pci_memory, ram_memory);
207 pcms->bus = pci_bus;
208 } else {
209 pci_bus = NULL;
210 i440fx_state = NULL;
211 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
212 &error_abort);
213 no_hpet = 1;
214 }
215 isa_bus_irqs(isa_bus, pcms->gsi);
216
217 if (kvm_pic_in_kernel()) {
218 i8259 = kvm_i8259_init(isa_bus);
219 } else if (xen_enabled()) {
220 i8259 = xen_interrupt_controller_init();
221 } else {
222 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
223 }
224
225 for (i = 0; i < ISA_NUM_IRQS; i++) {
226 gsi_state->i8259_irq[i] = i8259[i];
227 }
228 g_free(i8259);
229 if (pcmc->pci_enabled) {
230 ioapic_init_gsi(gsi_state, "i440fx");
231 }
232
233 pc_register_ferr_irq(pcms->gsi[13]);
234
235 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
236
237 assert(pcms->vmport != ON_OFF_AUTO__MAX);
238 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
239 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
240 }
241
242 /* init basic PC hardware */
243 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true,
244 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
245 0x4);
246
247 pc_nic_init(pcmc, isa_bus, pci_bus);
248
249 ide_drive_get(hd, ARRAY_SIZE(hd));
250 if (pcmc->pci_enabled) {
251 PCIDevice *dev;
252 if (xen_enabled()) {
253 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
254 } else {
255 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
256 }
257 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
258 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
259 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
260 }
261 #ifdef CONFIG_IDE_ISA
262 else {
263 for(i = 0; i < MAX_IDE_BUS; i++) {
264 ISADevice *dev;
265 char busname[] = "ide.0";
266 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
267 ide_irq[i],
268 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
269 /*
270 * The ide bus name is ide.0 for the first bus and ide.1 for the
271 * second one.
272 */
273 busname[4] = '0' + i;
274 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
275 }
276 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
277 }
278 #endif
279
280 if (pcmc->pci_enabled && machine_usb(machine)) {
281 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
282 }
283
284 if (pcmc->pci_enabled && acpi_enabled) {
285 DeviceState *piix4_pm;
286 I2CBus *smbus;
287
288 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
289 /* TODO: Populate SPD eeprom data. */
290 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
291 pcms->gsi[9], smi_irq,
292 pc_machine_is_smm_enabled(pcms),
293 &piix4_pm);
294 smbus_eeprom_init(smbus, 8, NULL, 0);
295
296 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
297 TYPE_HOTPLUG_HANDLER,
298 (Object **)&pcms->acpi_dev,
299 object_property_allow_set_link,
300 OBJ_PROP_LINK_STRONG, &error_abort);
301 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
302 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
303 }
304
305 if (machine->nvdimms_state->is_enabled) {
306 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
307 pcms->fw_cfg, OBJECT(pcms));
308 }
309 }
310
311 /* Looking for a pc_compat_2_4() function? It doesn't exist.
312 * pc_compat_*() functions that run on machine-init time and
313 * change global QEMU state are deprecated. Please don't create
314 * one, and implement any pc-*-2.4 (and newer) compat code in
315 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
316 */
317
318 static void pc_compat_2_3_fn(MachineState *machine)
319 {
320 PCMachineState *pcms = PC_MACHINE(machine);
321 if (kvm_enabled()) {
322 pcms->smm = ON_OFF_AUTO_OFF;
323 }
324 }
325
326 static void pc_compat_2_2_fn(MachineState *machine)
327 {
328 pc_compat_2_3_fn(machine);
329 }
330
331 static void pc_compat_2_1_fn(MachineState *machine)
332 {
333 pc_compat_2_2_fn(machine);
334 x86_cpu_change_kvm_default("svm", NULL);
335 }
336
337 static void pc_compat_2_0_fn(MachineState *machine)
338 {
339 pc_compat_2_1_fn(machine);
340 }
341
342 static void pc_compat_1_7_fn(MachineState *machine)
343 {
344 pc_compat_2_0_fn(machine);
345 x86_cpu_change_kvm_default("x2apic", NULL);
346 }
347
348 static void pc_compat_1_6_fn(MachineState *machine)
349 {
350 pc_compat_1_7_fn(machine);
351 }
352
353 static void pc_compat_1_5_fn(MachineState *machine)
354 {
355 pc_compat_1_6_fn(machine);
356 }
357
358 static void pc_compat_1_4_fn(MachineState *machine)
359 {
360 pc_compat_1_5_fn(machine);
361 }
362
363 static void pc_compat_1_3(MachineState *machine)
364 {
365 pc_compat_1_4_fn(machine);
366 }
367
368 /* PC compat function for pc-0.14 to pc-1.2 */
369 static void pc_compat_1_2(MachineState *machine)
370 {
371 pc_compat_1_3(machine);
372 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
373 }
374
375 /* PC compat function for pc-0.12 and pc-0.13 */
376 static void pc_compat_0_13(MachineState *machine)
377 {
378 pc_compat_1_2(machine);
379 }
380
381 static void pc_init_isa(MachineState *machine)
382 {
383 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
384 }
385
386 #ifdef CONFIG_XEN
387 static void pc_xen_hvm_init_pci(MachineState *machine)
388 {
389 const char *pci_type = has_igd_gfx_passthru ?
390 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
391
392 pc_init1(machine,
393 TYPE_I440FX_PCI_HOST_BRIDGE,
394 pci_type);
395 }
396
397 static void pc_xen_hvm_init(MachineState *machine)
398 {
399 PCMachineState *pcms = PC_MACHINE(machine);
400
401 if (!xen_enabled()) {
402 error_report("xenfv machine requires the xen accelerator");
403 exit(1);
404 }
405
406 pc_xen_hvm_init_pci(machine);
407 pci_create_simple(pcms->bus, -1, "xen-platform");
408 }
409 #endif
410
411 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
412 static void pc_init_##suffix(MachineState *machine) \
413 { \
414 void (*compat)(MachineState *m) = (compatfn); \
415 if (compat) { \
416 compat(machine); \
417 } \
418 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
419 TYPE_I440FX_PCI_DEVICE); \
420 } \
421 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
422
423 static void pc_i440fx_machine_options(MachineClass *m)
424 {
425 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
426 pcmc->default_nic_model = "e1000";
427
428 m->family = "pc_piix";
429 m->desc = "Standard PC (i440FX + PIIX, 1996)";
430 m->default_machine_opts = "firmware=bios-256k.bin";
431 m->default_display = "std";
432 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
433 }
434
435 static void pc_i440fx_4_1_machine_options(MachineClass *m)
436 {
437 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
438 pc_i440fx_machine_options(m);
439 m->alias = "pc";
440 m->is_default = 1;
441 pcmc->default_cpu_version = 1;
442 }
443
444 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
445 pc_i440fx_4_1_machine_options);
446
447 static void pc_i440fx_4_0_machine_options(MachineClass *m)
448 {
449 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
450 pc_i440fx_4_1_machine_options(m);
451 m->alias = NULL;
452 m->is_default = 0;
453 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
454 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
455 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
456 }
457
458 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
459 pc_i440fx_4_0_machine_options);
460
461 static void pc_i440fx_3_1_machine_options(MachineClass *m)
462 {
463 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
464
465 pc_i440fx_4_0_machine_options(m);
466 m->is_default = 0;
467 m->smbus_no_migration_support = true;
468 m->alias = NULL;
469 pcmc->pvh_enabled = false;
470 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
471 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
472 }
473
474 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
475 pc_i440fx_3_1_machine_options);
476
477 static void pc_i440fx_3_0_machine_options(MachineClass *m)
478 {
479 pc_i440fx_3_1_machine_options(m);
480 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
481 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
482 }
483
484 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
485 pc_i440fx_3_0_machine_options);
486
487 static void pc_i440fx_2_12_machine_options(MachineClass *m)
488 {
489 pc_i440fx_3_0_machine_options(m);
490 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
491 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
492 }
493
494 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
495 pc_i440fx_2_12_machine_options);
496
497 static void pc_i440fx_2_11_machine_options(MachineClass *m)
498 {
499 pc_i440fx_2_12_machine_options(m);
500 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
501 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
502 }
503
504 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
505 pc_i440fx_2_11_machine_options);
506
507 static void pc_i440fx_2_10_machine_options(MachineClass *m)
508 {
509 pc_i440fx_2_11_machine_options(m);
510 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
511 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
512 m->auto_enable_numa_with_memhp = false;
513 }
514
515 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
516 pc_i440fx_2_10_machine_options);
517
518 static void pc_i440fx_2_9_machine_options(MachineClass *m)
519 {
520 pc_i440fx_2_10_machine_options(m);
521 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
522 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
523 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
524 }
525
526 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
527 pc_i440fx_2_9_machine_options);
528
529 static void pc_i440fx_2_8_machine_options(MachineClass *m)
530 {
531 pc_i440fx_2_9_machine_options(m);
532 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
533 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
534 }
535
536 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
537 pc_i440fx_2_8_machine_options);
538
539 static void pc_i440fx_2_7_machine_options(MachineClass *m)
540 {
541 pc_i440fx_2_8_machine_options(m);
542 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
543 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
544 }
545
546 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
547 pc_i440fx_2_7_machine_options);
548
549 static void pc_i440fx_2_6_machine_options(MachineClass *m)
550 {
551 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
552
553 pc_i440fx_2_7_machine_options(m);
554 pcmc->legacy_cpu_hotplug = true;
555 pcmc->linuxboot_dma_enabled = false;
556 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
557 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
558 }
559
560 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
561 pc_i440fx_2_6_machine_options);
562
563 static void pc_i440fx_2_5_machine_options(MachineClass *m)
564 {
565 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
566
567 pc_i440fx_2_6_machine_options(m);
568 pcmc->save_tsc_khz = false;
569 m->legacy_fw_cfg_order = 1;
570 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
571 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
572 }
573
574 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
575 pc_i440fx_2_5_machine_options);
576
577 static void pc_i440fx_2_4_machine_options(MachineClass *m)
578 {
579 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
580
581 pc_i440fx_2_5_machine_options(m);
582 m->hw_version = "2.4.0";
583 pcmc->broken_reserved_end = true;
584 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
585 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
586 }
587
588 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
589 pc_i440fx_2_4_machine_options)
590
591 static void pc_i440fx_2_3_machine_options(MachineClass *m)
592 {
593 pc_i440fx_2_4_machine_options(m);
594 m->hw_version = "2.3.0";
595 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
596 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
597 }
598
599 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
600 pc_i440fx_2_3_machine_options);
601
602 static void pc_i440fx_2_2_machine_options(MachineClass *m)
603 {
604 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
605
606 pc_i440fx_2_3_machine_options(m);
607 m->hw_version = "2.2.0";
608 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
609 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
610 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
611 pcmc->rsdp_in_ram = false;
612 }
613
614 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
615 pc_i440fx_2_2_machine_options);
616
617 static void pc_i440fx_2_1_machine_options(MachineClass *m)
618 {
619 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
620
621 pc_i440fx_2_2_machine_options(m);
622 m->hw_version = "2.1.0";
623 m->default_display = NULL;
624 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
625 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
626 pcmc->smbios_uuid_encoded = false;
627 pcmc->enforce_aligned_dimm = false;
628 }
629
630 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
631 pc_i440fx_2_1_machine_options);
632
633 static void pc_i440fx_2_0_machine_options(MachineClass *m)
634 {
635 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
636
637 pc_i440fx_2_1_machine_options(m);
638 m->hw_version = "2.0.0";
639 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
640 pcmc->smbios_legacy_mode = true;
641 pcmc->has_reserved_memory = false;
642 /* This value depends on the actual DSDT and SSDT compiled into
643 * the source QEMU; unfortunately it depends on the binary and
644 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
645 * both QEMU 1.7 and QEMU 2.0.
646 *
647 * Large variations cause migration to fail for more than one
648 * consecutive value of the "-smp" maxcpus option.
649 *
650 * For small variations of the kind caused by different iasl versions,
651 * the 4k rounding usually leaves slack. However, there could be still
652 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
653 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
654 *
655 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
656 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
657 */
658 pcmc->legacy_acpi_table_size = 6652;
659 pcmc->acpi_data_size = 0x10000;
660 }
661
662 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
663 pc_i440fx_2_0_machine_options);
664
665 static void pc_i440fx_1_7_machine_options(MachineClass *m)
666 {
667 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
668
669 pc_i440fx_2_0_machine_options(m);
670 m->hw_version = "1.7.0";
671 m->default_machine_opts = NULL;
672 m->option_rom_has_mr = true;
673 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
674 pcmc->smbios_defaults = false;
675 pcmc->gigabyte_align = false;
676 pcmc->legacy_acpi_table_size = 6414;
677 }
678
679 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
680 pc_i440fx_1_7_machine_options);
681
682 static void pc_i440fx_1_6_machine_options(MachineClass *m)
683 {
684 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
685
686 pc_i440fx_1_7_machine_options(m);
687 m->hw_version = "1.6.0";
688 m->rom_file_has_mr = false;
689 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
690 pcmc->has_acpi_build = false;
691 }
692
693 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
694 pc_i440fx_1_6_machine_options);
695
696 static void pc_i440fx_1_5_machine_options(MachineClass *m)
697 {
698 pc_i440fx_1_6_machine_options(m);
699 m->hw_version = "1.5.0";
700 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
701 }
702
703 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
704 pc_i440fx_1_5_machine_options);
705
706 static void pc_i440fx_1_4_machine_options(MachineClass *m)
707 {
708 pc_i440fx_1_5_machine_options(m);
709 m->hw_version = "1.4.0";
710 m->hot_add_cpu = NULL;
711 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
712 }
713
714 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
715 pc_i440fx_1_4_machine_options);
716
717 static void pc_i440fx_1_3_machine_options(MachineClass *m)
718 {
719 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
720 static GlobalProperty compat[] = {
721 PC_CPU_MODEL_IDS("1.3.0")
722 { "usb-tablet", "usb_version", "1" },
723 { "virtio-net-pci", "ctrl_mac_addr", "off" },
724 { "virtio-net-pci", "mq", "off" },
725 { "e1000", "autonegotiation", "off" },
726 };
727
728 pc_i440fx_1_4_machine_options(m);
729 m->hw_version = "1.3.0";
730 pcmc->compat_apic_id_mode = true;
731 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
732 }
733
734 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
735 pc_i440fx_1_3_machine_options);
736
737
738 static void pc_i440fx_1_2_machine_options(MachineClass *m)
739 {
740 static GlobalProperty compat[] = {
741 PC_CPU_MODEL_IDS("1.2.0")
742 { "nec-usb-xhci", "msi", "off" },
743 { "nec-usb-xhci", "msix", "off" },
744 { "qxl", "revision", "3" },
745 { "qxl-vga", "revision", "3" },
746 { "VGA", "mmio", "off" },
747 };
748
749 pc_i440fx_1_3_machine_options(m);
750 m->hw_version = "1.2.0";
751 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
752 }
753
754 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
755 pc_i440fx_1_2_machine_options);
756
757
758 static void pc_i440fx_1_1_machine_options(MachineClass *m)
759 {
760 static GlobalProperty compat[] = {
761 PC_CPU_MODEL_IDS("1.1.0")
762 { "virtio-scsi-pci", "hotplug", "off" },
763 { "virtio-scsi-pci", "param_change", "off" },
764 { "VGA", "vgamem_mb", "8" },
765 { "vmware-svga", "vgamem_mb", "8" },
766 { "qxl-vga", "vgamem_mb", "8" },
767 { "qxl", "vgamem_mb", "8" },
768 { "virtio-blk-pci", "config-wce", "off" },
769 };
770
771 pc_i440fx_1_2_machine_options(m);
772 m->hw_version = "1.1.0";
773 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
774 }
775
776 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
777 pc_i440fx_1_1_machine_options);
778
779 static void pc_i440fx_1_0_machine_options(MachineClass *m)
780 {
781 static GlobalProperty compat[] = {
782 PC_CPU_MODEL_IDS("1.0")
783 { TYPE_ISA_FDC, "check_media_rate", "off" },
784 { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
785 { "apic-common", "vapic", "off" },
786 { TYPE_USB_DEVICE, "full-path", "no" },
787 };
788
789 pc_i440fx_1_1_machine_options(m);
790 m->hw_version = "1.0";
791 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
792 }
793
794 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
795 pc_i440fx_1_0_machine_options);
796
797
798 static void pc_i440fx_0_15_machine_options(MachineClass *m)
799 {
800 static GlobalProperty compat[] = {
801 PC_CPU_MODEL_IDS("0.15")
802 };
803
804 pc_i440fx_1_0_machine_options(m);
805 m->hw_version = "0.15";
806 m->deprecation_reason = "use a newer machine type instead";
807 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
808 }
809
810 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
811 pc_i440fx_0_15_machine_options);
812
813
814 static void pc_i440fx_0_14_machine_options(MachineClass *m)
815 {
816 static GlobalProperty compat[] = {
817 PC_CPU_MODEL_IDS("0.14")
818 { "virtio-blk-pci", "event_idx", "off" },
819 { "virtio-serial-pci", "event_idx", "off" },
820 { "virtio-net-pci", "event_idx", "off" },
821 { "virtio-balloon-pci", "event_idx", "off" },
822 { "qxl", "revision", "2" },
823 { "qxl-vga", "revision", "2" },
824 };
825
826 pc_i440fx_0_15_machine_options(m);
827 m->hw_version = "0.14";
828 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
829 }
830
831 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
832 pc_i440fx_0_14_machine_options);
833
834 static void pc_i440fx_0_13_machine_options(MachineClass *m)
835 {
836 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
837 static GlobalProperty compat[] = {
838 PC_CPU_MODEL_IDS("0.13")
839 { TYPE_PCI_DEVICE, "command_serr_enable", "off" },
840 { "AC97", "use_broken_id", "1" },
841 { "virtio-9p-pci", "vectors", "0" },
842 { "VGA", "rombar", "0" },
843 { "vmware-svga", "rombar", "0" },
844 };
845
846 pc_i440fx_0_14_machine_options(m);
847 m->hw_version = "0.13";
848 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
849 pcmc->kvmclock_enabled = false;
850 }
851
852 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
853 pc_i440fx_0_13_machine_options);
854
855 static void pc_i440fx_0_12_machine_options(MachineClass *m)
856 {
857 static GlobalProperty compat[] = {
858 PC_CPU_MODEL_IDS("0.12")
859 { "virtio-serial-pci", "max_ports", "1" },
860 { "virtio-serial-pci", "vectors", "0" },
861 { "usb-mouse", "serial", "1" },
862 { "usb-tablet", "serial", "1" },
863 { "usb-kbd", "serial", "1" },
864 };
865
866 pc_i440fx_0_13_machine_options(m);
867 m->hw_version = "0.12";
868 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
869 }
870
871 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
872 pc_i440fx_0_12_machine_options);
873
874 typedef struct {
875 uint16_t gpu_device_id;
876 uint16_t pch_device_id;
877 uint8_t pch_revision_id;
878 } IGDDeviceIDInfo;
879
880 /* In real world different GPU should have different PCH. But actually
881 * the different PCH DIDs likely map to different PCH SKUs. We do the
882 * same thing for the GPU. For PCH, the different SKUs are going to be
883 * all the same silicon design and implementation, just different
884 * features turn on and off with fuses. The SW interfaces should be
885 * consistent across all SKUs in a given family (eg LPT). But just same
886 * features may not be supported.
887 *
888 * Most of these different PCH features probably don't matter to the
889 * Gfx driver, but obviously any difference in display port connections
890 * will so it should be fine with any PCH in case of passthrough.
891 *
892 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
893 * scenarios, 0x9cc3 for BDW(Broadwell).
894 */
895 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
896 /* HSW Classic */
897 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
898 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
899 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
900 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
901 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
902 /* HSW ULT */
903 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
904 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
905 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
906 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
907 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
908 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
909 /* HSW CRW */
910 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
911 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
912 /* HSW Server */
913 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
914 /* HSW SRVR */
915 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
916 /* BSW */
917 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
918 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
919 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
920 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
921 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
922 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
923 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
924 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
925 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
926 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
927 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
928 };
929
930 static void isa_bridge_class_init(ObjectClass *klass, void *data)
931 {
932 DeviceClass *dc = DEVICE_CLASS(klass);
933 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
934
935 dc->desc = "ISA bridge faked to support IGD PT";
936 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
937 k->vendor_id = PCI_VENDOR_ID_INTEL;
938 k->class_id = PCI_CLASS_BRIDGE_ISA;
939 };
940
941 static TypeInfo isa_bridge_info = {
942 .name = "igd-passthrough-isa-bridge",
943 .parent = TYPE_PCI_DEVICE,
944 .instance_size = sizeof(PCIDevice),
945 .class_init = isa_bridge_class_init,
946 .interfaces = (InterfaceInfo[]) {
947 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
948 { },
949 },
950 };
951
952 static void pt_graphics_register_types(void)
953 {
954 type_register_static(&isa_bridge_info);
955 }
956 type_init(pt_graphics_register_types)
957
958 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
959 {
960 struct PCIDevice *bridge_dev;
961 int i, num;
962 uint16_t pch_dev_id = 0xffff;
963 uint8_t pch_rev_id;
964
965 num = ARRAY_SIZE(igd_combo_id_infos);
966 for (i = 0; i < num; i++) {
967 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
968 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
969 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
970 }
971 }
972
973 if (pch_dev_id == 0xffff) {
974 return;
975 }
976
977 /* Currently IGD drivers always need to access PCH by 1f.0. */
978 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
979 "igd-passthrough-isa-bridge");
980
981 /*
982 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
983 */
984 if (!bridge_dev) {
985 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
986 return;
987 }
988 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
989 pci_config_set_revision(bridge_dev->config, pch_rev_id);
990 }
991
992 static void isapc_machine_options(MachineClass *m)
993 {
994 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
995 m->desc = "ISA-only PC";
996 m->max_cpus = 1;
997 m->option_rom_has_mr = true;
998 m->rom_file_has_mr = false;
999 pcmc->pci_enabled = false;
1000 pcmc->has_acpi_build = false;
1001 pcmc->smbios_defaults = false;
1002 pcmc->gigabyte_align = false;
1003 pcmc->smbios_legacy_mode = true;
1004 pcmc->has_reserved_memory = false;
1005 pcmc->default_nic_model = "ne2k_isa";
1006 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
1007 }
1008
1009 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1010 isapc_machine_options);
1011
1012
1013 #ifdef CONFIG_XEN
1014 static void xenfv_machine_options(MachineClass *m)
1015 {
1016 m->desc = "Xen Fully-virtualized PC";
1017 m->max_cpus = HVM_MAX_VCPUS;
1018 m->default_machine_opts = "accel=xen";
1019 }
1020
1021 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1022 xenfv_machine_options);
1023 #endif
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