2 * Copyright (c) 2003-2004 Fabrice Bellard
3 * Copyright (c) 2019 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/error-report.h"
25 #include "qemu/option.h"
26 #include "qemu/cutils.h"
27 #include "qemu/units.h"
28 #include "qemu-common.h"
29 #include "qapi/error.h"
30 #include "qapi/qmp/qerror.h"
31 #include "qapi/qapi-visit-common.h"
32 #include "qapi/visitor.h"
33 #include "sysemu/qtest.h"
34 #include "sysemu/numa.h"
35 #include "sysemu/replay.h"
36 #include "sysemu/sysemu.h"
39 #include "hw/i386/x86.h"
40 #include "target/i386/cpu.h"
41 #include "hw/i386/topology.h"
42 #include "hw/i386/fw_cfg.h"
43 #include "hw/intc/i8259.h"
45 #include "hw/acpi/cpu_hotplug.h"
48 #include "hw/loader.h"
49 #include "multiboot.h"
51 #include "standard-headers/asm-x86/bootparam.h"
52 #include "config-devices.h"
55 #define BIOS_FILENAME "bios.bin"
57 /* Physical Address of PVH entry point read from kernel ELF NOTE */
58 static size_t pvh_start_addr
;
60 inline void init_topo_info(X86CPUTopoInfo
*topo_info
,
61 const X86MachineState
*x86ms
)
63 MachineState
*ms
= MACHINE(x86ms
);
65 topo_info
->nodes_per_pkg
= ms
->numa_state
->num_nodes
/ ms
->smp
.sockets
;
66 topo_info
->dies_per_pkg
= x86ms
->smp_dies
;
67 topo_info
->cores_per_die
= ms
->smp
.cores
;
68 topo_info
->threads_per_core
= ms
->smp
.threads
;
72 * Calculates initial APIC ID for a specific CPU index
74 * Currently we need to be able to calculate the APIC ID from the CPU index
75 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
76 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
77 * all CPUs up to max_cpus.
79 uint32_t x86_cpu_apic_id_from_index(X86MachineState
*x86ms
,
80 unsigned int cpu_index
)
82 X86MachineClass
*x86mc
= X86_MACHINE_GET_CLASS(x86ms
);
83 X86CPUTopoInfo topo_info
;
87 init_topo_info(&topo_info
, x86ms
);
89 correct_id
= x86_apicid_from_cpu_idx(&topo_info
, cpu_index
);
90 if (x86mc
->compat_apic_id_mode
) {
91 if (cpu_index
!= correct_id
&& !warned
&& !qtest_enabled()) {
92 error_report("APIC IDs set in compatibility mode, "
93 "CPU topology won't match the configuration");
103 void x86_cpu_new(X86MachineState
*x86ms
, int64_t apic_id
, Error
**errp
)
106 Error
*local_err
= NULL
;
108 cpu
= object_new(MACHINE(x86ms
)->cpu_type
);
110 object_property_set_uint(cpu
, apic_id
, "apic-id", &local_err
);
111 object_property_set_bool(cpu
, true, "realized", &local_err
);
114 error_propagate(errp
, local_err
);
117 void x86_cpus_init(X86MachineState
*x86ms
, int default_cpu_version
)
120 const CPUArchIdList
*possible_cpus
;
121 MachineState
*ms
= MACHINE(x86ms
);
122 MachineClass
*mc
= MACHINE_GET_CLASS(x86ms
);
124 x86_cpu_set_default_version(default_cpu_version
);
127 * Calculates the limit to CPU APIC ID values
129 * Limit for the APIC ID value, so that all
130 * CPU APIC IDs are < x86ms->apic_id_limit.
132 * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
134 x86ms
->apic_id_limit
= x86_cpu_apic_id_from_index(x86ms
,
135 ms
->smp
.max_cpus
- 1) + 1;
136 possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
137 for (i
= 0; i
< ms
->smp
.cpus
; i
++) {
138 x86_cpu_new(x86ms
, possible_cpus
->cpus
[i
].arch_id
, &error_fatal
);
142 CpuInstanceProperties
143 x86_cpu_index_to_props(MachineState
*ms
, unsigned cpu_index
)
145 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
146 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
148 assert(cpu_index
< possible_cpus
->len
);
149 return possible_cpus
->cpus
[cpu_index
].props
;
152 int64_t x86_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
154 X86CPUTopoIDs topo_ids
;
155 X86MachineState
*x86ms
= X86_MACHINE(ms
);
156 X86CPUTopoInfo topo_info
;
158 init_topo_info(&topo_info
, x86ms
);
160 assert(idx
< ms
->possible_cpus
->len
);
161 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[idx
].arch_id
,
162 &topo_info
, &topo_ids
);
163 return topo_ids
.pkg_id
% ms
->numa_state
->num_nodes
;
166 const CPUArchIdList
*x86_possible_cpu_arch_ids(MachineState
*ms
)
168 X86MachineState
*x86ms
= X86_MACHINE(ms
);
169 unsigned int max_cpus
= ms
->smp
.max_cpus
;
170 X86CPUTopoInfo topo_info
;
173 if (ms
->possible_cpus
) {
175 * make sure that max_cpus hasn't changed since the first use, i.e.
176 * -smp hasn't been parsed after it
178 assert(ms
->possible_cpus
->len
== max_cpus
);
179 return ms
->possible_cpus
;
182 ms
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
183 sizeof(CPUArchId
) * max_cpus
);
184 ms
->possible_cpus
->len
= max_cpus
;
186 init_topo_info(&topo_info
, x86ms
);
188 for (i
= 0; i
< ms
->possible_cpus
->len
; i
++) {
189 X86CPUTopoIDs topo_ids
;
191 ms
->possible_cpus
->cpus
[i
].type
= ms
->cpu_type
;
192 ms
->possible_cpus
->cpus
[i
].vcpus_count
= 1;
193 ms
->possible_cpus
->cpus
[i
].arch_id
=
194 x86_cpu_apic_id_from_index(x86ms
, i
);
195 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[i
].arch_id
,
196 &topo_info
, &topo_ids
);
197 ms
->possible_cpus
->cpus
[i
].props
.has_socket_id
= true;
198 ms
->possible_cpus
->cpus
[i
].props
.socket_id
= topo_ids
.pkg_id
;
199 if (x86ms
->smp_dies
> 1) {
200 ms
->possible_cpus
->cpus
[i
].props
.has_die_id
= true;
201 ms
->possible_cpus
->cpus
[i
].props
.die_id
= topo_ids
.die_id
;
203 ms
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
204 ms
->possible_cpus
->cpus
[i
].props
.core_id
= topo_ids
.core_id
;
205 ms
->possible_cpus
->cpus
[i
].props
.has_thread_id
= true;
206 ms
->possible_cpus
->cpus
[i
].props
.thread_id
= topo_ids
.smt_id
;
208 return ms
->possible_cpus
;
211 static void x86_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
213 /* cpu index isn't used */
217 X86CPU
*cpu
= X86_CPU(cs
);
219 if (!cpu
->apic_state
) {
220 cpu_interrupt(cs
, CPU_INTERRUPT_NMI
);
222 apic_deliver_nmi(cpu
->apic_state
);
227 static long get_file_size(FILE *f
)
231 /* XXX: on Unix systems, using fstat() probably makes more sense */
234 fseek(f
, 0, SEEK_END
);
236 fseek(f
, where
, SEEK_SET
);
242 uint64_t cpu_get_tsc(CPUX86State
*env
)
244 return cpu_get_ticks();
248 static void pic_irq_request(void *opaque
, int irq
, int level
)
250 CPUState
*cs
= first_cpu
;
251 X86CPU
*cpu
= X86_CPU(cs
);
253 trace_x86_pic_interrupt(irq
, level
);
254 if (cpu
->apic_state
&& !kvm_irqchip_in_kernel()) {
257 if (apic_accept_pic_intr(cpu
->apic_state
)) {
258 apic_deliver_pic_intr(cpu
->apic_state
, level
);
263 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
265 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
270 qemu_irq
x86_allocate_cpu_irq(void)
272 return qemu_allocate_irq(pic_irq_request
, NULL
, 0);
275 int cpu_get_pic_interrupt(CPUX86State
*env
)
277 X86CPU
*cpu
= env_archcpu(env
);
280 if (!kvm_irqchip_in_kernel()) {
281 intno
= apic_get_interrupt(cpu
->apic_state
);
285 /* read the irq from the PIC */
286 if (!apic_accept_pic_intr(cpu
->apic_state
)) {
291 intno
= pic_read_irq(isa_pic
);
295 DeviceState
*cpu_get_current_apic(void)
298 X86CPU
*cpu
= X86_CPU(current_cpu
);
299 return cpu
->apic_state
;
305 void gsi_handler(void *opaque
, int n
, int level
)
307 GSIState
*s
= opaque
;
309 trace_x86_gsi_interrupt(n
, level
);
310 if (n
< ISA_NUM_IRQS
) {
311 /* Under KVM, Kernel will forward to both PIC and IOAPIC */
312 qemu_set_irq(s
->i8259_irq
[n
], level
);
314 qemu_set_irq(s
->ioapic_irq
[n
], level
);
317 void ioapic_init_gsi(GSIState
*gsi_state
, const char *parent_name
)
324 if (kvm_ioapic_in_kernel()) {
325 dev
= qdev_create(NULL
, TYPE_KVM_IOAPIC
);
327 dev
= qdev_create(NULL
, TYPE_IOAPIC
);
329 object_property_add_child(object_resolve_path(parent_name
, NULL
),
330 "ioapic", OBJECT(dev
), NULL
);
331 qdev_init_nofail(dev
);
332 d
= SYS_BUS_DEVICE(dev
);
333 sysbus_mmio_map(d
, 0, IO_APIC_DEFAULT_ADDRESS
);
335 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
336 gsi_state
->ioapic_irq
[i
] = qdev_get_gpio_in(dev
, i
);
345 } __attribute__((packed
));
349 * The entry point into the kernel for PVH boot is different from
350 * the native entry point. The PVH entry is defined by the x86/HVM
351 * direct boot ABI and is available in an ELFNOTE in the kernel binary.
353 * This function is passed to load_elf() when it is called from
354 * load_elfboot() which then additionally checks for an ELF Note of
355 * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to
356 * parse the PVH entry address from the ELF Note.
358 * Due to trickery in elf_opts.h, load_elf() is actually available as
359 * load_elf32() or load_elf64() and this routine needs to be able
360 * to deal with being called as 32 or 64 bit.
362 * The address of the PVH entry point is saved to the 'pvh_start_addr'
363 * global variable. (although the entry point is 32-bit, the kernel
364 * binary can be either 32-bit or 64-bit).
366 static uint64_t read_pvh_start_addr(void *arg1
, void *arg2
, bool is64
)
368 size_t *elf_note_data_addr
;
370 /* Check if ELF Note header passed in is valid */
376 struct elf64_note
*nhdr64
= (struct elf64_note
*)arg1
;
377 uint64_t nhdr_size64
= sizeof(struct elf64_note
);
378 uint64_t phdr_align
= *(uint64_t *)arg2
;
379 uint64_t nhdr_namesz
= nhdr64
->n_namesz
;
382 ((void *)nhdr64
) + nhdr_size64
+
383 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
385 struct elf32_note
*nhdr32
= (struct elf32_note
*)arg1
;
386 uint32_t nhdr_size32
= sizeof(struct elf32_note
);
387 uint32_t phdr_align
= *(uint32_t *)arg2
;
388 uint32_t nhdr_namesz
= nhdr32
->n_namesz
;
391 ((void *)nhdr32
) + nhdr_size32
+
392 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
395 pvh_start_addr
= *elf_note_data_addr
;
397 return pvh_start_addr
;
400 static bool load_elfboot(const char *kernel_filename
,
401 int kernel_file_size
,
403 size_t pvh_xen_start_addr
,
407 uint32_t mh_load_addr
= 0;
408 uint32_t elf_kernel_size
= 0;
410 uint64_t elf_low
, elf_high
;
413 if (ldl_p(header
) != 0x464c457f) {
414 return false; /* no elfboot */
417 bool elf_is64
= header
[EI_CLASS
] == ELFCLASS64
;
419 ((Elf64_Ehdr
*)header
)->e_flags
: ((Elf32_Ehdr
*)header
)->e_flags
;
421 if (flags
& 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */
422 error_report("elfboot unsupported flags = %x", flags
);
426 uint64_t elf_note_type
= XEN_ELFNOTE_PHYS32_ENTRY
;
427 kernel_size
= load_elf(kernel_filename
, read_pvh_start_addr
,
428 NULL
, &elf_note_type
, &elf_entry
,
429 &elf_low
, &elf_high
, NULL
, 0, I386_ELF_MACHINE
,
432 if (kernel_size
< 0) {
433 error_report("Error while loading elf kernel");
436 mh_load_addr
= elf_low
;
437 elf_kernel_size
= elf_high
- elf_low
;
439 if (pvh_start_addr
== 0) {
440 error_report("Error loading uncompressed kernel without PVH ELF Note");
443 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ENTRY
, pvh_start_addr
);
444 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, mh_load_addr
);
445 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, elf_kernel_size
);
450 void x86_load_linux(X86MachineState
*x86ms
,
454 bool linuxboot_dma_enabled
)
457 int setup_size
, kernel_size
, cmdline_size
;
458 int dtb_size
, setup_data_offset
;
460 uint8_t header
[8192], *setup
, *kernel
;
461 hwaddr real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
464 MachineState
*machine
= MACHINE(x86ms
);
465 struct setup_data
*setup_data
;
466 const char *kernel_filename
= machine
->kernel_filename
;
467 const char *initrd_filename
= machine
->initrd_filename
;
468 const char *dtb_filename
= machine
->dtb
;
469 const char *kernel_cmdline
= machine
->kernel_cmdline
;
471 /* Align to 16 bytes as a paranoia measure */
472 cmdline_size
= (strlen(kernel_cmdline
) + 16) & ~15;
474 /* load the kernel header */
475 f
= fopen(kernel_filename
, "rb");
477 fprintf(stderr
, "qemu: could not open kernel file '%s': %s\n",
478 kernel_filename
, strerror(errno
));
482 kernel_size
= get_file_size(f
);
484 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
485 MIN(ARRAY_SIZE(header
), kernel_size
)) {
486 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
487 kernel_filename
, strerror(errno
));
491 /* kernel protocol version */
492 if (ldl_p(header
+ 0x202) == 0x53726448) {
493 protocol
= lduw_p(header
+ 0x206);
496 * This could be a multiboot kernel. If it is, let's stop treating it
497 * like a Linux kernel.
498 * Note: some multiboot images could be in the ELF format (the same of
499 * PVH), so we try multiboot first since we check the multiboot magic
500 * header before to load it.
502 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
503 kernel_cmdline
, kernel_size
, header
)) {
507 * Check if the file is an uncompressed kernel file (ELF) and load it,
508 * saving the PVH entry point used by the x86/HVM direct boot ABI.
509 * If load_elfboot() is successful, populate the fw_cfg info.
512 load_elfboot(kernel_filename
, kernel_size
,
513 header
, pvh_start_addr
, fw_cfg
)) {
516 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
517 strlen(kernel_cmdline
) + 1);
518 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
520 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, sizeof(header
));
521 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
,
522 header
, sizeof(header
));
525 if (initrd_filename
) {
526 GMappedFile
*mapped_file
;
531 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
533 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
534 initrd_filename
, gerr
->message
);
537 x86ms
->initrd_mapped_file
= mapped_file
;
539 initrd_data
= g_mapped_file_get_contents(mapped_file
);
540 initrd_size
= g_mapped_file_get_length(mapped_file
);
541 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
542 if (initrd_size
>= initrd_max
) {
543 fprintf(stderr
, "qemu: initrd is too large, cannot support."
544 "(max: %"PRIu32
", need %"PRId64
")\n",
545 initrd_max
, (uint64_t)initrd_size
);
549 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
551 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
552 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
553 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
,
557 option_rom
[nb_option_roms
].bootindex
= 0;
558 option_rom
[nb_option_roms
].name
= "pvh.bin";
566 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
569 cmdline_addr
= 0x9a000 - cmdline_size
;
571 } else if (protocol
< 0x202) {
572 /* High but ancient kernel */
574 cmdline_addr
= 0x9a000 - cmdline_size
;
575 prot_addr
= 0x100000;
577 /* High and recent kernel */
579 cmdline_addr
= 0x20000;
580 prot_addr
= 0x100000;
583 /* highest address for loading the initrd */
584 if (protocol
>= 0x20c &&
585 lduw_p(header
+ 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G
) {
587 * Linux has supported initrd up to 4 GB for a very long time (2007,
588 * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013),
589 * though it only sets initrd_max to 2 GB to "work around bootloader
590 * bugs". Luckily, QEMU firmware(which does something like bootloader)
591 * has supported this.
593 * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can
594 * be loaded into any address.
596 * In addition, initrd_max is uint32_t simply because QEMU doesn't
597 * support the 64-bit boot protocol (specifically the ext_ramdisk_image
600 * Therefore here just limit initrd_max to UINT32_MAX simply as well.
602 initrd_max
= UINT32_MAX
;
603 } else if (protocol
>= 0x203) {
604 initrd_max
= ldl_p(header
+ 0x22c);
606 initrd_max
= 0x37ffffff;
609 if (initrd_max
>= x86ms
->below_4g_mem_size
- acpi_data_size
) {
610 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
613 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
614 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
) + 1);
615 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
617 if (protocol
>= 0x202) {
618 stl_p(header
+ 0x228, cmdline_addr
);
620 stw_p(header
+ 0x20, 0xA33F);
621 stw_p(header
+ 0x22, cmdline_addr
- real_addr
);
624 /* handle vga= parameter */
625 vmode
= strstr(kernel_cmdline
, "vga=");
627 unsigned int video_mode
;
632 if (!strncmp(vmode
, "normal", 6)) {
634 } else if (!strncmp(vmode
, "ext", 3)) {
636 } else if (!strncmp(vmode
, "ask", 3)) {
639 ret
= qemu_strtoui(vmode
, &end
, 0, &video_mode
);
640 if (ret
!= 0 || (*end
&& *end
!= ' ')) {
641 fprintf(stderr
, "qemu: invalid 'vga=' kernel parameter.\n");
645 stw_p(header
+ 0x1fa, video_mode
);
650 * High nybble = B reserved for QEMU; low nybble is revision number.
651 * If this code is substantially changed, you may want to consider
652 * incrementing the revision.
654 if (protocol
>= 0x200) {
655 header
[0x210] = 0xB0;
658 if (protocol
>= 0x201) {
659 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
660 stw_p(header
+ 0x224, cmdline_addr
- real_addr
- 0x200);
664 if (initrd_filename
) {
665 GMappedFile
*mapped_file
;
670 if (protocol
< 0x200) {
671 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
675 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
677 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
678 initrd_filename
, gerr
->message
);
681 x86ms
->initrd_mapped_file
= mapped_file
;
683 initrd_data
= g_mapped_file_get_contents(mapped_file
);
684 initrd_size
= g_mapped_file_get_length(mapped_file
);
685 if (initrd_size
>= initrd_max
) {
686 fprintf(stderr
, "qemu: initrd is too large, cannot support."
687 "(max: %"PRIu32
", need %"PRId64
")\n",
688 initrd_max
, (uint64_t)initrd_size
);
692 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
694 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
695 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
696 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
698 stl_p(header
+ 0x218, initrd_addr
);
699 stl_p(header
+ 0x21c, initrd_size
);
702 /* load kernel and setup */
703 setup_size
= header
[0x1f1];
704 if (setup_size
== 0) {
707 setup_size
= (setup_size
+ 1) * 512;
708 if (setup_size
> kernel_size
) {
709 fprintf(stderr
, "qemu: invalid kernel header\n");
712 kernel_size
-= setup_size
;
714 setup
= g_malloc(setup_size
);
715 kernel
= g_malloc(kernel_size
);
716 fseek(f
, 0, SEEK_SET
);
717 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
718 fprintf(stderr
, "fread() failed\n");
721 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
722 fprintf(stderr
, "fread() failed\n");
727 /* append dtb to kernel */
729 if (protocol
< 0x209) {
730 fprintf(stderr
, "qemu: Linux kernel too old to load a dtb\n");
734 dtb_size
= get_image_size(dtb_filename
);
736 fprintf(stderr
, "qemu: error reading dtb %s: %s\n",
737 dtb_filename
, strerror(errno
));
741 setup_data_offset
= QEMU_ALIGN_UP(kernel_size
, 16);
742 kernel_size
= setup_data_offset
+ sizeof(struct setup_data
) + dtb_size
;
743 kernel
= g_realloc(kernel
, kernel_size
);
745 stq_p(header
+ 0x250, prot_addr
+ setup_data_offset
);
747 setup_data
= (struct setup_data
*)(kernel
+ setup_data_offset
);
748 setup_data
->next
= 0;
749 setup_data
->type
= cpu_to_le32(SETUP_DTB
);
750 setup_data
->len
= cpu_to_le32(dtb_size
);
752 load_image_size(dtb_filename
, setup_data
->data
, dtb_size
);
755 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
757 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
758 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
759 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
761 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
762 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
763 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
765 option_rom
[nb_option_roms
].bootindex
= 0;
766 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
767 if (linuxboot_dma_enabled
&& fw_cfg_dma_enabled(fw_cfg
)) {
768 option_rom
[nb_option_roms
].name
= "linuxboot_dma.bin";
773 void x86_bios_rom_init(MemoryRegion
*rom_memory
, bool isapc_ram_fw
)
776 MemoryRegion
*bios
, *isa_bios
;
777 int bios_size
, isa_bios_size
;
781 if (bios_name
== NULL
) {
782 bios_name
= BIOS_FILENAME
;
784 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
786 bios_size
= get_image_size(filename
);
790 if (bios_size
<= 0 ||
791 (bios_size
% 65536) != 0) {
794 bios
= g_malloc(sizeof(*bios
));
795 memory_region_init_ram(bios
, NULL
, "pc.bios", bios_size
, &error_fatal
);
797 memory_region_set_readonly(bios
, true);
799 ret
= rom_add_file_fixed(bios_name
, (uint32_t)(-bios_size
), -1);
802 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
807 /* map the last 128KB of the BIOS in ISA space */
808 isa_bios_size
= MIN(bios_size
, 128 * KiB
);
809 isa_bios
= g_malloc(sizeof(*isa_bios
));
810 memory_region_init_alias(isa_bios
, NULL
, "isa-bios", bios
,
811 bios_size
- isa_bios_size
, isa_bios_size
);
812 memory_region_add_subregion_overlap(rom_memory
,
813 0x100000 - isa_bios_size
,
817 memory_region_set_readonly(isa_bios
, true);
820 /* map all the bios at the top of memory */
821 memory_region_add_subregion(rom_memory
,
822 (uint32_t)(-bios_size
),
826 static void x86_machine_get_max_ram_below_4g(Object
*obj
, Visitor
*v
,
827 const char *name
, void *opaque
,
830 X86MachineState
*x86ms
= X86_MACHINE(obj
);
831 uint64_t value
= x86ms
->max_ram_below_4g
;
833 visit_type_size(v
, name
, &value
, errp
);
836 static void x86_machine_set_max_ram_below_4g(Object
*obj
, Visitor
*v
,
837 const char *name
, void *opaque
,
840 X86MachineState
*x86ms
= X86_MACHINE(obj
);
844 visit_type_size(v
, name
, &value
, &error
);
846 error_propagate(errp
, error
);
849 if (value
> 4 * GiB
) {
851 "Machine option 'max-ram-below-4g=%"PRIu64
852 "' expects size less than or equal to 4G", value
);
853 error_propagate(errp
, error
);
857 if (value
< 1 * MiB
) {
858 warn_report("Only %" PRIu64
" bytes of RAM below the 4GiB boundary,"
859 "BIOS may not work with less than 1MiB", value
);
862 x86ms
->max_ram_below_4g
= value
;
865 bool x86_machine_is_smm_enabled(X86MachineState
*x86ms
)
867 bool smm_available
= false;
869 if (x86ms
->smm
== ON_OFF_AUTO_OFF
) {
873 if (tcg_enabled() || qtest_enabled()) {
874 smm_available
= true;
875 } else if (kvm_enabled()) {
876 smm_available
= kvm_has_smm();
883 if (x86ms
->smm
== ON_OFF_AUTO_ON
) {
884 error_report("System Management Mode not supported by this hypervisor.");
890 static void x86_machine_get_smm(Object
*obj
, Visitor
*v
, const char *name
,
891 void *opaque
, Error
**errp
)
893 X86MachineState
*x86ms
= X86_MACHINE(obj
);
894 OnOffAuto smm
= x86ms
->smm
;
896 visit_type_OnOffAuto(v
, name
, &smm
, errp
);
899 static void x86_machine_set_smm(Object
*obj
, Visitor
*v
, const char *name
,
900 void *opaque
, Error
**errp
)
902 X86MachineState
*x86ms
= X86_MACHINE(obj
);
904 visit_type_OnOffAuto(v
, name
, &x86ms
->smm
, errp
);
907 static void x86_machine_initfn(Object
*obj
)
909 X86MachineState
*x86ms
= X86_MACHINE(obj
);
911 x86ms
->smm
= ON_OFF_AUTO_AUTO
;
912 x86ms
->max_ram_below_4g
= 0; /* use default */
916 static void x86_machine_class_init(ObjectClass
*oc
, void *data
)
918 MachineClass
*mc
= MACHINE_CLASS(oc
);
919 X86MachineClass
*x86mc
= X86_MACHINE_CLASS(oc
);
920 NMIClass
*nc
= NMI_CLASS(oc
);
922 mc
->cpu_index_to_instance_props
= x86_cpu_index_to_props
;
923 mc
->get_default_cpu_node_id
= x86_get_default_cpu_node_id
;
924 mc
->possible_cpu_arch_ids
= x86_possible_cpu_arch_ids
;
925 x86mc
->compat_apic_id_mode
= false;
926 x86mc
->save_tsc_khz
= true;
927 nc
->nmi_monitor_handler
= x86_nmi
;
929 object_class_property_add(oc
, X86_MACHINE_MAX_RAM_BELOW_4G
, "size",
930 x86_machine_get_max_ram_below_4g
, x86_machine_set_max_ram_below_4g
,
931 NULL
, NULL
, &error_abort
);
932 object_class_property_set_description(oc
, X86_MACHINE_MAX_RAM_BELOW_4G
,
933 "Maximum ram below the 4G boundary (32bit boundary)", &error_abort
);
935 object_class_property_add(oc
, X86_MACHINE_SMM
, "OnOffAuto",
936 x86_machine_get_smm
, x86_machine_set_smm
,
937 NULL
, NULL
, &error_abort
);
938 object_class_property_set_description(oc
, X86_MACHINE_SMM
,
939 "Enable SMM", &error_abort
);
942 static const TypeInfo x86_machine_info
= {
943 .name
= TYPE_X86_MACHINE
,
944 .parent
= TYPE_MACHINE
,
946 .instance_size
= sizeof(X86MachineState
),
947 .instance_init
= x86_machine_initfn
,
948 .class_size
= sizeof(X86MachineClass
),
949 .class_init
= x86_machine_class_init
,
950 .interfaces
= (InterfaceInfo
[]) {
956 static void x86_machine_register_types(void)
958 type_register_static(&x86_machine_info
);
961 type_init(x86_machine_register_types
)