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1 #ifndef HW_IDE_INTERNAL_H
2 #define HW_IDE_INTERNAL_H
3
4 /*
5 * QEMU IDE Emulation -- internal header file
6 * only files in hw/ide/ are supposed to include this file.
7 * non-internal declarations are in hw/ide.h
8 */
9 #include <hw/ide.h>
10 #include <hw/isa.h>
11 #include "iorange.h"
12 #include "dma.h"
13 #include "sysemu.h"
14 #include "hw/scsi-defs.h"
15
16 /* debug IDE devices */
17 //#define DEBUG_IDE
18 //#define DEBUG_IDE_ATAPI
19 //#define DEBUG_AIO
20 #define USE_DMA_CDROM
21
22 typedef struct IDEBus IDEBus;
23 typedef struct IDEDevice IDEDevice;
24 typedef struct IDEState IDEState;
25 typedef struct IDEDMA IDEDMA;
26 typedef struct IDEDMAOps IDEDMAOps;
27
28 /* Bits of HD_STATUS */
29 #define ERR_STAT 0x01
30 #define INDEX_STAT 0x02
31 #define ECC_STAT 0x04 /* Corrected error */
32 #define DRQ_STAT 0x08
33 #define SEEK_STAT 0x10
34 #define SRV_STAT 0x10
35 #define WRERR_STAT 0x20
36 #define READY_STAT 0x40
37 #define BUSY_STAT 0x80
38
39 /* Bits for HD_ERROR */
40 #define MARK_ERR 0x01 /* Bad address mark */
41 #define TRK0_ERR 0x02 /* couldn't find track 0 */
42 #define ABRT_ERR 0x04 /* Command aborted */
43 #define MCR_ERR 0x08 /* media change request */
44 #define ID_ERR 0x10 /* ID field not found */
45 #define MC_ERR 0x20 /* media changed */
46 #define ECC_ERR 0x40 /* Uncorrectable ECC error */
47 #define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */
48 #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
49
50 /* Bits of HD_NSECTOR */
51 #define CD 0x01
52 #define IO 0x02
53 #define REL 0x04
54 #define TAG_MASK 0xf8
55
56 #define IDE_CMD_RESET 0x04
57 #define IDE_CMD_DISABLE_IRQ 0x02
58
59 /* ACS-2 T13/2015-D Table B.2 Command codes */
60 #define WIN_NOP 0x00
61 /* reserved 0x01..0x02 */
62 #define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */
63 /* reserved 0x04..0x05 */
64 #define WIN_DSM 0x06
65 /* reserved 0x07 */
66 #define WIN_DEVICE_RESET 0x08
67 /* reserved 0x09..0x0a */
68 /* REQUEST SENSE DATA EXT 0x0B */
69 /* reserved 0x0C..0x0F */
70 #define WIN_RECAL 0x10 /* obsolete since ATA4 */
71 /* obsolete since ATA3, retired in ATA4 0x11..0x1F */
72 #define WIN_READ 0x20 /* 28-Bit */
73 #define WIN_READ_ONCE 0x21 /* 28-Bit w/o retries, obsolete since ATA5 */
74 /* obsolete since ATA4 0x22..0x23 */
75 #define WIN_READ_EXT 0x24 /* 48-Bit */
76 #define WIN_READDMA_EXT 0x25 /* 48-Bit */
77 #define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit, obsolete since ACS2 */
78 #define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */
79 /* reserved 0x28 */
80 #define WIN_MULTREAD_EXT 0x29 /* 48-Bit */
81 /* READ STREAM DMA EXT 0x2A */
82 /* READ STREAM EXT 0x2B */
83 /* reserved 0x2C..0x2E */
84 /* READ LOG EXT 0x2F */
85 #define WIN_WRITE 0x30 /* 28-Bit */
86 #define WIN_WRITE_ONCE 0x31 /* 28-Bit w/o retries, obsolete since ATA5 */
87 /* obsolete since ATA4 0x32..0x33 */
88 #define WIN_WRITE_EXT 0x34 /* 48-Bit */
89 #define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */
90 #define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */
91 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit, obsolete since ACS2 */
92 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit */
93 #define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */
94 #define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */
95 /* WRITE STREAM DMA EXT 0x3A */
96 /* WRITE STREAM EXT 0x3B */
97 #define WIN_WRITE_VERIFY 0x3C /* 28-Bit, obsolete since ATA4 */
98 /* WRITE DMA FUA EXT 0x3D */
99 /* obsolete since ACS2 0x3E */
100 /* WRITE LOG EXT 0x3F */
101 #define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */
102 #define WIN_VERIFY_ONCE 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */
103 #define WIN_VERIFY_EXT 0x42 /* 48-Bit */
104 /* reserved 0x43..0x44 */
105 /* WRITE UNCORRECTABLE EXT 0x45 */
106 /* reserved 0x46 */
107 /* READ LOG DMA EXT 0x47 */
108 /* reserved 0x48..0x4F */
109 /* obsolete since ATA4 0x50 */
110 /* CONFIGURE STREAM 0x51 */
111 /* reserved 0x52..0x56 */
112 /* WRITE LOG DMA EXT 0x57 */
113 /* reserved 0x58..0x5A */
114 /* TRUSTED NON DATA 0x5B */
115 /* TRUSTED RECEIVE 0x5C */
116 /* TRUSTED RECEIVE DMA 0x5D */
117 /* TRUSTED SEND 0x5E */
118 /* TRUSTED SEND DMA 0x5F */
119 /* READ FPDMA QUEUED 0x60 */
120 /* WRITE FPDMA QUEUED 0x61 */
121 /* reserved 0x62->0x6F */
122 #define WIN_SEEK 0x70 /* obsolete since ATA7 */
123 /* reserved 0x71-0x7F */
124 /* vendor specific 0x80-0x86 */
125 #define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */
126 /* vendor specific 0x88-0x8F */
127 #define WIN_DIAGNOSE 0x90
128 #define WIN_SPECIFY 0x91 /* set drive geometry translation, obsolete since ATA6 */
129 #define WIN_DOWNLOAD_MICROCODE 0x92
130 /* DOWNLOAD MICROCODE DMA 0x93 */
131 #define WIN_STANDBYNOW2 0x94 /* retired in ATA4 */
132 #define WIN_IDLEIMMEDIATE2 0x95 /* force drive to become "ready", retired in ATA4 */
133 #define WIN_STANDBY2 0x96 /* retired in ATA4 */
134 #define WIN_SETIDLE2 0x97 /* retired in ATA4 */
135 #define WIN_CHECKPOWERMODE2 0x98 /* retired in ATA4 */
136 #define WIN_SLEEPNOW2 0x99 /* retired in ATA4 */
137 /* vendor specific 0x9A */
138 /* reserved 0x9B..0x9F */
139 #define WIN_PACKETCMD 0xA0 /* Send a packet command. */
140 #define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */
141 #define WIN_QUEUED_SERVICE 0xA2 /* obsolete since ACS2 */
142 /* reserved 0xA3..0xAF */
143 #define WIN_SMART 0xB0 /* self-monitoring and reporting */
144 /* Device Configuration Overlay 0xB1 */
145 /* reserved 0xB2..0xB3 */
146 /* Sanitize Device 0xB4 */
147 /* reserved 0xB5 */
148 /* NV Cache 0xB6 */
149 /* reserved for CFA 0xB7..0xBB */
150 #define CFA_ACCESS_METADATA_STORAGE 0xB8
151 /* reserved 0xBC..0xBF */
152 #define CFA_ERASE_SECTORS 0xC0 /* microdrives implement as NOP */
153 /* vendor specific 0xC1..0xC3 */
154 #define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/
155 #define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */
156 #define WIN_SETMULT 0xC6 /* enable/disable multiple mode */
157 #define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */
158 #define WIN_READDMA 0xC8 /* read sectors using DMA transfers */
159 #define WIN_READDMA_ONCE 0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */
160 #define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */
161 #define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */
162 #define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */
163 #define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */
164 /* WRITE MULTIPLE FUA EXT 0xCE */
165 /* reserved 0xCF..0xDO */
166 /* CHECK MEDIA CARD TYPE 0xD1 */
167 /* reserved for media card pass through 0xD2..0xD4 */
168 /* reserved 0xD5..0xD9 */
169 #define WIN_GETMEDIASTATUS 0xDA /* obsolete since ATA8 */
170 /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */
171 #define WIN_DOORLOCK 0xDE /* lock door on removable drives, obsolete since ATA8 */
172 #define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives, obsolete since ATA8 */
173 #define WIN_STANDBYNOW1 0xE0
174 #define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */
175 #define WIN_STANDBY 0xE2 /* Set device in Standby Mode */
176 #define WIN_SETIDLE1 0xE3
177 #define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */
178 #define WIN_CHECKPOWERMODE1 0xE5
179 #define WIN_SLEEPNOW1 0xE6
180 #define WIN_FLUSH_CACHE 0xE7
181 #define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */
182 /* READ BUFFER DMA 0xE9 */
183 #define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */
184 /* WRITE BUFFER DMA 0xEB */
185 #define WIN_IDENTIFY 0xEC /* ask drive to identify itself */
186 #define WIN_MEDIAEJECT 0xED /* obsolete since ATA8 */
187 /* obsolete since ATA4 0xEE */
188 #define WIN_SETFEATURES 0xEF /* set special drive features */
189 #define IBM_SENSE_CONDITION 0xF0 /* measure disk temperature, vendor specific */
190 #define WIN_SECURITY_SET_PASS 0xF1
191 #define WIN_SECURITY_UNLOCK 0xF2
192 #define WIN_SECURITY_ERASE_PREPARE 0xF3
193 #define WIN_SECURITY_ERASE_UNIT 0xF4
194 #define WIN_SECURITY_FREEZE_LOCK 0xF5
195 #define CFA_WEAR_LEVEL 0xF5 /* microdrives implement as NOP; not specified in T13! */
196 #define WIN_SECURITY_DISABLE 0xF6
197 /* vendor specific 0xF7 */
198 #define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */
199 #define WIN_SET_MAX 0xF9
200 /* vendor specific 0xFA..0xFF */
201
202 /* set to 1 set disable mult support */
203 #define MAX_MULT_SECTORS 16
204
205 #define IDE_DMA_BUF_SECTORS 256
206
207 /* feature values for Data Set Management */
208 #define DSM_TRIM 0x01
209
210 #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS)
211 #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS"
212 #endif
213
214 /* ATAPI defines */
215
216 #define ATAPI_PACKET_SIZE 12
217
218 /* The generic packet command opcodes for CD/DVD Logical Units,
219 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
220 #define GPCMD_BLANK 0xa1
221 #define GPCMD_CLOSE_TRACK 0x5b
222 #define GPCMD_FLUSH_CACHE 0x35
223 #define GPCMD_FORMAT_UNIT 0x04
224 #define GPCMD_GET_CONFIGURATION 0x46
225 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
226 #define GPCMD_GET_PERFORMANCE 0xac
227 #define GPCMD_INQUIRY 0x12
228 #define GPCMD_LOAD_UNLOAD 0xa6
229 #define GPCMD_MECHANISM_STATUS 0xbd
230 #define GPCMD_MODE_SELECT_10 0x55
231 #define GPCMD_MODE_SENSE_10 0x5a
232 #define GPCMD_PAUSE_RESUME 0x4b
233 #define GPCMD_PLAY_AUDIO_10 0x45
234 #define GPCMD_PLAY_AUDIO_MSF 0x47
235 #define GPCMD_PLAY_AUDIO_TI 0x48
236 #define GPCMD_PLAY_CD 0xbc
237 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e
238 #define GPCMD_READ_10 0x28
239 #define GPCMD_READ_12 0xa8
240 #define GPCMD_READ_CDVD_CAPACITY 0x25
241 #define GPCMD_READ_CD 0xbe
242 #define GPCMD_READ_CD_MSF 0xb9
243 #define GPCMD_READ_DISC_INFO 0x51
244 #define GPCMD_READ_DVD_STRUCTURE 0xad
245 #define GPCMD_READ_FORMAT_CAPACITIES 0x23
246 #define GPCMD_READ_HEADER 0x44
247 #define GPCMD_READ_TRACK_RZONE_INFO 0x52
248 #define GPCMD_READ_SUBCHANNEL 0x42
249 #define GPCMD_READ_TOC_PMA_ATIP 0x43
250 #define GPCMD_REPAIR_RZONE_TRACK 0x58
251 #define GPCMD_REPORT_KEY 0xa4
252 #define GPCMD_REQUEST_SENSE 0x03
253 #define GPCMD_RESERVE_RZONE_TRACK 0x53
254 #define GPCMD_SCAN 0xba
255 #define GPCMD_SEEK 0x2b
256 #define GPCMD_SEND_DVD_STRUCTURE 0xad
257 #define GPCMD_SEND_EVENT 0xa2
258 #define GPCMD_SEND_KEY 0xa3
259 #define GPCMD_SEND_OPC 0x54
260 #define GPCMD_SET_READ_AHEAD 0xa7
261 #define GPCMD_SET_STREAMING 0xb6
262 #define GPCMD_START_STOP_UNIT 0x1b
263 #define GPCMD_STOP_PLAY_SCAN 0x4e
264 #define GPCMD_TEST_UNIT_READY 0x00
265 #define GPCMD_VERIFY_10 0x2f
266 #define GPCMD_WRITE_10 0x2a
267 #define GPCMD_WRITE_AND_VERIFY_10 0x2e
268 /* This is listed as optional in ATAPI 2.6, but is (curiously)
269 * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji
270 * Table 377 as an MMC command for SCSi devices though... Most ATAPI
271 * drives support it. */
272 #define GPCMD_SET_SPEED 0xbb
273 /* This seems to be a SCSI specific CD-ROM opcode
274 * to play data at track/index */
275 #define GPCMD_PLAYAUDIO_TI 0x48
276 /*
277 * From MS Media Status Notification Support Specification. For
278 * older drives only.
279 */
280 #define GPCMD_GET_MEDIA_STATUS 0xda
281 #define GPCMD_MODE_SENSE_6 0x1a
282
283 #define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */
284 #define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */
285 #define ATAPI_INT_REASON_REL 0x04
286 #define ATAPI_INT_REASON_TAG 0xf8
287
288 /* same constants as bochs */
289 #define ASC_ILLEGAL_OPCODE 0x20
290 #define ASC_LOGICAL_BLOCK_OOR 0x21
291 #define ASC_INV_FIELD_IN_CMD_PACKET 0x24
292 #define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28
293 #define ASC_INCOMPATIBLE_FORMAT 0x30
294 #define ASC_MEDIUM_NOT_PRESENT 0x3a
295 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39
296 #define ASC_MEDIA_REMOVAL_PREVENTED 0x53
297
298 #define CFA_NO_ERROR 0x00
299 #define CFA_MISC_ERROR 0x09
300 #define CFA_INVALID_COMMAND 0x20
301 #define CFA_INVALID_ADDRESS 0x21
302 #define CFA_ADDRESS_OVERFLOW 0x2f
303
304 #define SMART_READ_DATA 0xd0
305 #define SMART_READ_THRESH 0xd1
306 #define SMART_ATTR_AUTOSAVE 0xd2
307 #define SMART_SAVE_ATTR 0xd3
308 #define SMART_EXECUTE_OFFLINE 0xd4
309 #define SMART_READ_LOG 0xd5
310 #define SMART_WRITE_LOG 0xd6
311 #define SMART_ENABLE 0xd8
312 #define SMART_DISABLE 0xd9
313 #define SMART_STATUS 0xda
314
315 typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind;
316
317 typedef void EndTransferFunc(IDEState *);
318
319 typedef void DMAStartFunc(IDEDMA *, IDEState *, BlockDriverCompletionFunc *);
320 typedef int DMAFunc(IDEDMA *);
321 typedef int DMAIntFunc(IDEDMA *, int);
322 typedef void DMARestartFunc(void *, int, RunState);
323
324 struct unreported_events {
325 bool eject_request;
326 bool new_media;
327 };
328
329 enum ide_dma_cmd {
330 IDE_DMA_READ,
331 IDE_DMA_WRITE,
332 IDE_DMA_TRIM,
333 };
334
335 #define ide_cmd_is_read(s) \
336 ((s)->dma_cmd == IDE_DMA_READ)
337
338 /* NOTE: IDEState represents in fact one drive */
339 struct IDEState {
340 IDEBus *bus;
341 uint8_t unit;
342 /* ide config */
343 IDEDriveKind drive_kind;
344 int cylinders, heads, sectors;
345 int64_t nb_sectors;
346 int mult_sectors;
347 int identify_set;
348 uint8_t identify_data[512];
349 int drive_serial;
350 char drive_serial_str[21];
351 char drive_model_str[41];
352 /* ide regs */
353 uint8_t feature;
354 uint8_t error;
355 uint32_t nsector;
356 uint8_t sector;
357 uint8_t lcyl;
358 uint8_t hcyl;
359 /* other part of tf for lba48 support */
360 uint8_t hob_feature;
361 uint8_t hob_nsector;
362 uint8_t hob_sector;
363 uint8_t hob_lcyl;
364 uint8_t hob_hcyl;
365
366 uint8_t select;
367 uint8_t status;
368
369 /* set for lba48 access */
370 uint8_t lba48;
371 BlockDriverState *bs;
372 char version[9];
373 /* ATAPI specific */
374 struct unreported_events events;
375 uint8_t sense_key;
376 uint8_t asc;
377 bool tray_open;
378 bool tray_locked;
379 uint8_t cdrom_changed;
380 int packet_transfer_size;
381 int elementary_transfer_size;
382 int io_buffer_index;
383 int lba;
384 int cd_sector_size;
385 int atapi_dma; /* true if dma is requested for the packet cmd */
386 BlockAcctCookie acct;
387 /* ATA DMA state */
388 int io_buffer_size;
389 QEMUSGList sg;
390 /* PIO transfer handling */
391 int req_nb_sectors; /* number of sectors per interrupt */
392 EndTransferFunc *end_transfer_func;
393 uint8_t *data_ptr;
394 uint8_t *data_end;
395 uint8_t *io_buffer;
396 /* PIO save/restore */
397 int32_t io_buffer_total_len;
398 int cur_io_buffer_offset;
399 int cur_io_buffer_len;
400 uint8_t end_transfer_fn_idx;
401 QEMUTimer *sector_write_timer; /* only used for win2k install hack */
402 uint32_t irq_count; /* counts IRQs when using win2k install hack */
403 /* CF-ATA extended error */
404 uint8_t ext_error;
405 /* CF-ATA metadata storage */
406 uint32_t mdata_size;
407 uint8_t *mdata_storage;
408 int media_changed;
409 enum ide_dma_cmd dma_cmd;
410 /* SMART */
411 uint8_t smart_enabled;
412 uint8_t smart_autosave;
413 int smart_errors;
414 uint8_t smart_selftest_count;
415 uint8_t *smart_selftest_data;
416 /* AHCI */
417 int ncq_queues;
418 };
419
420 struct IDEDMAOps {
421 DMAStartFunc *start_dma;
422 DMAFunc *start_transfer;
423 DMAIntFunc *prepare_buf;
424 DMAIntFunc *rw_buf;
425 DMAIntFunc *set_unit;
426 DMAIntFunc *add_status;
427 DMAFunc *set_inactive;
428 DMARestartFunc *restart_cb;
429 DMAFunc *reset;
430 };
431
432 struct IDEDMA {
433 const struct IDEDMAOps *ops;
434 struct iovec iov;
435 QEMUIOVector qiov;
436 BlockDriverAIOCB *aiocb;
437 };
438
439 struct IDEBus {
440 BusState qbus;
441 IDEDevice *master;
442 IDEDevice *slave;
443 IDEState ifs[2];
444 int bus_id;
445 IDEDMA *dma;
446 uint8_t unit;
447 uint8_t cmd;
448 qemu_irq irq;
449
450 int error_status;
451 };
452
453 #define TYPE_IDE_DEVICE "ide-device"
454 #define IDE_DEVICE(obj) \
455 OBJECT_CHECK(IDEDevice, (obj), TYPE_IDE_DEVICE)
456 #define IDE_DEVICE_CLASS(klass) \
457 OBJECT_CLASS_CHECK(IDEDeviceClass, (klass), TYPE_IDE_DEVICE)
458 #define IDE_DEVICE_GET_CLASS(obj) \
459 OBJECT_GET_CLASS(IDEDeviceClass, (obj), TYPE_IDE_DEVICE)
460
461 typedef struct IDEDeviceClass {
462 DeviceClass parent_class;
463 int (*init)(IDEDevice *dev);
464 } IDEDeviceClass;
465
466 struct IDEDevice {
467 DeviceState qdev;
468 uint32_t unit;
469 BlockConf conf;
470 char *version;
471 char *serial;
472 char *model;
473 };
474
475 #define BM_STATUS_DMAING 0x01
476 #define BM_STATUS_ERROR 0x02
477 #define BM_STATUS_INT 0x04
478
479 /* FIXME These are not status register bits */
480 #define BM_STATUS_DMA_RETRY 0x08
481 #define BM_STATUS_PIO_RETRY 0x10
482 #define BM_STATUS_RETRY_READ 0x20
483 #define BM_STATUS_RETRY_FLUSH 0x40
484 #define BM_STATUS_RETRY_TRIM 0x80
485
486 #define BM_MIGRATION_COMPAT_STATUS_BITS \
487 (BM_STATUS_DMA_RETRY | BM_STATUS_PIO_RETRY | \
488 BM_STATUS_RETRY_READ | BM_STATUS_RETRY_FLUSH)
489
490 #define BM_CMD_START 0x01
491 #define BM_CMD_READ 0x08
492
493 static inline IDEState *idebus_active_if(IDEBus *bus)
494 {
495 return bus->ifs + bus->unit;
496 }
497
498 static inline void ide_set_irq(IDEBus *bus)
499 {
500 if (!(bus->cmd & IDE_CMD_DISABLE_IRQ)) {
501 qemu_irq_raise(bus->irq);
502 }
503 }
504
505 /* hw/ide/core.c */
506 extern const VMStateDescription vmstate_ide_bus;
507
508 #define VMSTATE_IDE_BUS(_field, _state) \
509 VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus)
510
511 #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num) \
512 VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus)
513
514 extern const VMStateDescription vmstate_ide_drive;
515
516 #define VMSTATE_IDE_DRIVES(_field, _state) \
517 VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState)
518
519 void ide_bus_reset(IDEBus *bus);
520 int64_t ide_get_sector(IDEState *s);
521 void ide_set_sector(IDEState *s, int64_t sector_num);
522
523 void ide_dma_error(IDEState *s);
524
525 void ide_atapi_cmd_ok(IDEState *s);
526 void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc);
527 void ide_atapi_io_error(IDEState *s, int ret);
528
529 void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);
530 uint32_t ide_ioport_read(void *opaque, uint32_t addr1);
531 uint32_t ide_status_read(void *opaque, uint32_t addr);
532 void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val);
533 void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);
534 uint32_t ide_data_readw(void *opaque, uint32_t addr);
535 void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
536 uint32_t ide_data_readl(void *opaque, uint32_t addr);
537
538 int ide_init_drive(IDEState *s, BlockDriverState *bs, IDEDriveKind kind,
539 const char *version, const char *serial, const char *model);
540 void ide_init2(IDEBus *bus, qemu_irq irq);
541 void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0,
542 DriveInfo *hd1, qemu_irq irq);
543 void ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2);
544
545 void ide_exec_cmd(IDEBus *bus, uint32_t val);
546 void ide_dma_cb(void *opaque, int ret);
547 void ide_sector_write(IDEState *s);
548 void ide_sector_read(IDEState *s);
549 void ide_flush_cache(IDEState *s);
550
551 void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
552 EndTransferFunc *end_transfer_func);
553 void ide_transfer_stop(IDEState *s);
554 void ide_set_inactive(IDEState *s);
555 BlockDriverAIOCB *ide_issue_trim(BlockDriverState *bs,
556 int64_t sector_num, QEMUIOVector *qiov, int nb_sectors,
557 BlockDriverCompletionFunc *cb, void *opaque);
558
559 /* hw/ide/atapi.c */
560 void ide_atapi_cmd(IDEState *s);
561 void ide_atapi_cmd_reply_end(IDEState *s);
562
563 /* hw/ide/qdev.c */
564 void ide_bus_new(IDEBus *idebus, DeviceState *dev, int bus_id);
565 IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
566
567 #endif /* HW_IDE_INTERNAL_H */