hw/ide/mmio.c

   1 /*
   2  * QEMU IDE Emulation: mmio support (for embedded).
   3  *
   4  * Copyright (c) 2003 Fabrice Bellard
   5  * Copyright (c) 2006 Openedhand Ltd.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "qemu/osdep.h"
  27 #include "hw/sysbus.h"
  28 #include "migration/vmstate.h"
  29 #include "qemu/module.h"
  30 #include "sysemu/dma.h"
  31
  32 #include "hw/ide/internal.h"
  33 #include "hw/qdev-properties.h"
  34 #include "qom/object.h"
  35
  36 /***********************************************************/
  37 /* MMIO based ide port
  38  * This emulates IDE device connected directly to the CPU bus without
  39  * dedicated ide controller, which is often seen on embedded boards.
  40  */
  41
  42 #define TYPE_MMIO_IDE "mmio-ide"
  43 typedef struct MMIOIDEState MMIOState;
  44 #define MMIO_IDE(obj) OBJECT_CHECK(MMIOState, (obj), TYPE_MMIO_IDE)
  45
  46 struct MMIOIDEState {
  47     /*< private >*/
  48     SysBusDevice parent_obj;
  49     /*< public >*/
  50
  51     IDEBus bus;
  52
  53     uint32_t shift;
  54     qemu_irq irq;
  55     MemoryRegion iomem1, iomem2;
  56 };
  57
  58 static void mmio_ide_reset(DeviceState *dev)
  59 {
  60     MMIOState *s = MMIO_IDE(dev);
  61
  62     ide_bus_reset(&s->bus);
  63 }
  64
  65 static uint64_t mmio_ide_read(void *opaque, hwaddr addr,
  66                               unsigned size)
  67 {
  68     MMIOState *s = opaque;
  69     addr >>= s->shift;
  70     if (addr & 7)
  71         return ide_ioport_read(&s->bus, addr);
  72     else
  73         return ide_data_readw(&s->bus, 0);
  74 }
  75
  76 static void mmio_ide_write(void *opaque, hwaddr addr,
  77                            uint64_t val, unsigned size)
  78 {
  79     MMIOState *s = opaque;
  80     addr >>= s->shift;
  81     if (addr & 7)
  82         ide_ioport_write(&s->bus, addr, val);
  83     else
  84         ide_data_writew(&s->bus, 0, val);
  85 }
  86
  87 static const MemoryRegionOps mmio_ide_ops = {
  88     .read = mmio_ide_read,
  89     .write = mmio_ide_write,
  90     .endianness = DEVICE_LITTLE_ENDIAN,
  91 };
  92
  93 static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,
  94                                      unsigned size)
  95 {
  96     MMIOState *s= opaque;
  97     return ide_status_read(&s->bus, 0);
  98 }
  99
 100 static void mmio_ide_cmd_write(void *opaque, hwaddr addr,
 101                                uint64_t val, unsigned size)
 102 {
 103     MMIOState *s = opaque;
 104     ide_cmd_write(&s->bus, 0, val);
 105 }
 106
 107 static const MemoryRegionOps mmio_ide_cs_ops = {
 108     .read = mmio_ide_status_read,
 109     .write = mmio_ide_cmd_write,
 110     .endianness = DEVICE_LITTLE_ENDIAN,
 111 };
 112
 113 static const VMStateDescription vmstate_ide_mmio = {
 114     .name = "mmio-ide",
 115     .version_id = 3,
 116     .minimum_version_id = 0,
 117     .fields = (VMStateField[]) {
 118         VMSTATE_IDE_BUS(bus, MMIOState),
 119         VMSTATE_IDE_DRIVES(bus.ifs, MMIOState),
 120         VMSTATE_END_OF_LIST()
 121     }
 122 };
 123
 124 static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
 125 {
 126     SysBusDevice *d = SYS_BUS_DEVICE(dev);
 127     MMIOState *s = MMIO_IDE(dev);
 128
 129     ide_init2(&s->bus, s->irq);
 130
 131     memory_region_init_io(&s->iomem1, OBJECT(s), &mmio_ide_ops, s,
 132                           "ide-mmio.1", 16 << s->shift);
 133     memory_region_init_io(&s->iomem2, OBJECT(s), &mmio_ide_cs_ops, s,
 134                           "ide-mmio.2", 2 << s->shift);
 135     sysbus_init_mmio(d, &s->iomem1);
 136     sysbus_init_mmio(d, &s->iomem2);
 137 }
 138
 139 static void mmio_ide_initfn(Object *obj)
 140 {
 141     SysBusDevice *d = SYS_BUS_DEVICE(obj);
 142     MMIOState *s = MMIO_IDE(obj);
 143
 144     ide_bus_new(&s->bus, sizeof(s->bus), DEVICE(obj), 0, 2);
 145     sysbus_init_irq(d, &s->irq);
 146 }
 147
 148 static Property mmio_ide_properties[] = {
 149     DEFINE_PROP_UINT32("shift", MMIOState, shift, 0),
 150     DEFINE_PROP_END_OF_LIST()
 151 };
 152
 153 static void mmio_ide_class_init(ObjectClass *oc, void *data)
 154 {
 155     DeviceClass *dc = DEVICE_CLASS(oc);
 156
 157     dc->realize = mmio_ide_realizefn;
 158     dc->reset = mmio_ide_reset;
 159     device_class_set_props(dc, mmio_ide_properties);
 160     dc->vmsd = &vmstate_ide_mmio;
 161 }
 162
 163 static const TypeInfo mmio_ide_type_info = {
 164     .name = TYPE_MMIO_IDE,
 165     .parent = TYPE_SYS_BUS_DEVICE,
 166     .instance_size = sizeof(MMIOState),
 167     .instance_init = mmio_ide_initfn,
 168     .class_init = mmio_ide_class_init,
 169 };
 170
 171 static void mmio_ide_register_types(void)
 172 {
 173     type_register_static(&mmio_ide_type_info);
 174 }
 175
 176 void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1)
 177 {
 178     MMIOState *s = MMIO_IDE(dev);
 179
 180     if (hd0 != NULL) {
 181         ide_create_drive(&s->bus, 0, hd0);
 182     }
 183     if (hd1 != NULL) {
 184         ide_create_drive(&s->bus, 1, hd1);
 185     }
 186 }
 187
 188 type_init(mmio_ide_register_types)